X-Git-Url: https://git.gag.com/?p=fw%2Faltos;a=blobdiff_plain;f=src%2Fstm%2Fao_arch.h;h=87eda18b2a89878a2576d79f90bed05ab0e51a39;hp=b3c0190da3f2f807ce60a8ac6d329fa8e479244e;hb=583458772746317b98fced907ec780edff465888;hpb=8ba5344514f8ed51f6fd69ca09f6c7035c4fd0da diff --git a/src/stm/ao_arch.h b/src/stm/ao_arch.h index b3c0190d..87eda18b 100644 --- a/src/stm/ao_arch.h +++ b/src/stm/ao_arch.h @@ -25,7 +25,14 @@ * STM32L definitions and code fragments for AltOS */ -#define AO_STACK_SIZE 256 +#define AO_STACK_SIZE 512 + +#define AO_LED_TYPE uint16_t + +#ifndef AO_TICK_TYPE +#define AO_TICK_TYPE uint16_t +#define AO_TICK_SIGNED int16_t +#endif /* Various definitions to make GCC look more like SDCC */ @@ -40,7 +47,9 @@ #define __interrupt(n) #define __at(n) -#define ao_arch_reboot() /* XXX */ +#define CORTEX_M3_AIRCR ((uint32_t *) 0xe000ed0c) + +#define ao_arch_reboot() (*((uint32_t *) 0xe000ed0c) = 0x05fa0004) #define ao_arch_nop() asm("nop") @@ -55,7 +64,19 @@ extern void putchar(char c); extern char getchar(void); extern void ao_avr_stdio_init(void); + +/* + * ao_romconfig.c + */ + +#define AO_ROMCONFIG_VERSION 2 + +#define AO_ROMCONFIG_SYMBOL(a) __attribute__((section(".romconfig"))) const + +extern const uint16_t ao_romconfig_version; +extern const uint16_t ao_romconfig_check; extern const uint16_t ao_serial_number; +extern const uint32_t ao_radio_cal; #define ARM_PUSH32(stack, val) (*(--(stack)) = (val)) @@ -67,67 +88,167 @@ extern const uint16_t ao_serial_number; #define ao_arch_init_stack(task, start) do { \ uint32_t *sp = (uint32_t *) (task->stack + AO_STACK_SIZE); \ - uint16_t a = (uint16_t) start; \ + uint32_t a = (uint32_t) start; \ int i; \ \ - /* Return address */ \ + /* Return address (goes into LR) */ \ ARM_PUSH32(sp, a); \ \ - /* Invalid link register */ \ - ARM_PUSH32(sp, 0xffffffff); \ - \ - /* Clear register values */ \ + /* Clear register values r0-r12 */ \ i = 13; \ while (i--) \ ARM_PUSH32(sp, 0); \ \ - /* PSR with interrupts enabled */ \ - ARM_PUSH32(sp, 0x01000000); \ + /* APSR */ \ + ARM_PUSH32(sp, 0); \ + \ + /* PRIMASK with interrupts enabled */ \ + ARM_PUSH32(sp, 0); \ + \ task->sp = sp; \ } while (0); -#define ao_arch_save_regs() do { \ +#define ao_arch_save_regs() do { \ + /* Save general registers */ \ asm("push {r0-r12,lr}\n"); \ - cli(); \ - asm("mrs r0,psr" "\n\t" "push {r0}"); \ + \ + /* Save APSR */ \ + asm("mrs r0,apsr"); \ + asm("push {r0}"); \ + \ + /* Save PRIMASK */ \ + asm("mrs r0,primask"); \ + asm("push {r0}"); \ + \ + /* Enable interrupts */ \ sei(); \ } while (0) #define ao_arch_save_stack() do { \ - uint32_t sp; \ + uint32_t *sp; \ asm("mov %0,sp" : "=&r" (sp) ); \ - ao_cur_task->sp = (uint32_t *) (sp); \ + ao_cur_task->sp = (sp); \ + if ((uint8_t *) sp < &ao_cur_task->stack[0]) \ + ao_panic (AO_PANIC_STACK); \ + } while (0) + +#if 0 +#define ao_arch_isr_stack() do { \ + uint32_t *sp = (uint32_t *) 0x20004000; \ + asm("mov %0,sp" : "=&r" (sp) ); \ } while (0) +#else +#define ao_arch_isr_stack() +#endif -#define ao_arch_isr_stack() /* nothing */ #define ao_arch_cpu_idle() do { \ - asm("wfi"); \ + asm("wfi"); \ } while (0) #define ao_arch_restore_stack() do { \ uint32_t sp; \ sp = (uint32_t) ao_cur_task->sp; \ - cli(); \ + \ + /* Switch stacks */ \ asm("mov sp, %0" : : "r" (sp) ); \ - asm("pop {r0}" "\n\t" "msr psr,r0"); \ + \ + /* Restore PRIMASK */ \ + asm("pop {r0}"); \ + asm("msr primask,r0"); \ + \ + /* Restore APSR */ \ + asm("pop {r0}"); \ + asm("msr apsr,r0"); \ + \ + /* Restore general registers */ \ asm("pop {r0-r12,lr}\n"); \ + \ + /* Return to calling function */ \ asm("bx lr"); \ } while(0) #define ao_arch_critical(b) do { cli(); do { b } while (0); sei(); } while (0) -#define AO_ARM_NUM_ADC 12 - -struct ao_adc { - uint16_t tick; /* tick when the sample was read */ - uint16_t adc[AO_ARM_NUM_ADC]; /* samples */ -}; - /* * For now, we're running at a weird frequency */ -#define STM_APB1 (16000000 * 6 / 4) + +#if AO_HSE +#define AO_PLLSRC AO_HSE +#else +#define AO_PLLSRC STM_HSI_FREQ +#endif + +#define AO_PLLVCO (AO_PLLSRC * AO_PLLMUL) +#define AO_SYSCLK (AO_PLLVCO / AO_PLLDIV) +#define AO_HCLK (AO_SYSCLK / AO_AHB_PRESCALER) +#define AO_PCLK1 (AO_HCLK / AO_APB1_PRESCALER) +#define AO_PCLK2 (AO_HCLK / AO_APB2_PRESCALER) + +#if AO_APB1_PRESCALER == 1 +#define AO_TIM23467_CLK AO_PCLK1 +#else +#define AO_TIM23467_CLK (2 * AO_PCLK1) +#endif + +#if AO_APB2_PRESCALER == 1 +#define AO_TIM91011_CLK AO_PCLK2 +#else +#define AO_TIM91011_CLK (2 * AO_PCLK2) +#endif + +#define AO_STM_NVIC_HIGH_PRIORITY 4 +#define AO_STM_NVIC_CLOCK_PRIORITY 6 +#define AO_STM_NVIC_MED_PRIORITY 8 +#define AO_STM_NVIC_LOW_PRIORITY 10 + +void ao_lcd_stm_init(void); + +void ao_lcd_font_init(void); + +void ao_lcd_font_string(char *s); + +char +ao_serial1_getchar(void); + +void +ao_serial1_putchar(char c); + +char +ao_serial1_pollchar(void); + +void +ao_serial1_set_speed(uint8_t speed); + +char +ao_serial2_getchar(void); + +void +ao_serial2_putchar(char c); + +char +ao_serial2_pollchar(void); + +void +ao_serial2_set_speed(uint8_t speed); + +char +ao_serial3_getchar(void); + +void +ao_serial3_putchar(char c); + +char +ao_serial3_pollchar(void); + +void +ao_serial3_set_speed(uint8_t speed); + +extern const uint32_t ao_radio_cal; + +void +ao_adc_init(); #endif /* _AO_ARCH_H_ */