X-Git-Url: https://git.gag.com/?p=fw%2Faltos;a=blobdiff_plain;f=src%2Fstm%2Faltos-loader.ld;h=0753f5f7288d45ae9805a7a625d23688b8d46a02;hp=2d71b4eeeb070511e5a47a01b226f2ed2552687f;hb=2cb7a96567e1302a699f78290fab5e29693940ab;hpb=c9c35b100c3fcae661501d2bf89eedc7fceb2e1c

diff --git a/src/stm/altos-loader.ld b/src/stm/altos-loader.ld
index 2d71b4ee..0753f5f7 100644
--- a/src/stm/altos-loader.ld
+++ b/src/stm/altos-loader.ld
@@ -16,8 +16,8 @@
  */
 
 MEMORY {
-	rom (rx) : ORIGIN = 0x08000000, LENGTH = 8K
-	ram (!w) : ORIGIN = 0x20000000, LENGTH = 16K
+	rom : ORIGIN = 0x08000000, LENGTH = 4K
+	ram : ORIGIN = 0x20000000, LENGTH = 16K
 }
 
 INCLUDE registers.ld
@@ -29,7 +29,7 @@ SECTIONS {
 	 * Rom contents
 	 */
 
-	.text ORIGIN(rom) : {
+	.text : {
 		__text_start__ = .;
 		*(.interrupt)	/* Interrupt vectors */
 
@@ -37,27 +37,49 @@ SECTIONS {
 
 		ao_romconfig.o(.romconfig*)
 		ao_product.o(.romconfig*)
-
 		*(.text*)	/* Executable code */
+		*(.ARM.exidx* .gnu.linkonce.armexidx.*)
 		*(.rodata*)	/* Constants */
-
 	} > rom
+	__text_end__ = .;
 
-	.ARM.exidx : {
-		*(.ARM.exidx* .gnu.linkonce.armexidx.*)
-		__text_end__ = .;
-	} > rom
+	/* Boot data which must live at the start of ram so that
+	 * the application and bootloader share the same addresses.
+	 * This must be all uninitialized data
+	 */
+	.boot (NOLOAD) : {
+		__boot_start__ = .;
+		*(.boot)
+		__boot_end__ = .;
+	} >ram
 
-	/* Data -- relocated to RAM, but written to ROM
+	/* Functions placed in RAM (required for flashing)
+	 *
+	 * Align to 8 bytes as that's what the ARM likes text
+	 * segment alignments to be, and if we don't, then
+	 * we end up with a mismatch between the location in
+	 * ROM and the desired location in RAM. I don't
+	 * entirely understand this, but at least this appears
+	 * to work...
 	 */
-	.data ORIGIN(ram) : AT (ADDR(.ARM.exidx) + SIZEOF (.ARM.exidx)) {
+
+	.textram BLOCK(8): {
 		__data_start__ = .;
+		__text_ram_start__ = .;
+		*(.ramtext)
+		__text_ram_end = .;
+	} >ram AT>rom
+
+	/* Data -- relocated to RAM, but written to ROM
+	 */
+	.data : {
 		*(.data)	/* initialized data */
 		__data_end__ = .;
-		__bss_start__ = .;
-	} >ram
+	} >ram AT>rom
+
 
 	.bss : {
+		__bss_start__ = .;
 		*(.bss)
 		*(COMMON)
 		__bss_end__ = .;