X-Git-Url: https://git.gag.com/?p=fw%2Faltos;a=blobdiff_plain;f=src%2Fstm-demo%2Fao_pins.h;h=233537dffdcb765d9de35033c62ad11adc2b8a04;hp=8d7ed76bb023476f494774b4b7b4dc2185f6a521;hb=1085ec5d57e0ed5d132f2bbdac1a0b6a32c0ab4a;hpb=6da2f5846f2d28ea1f09f60ef2cc3f68113ac62a diff --git a/src/stm-demo/ao_pins.h b/src/stm-demo/ao_pins.h index 8d7ed76b..233537df 100644 --- a/src/stm-demo/ao_pins.h +++ b/src/stm-demo/ao_pins.h @@ -3,7 +3,8 @@ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of @@ -18,24 +19,67 @@ #ifndef _AO_PINS_H_ #define _AO_PINS_H_ -#define HAS_SERIAL_1 1 +/* Bridge SB17 on the board and use the MCO from the other chip */ +#define AO_HSE 8000000 +#define AO_HSE_BYPASS 1 + +/* PLLVCO = 96MHz (so that USB will work) */ +#define AO_PLLMUL 12 +#define AO_RCC_CFGR_PLLMUL (STM_RCC_CFGR_PLLMUL_12) + +/* SYSCLK = 32MHz */ +#define AO_PLLDIV 3 +#define AO_RCC_CFGR_PLLDIV (STM_RCC_CFGR_PLLDIV_3) + +/* HCLK = 32MHZ (CPU clock) */ +#define AO_AHB_PRESCALER 1 +#define AO_RCC_CFGR_HPRE_DIV STM_RCC_CFGR_HPRE_DIV_1 + +/* Run APB1 at HCLK/1 */ +#define AO_APB1_PRESCALER 1 +#define AO_RCC_CFGR_PPRE1_DIV STM_RCC_CFGR_PPRE2_DIV_1 + +/* Run APB2 at HCLK/1 */ +#define AO_APB2_PRESCALER 1 +#define AO_RCC_CFGR_PPRE2_DIV STM_RCC_CFGR_PPRE2_DIV_1 + +#define HAS_SERIAL_1 0 +#define USE_SERIAL_1_STDIN 0 +#define SERIAL_1_PB6_PB7 1 +#define SERIAL_1_PA9_PA10 0 + #define HAS_SERIAL_2 0 +#define USE_SERIAL_2_STDIN 0 +#define SERIAL_2_PA2_PA3 0 +#define SERIAL_2_PD5_PD6 1 + #define HAS_SERIAL_3 0 -#define USE_SERIAL_STDIN 1 -#define HAS_USB 0 +#define USE_SERIAL_3_STDIN 1 +#define SERIAL_3_PB10_PB11 0 +#define SERIAL_3_PC10_PC11 0 +#define SERIAL_3_PD8_PD9 1 + +#define HAS_SPI_1 1 +#define SPI_1_PB3_PB4_PB5 1 +#define SPI_1_OSPEEDR STM_OSPEEDR_10MHz + +#define HAS_SPI_2 0 + +#define HAS_USB 1 #define HAS_BEEP 0 #define PACKET_HAS_SLAVE 0 -#define LOW_LEVEL_DEBUG 1 +#define AO_BOOT_CHAIN 1 + +#define LOW_LEVEL_DEBUG 0 #define LED_PORT_ENABLE STM_RCC_AHBENR_GPIOBEN -#define LED_PORT stm_gpiob +#define LED_PORT (&stm_gpiob) #define LED_PIN_GREEN 7 #define LED_PIN_BLUE 6 #define AO_LED_GREEN (1 << LED_PIN_GREEN) #define AO_LED_BLUE (1 << LED_PIN_BLUE) - -#define AO_LED_RED AO_LED_BLUE /* a patent lie */ +#define AO_LED_PANIC AO_LED_BLUE #define LEDS_AVAILABLE (AO_LED_BLUE | AO_LED_GREEN) @@ -94,4 +138,66 @@ #define AO_LCD_28_ON_C 1 +#define AO_LCD_DUTY STM_LCD_CR_DUTY_STATIC + +#define HAS_ADC 1 + +#define AO_ADC_RING 32 + +struct ao_adc { + uint16_t tick; + int16_t idd; + int16_t temp; + int16_t vref; +}; + +#define AO_ADC_IDD 4 +#define AO_ADC_PIN0_PORT (&stm_gpioa) +#define AO_ADC_PIN0_PIN 4 + +#define AO_ADC_RCC_AHBENR ((1 << STM_RCC_AHBENR_GPIOAEN)) +#define AO_ADC_TEMP 16 +#define AO_ADC_VREF 17 + +#define HAS_ADC_TEMP 1 + +#define AO_DATA_RING 32 +#define AO_NUM_ADC 3 + +#define AO_ADC_SQ1 AO_ADC_IDD +#define AO_ADC_SQ2 AO_ADC_TEMP +#define AO_ADC_SQ3 AO_ADC_VREF + +#define HAS_I2C_1 1 +#define I2C_1_PB6_PB7 0 +#define I2C_1_PB8_PB9 1 + +#define HAS_I2C_2 0 +#define I2C_2_PB10_PB11 0 + +#define AO_EVENT 1 + +#define AO_QUADRATURE_COUNT 2 +#define AO_QUADRATURE_MODE AO_EXTI_MODE_PULL_UP + +#define AO_QUADRATURE_0_PORT &stm_gpioc +#define AO_QUADRATURE_0_A 1 +#define AO_QUADRATURE_0_B 0 + +#define AO_QUADRATURE_1_PORT &stm_gpioc +#define AO_QUADRATURE_1_A 3 +#define AO_QUADRATURE_1_B 2 + +#define AO_BUTTON_COUNT 2 +#define AO_BUTTON_MODE AO_EXTI_MODE_PULL_UP + +#define AO_BUTTON_0_PORT &stm_gpioc +#define AO_BUTTON_0 6 + +#define AO_BUTTON_1_PORT &stm_gpioc +#define AO_BUTTON_1 7 + +#define AO_TICK_TYPE uint32_t +#define AO_TICK_SIGNED int32_t + #endif /* _AO_PINS_H_ */