X-Git-Url: https://git.gag.com/?p=fw%2Faltos;a=blobdiff_plain;f=src%2Flpc%2Flpc.h;h=1d02e2e29dc2f71762d016928705493ea7c4af98;hp=f13ec61529860876c0b5217fa90e92a38dc4ba89;hb=873f511173c637016b5e173813bd03c1725797bb;hpb=23f11b188fc6aacd29e7f01a7d8a40853b7655df diff --git a/src/lpc/lpc.h b/src/lpc/lpc.h index f13ec615..1d02e2e2 100644 --- a/src/lpc/lpc.h +++ b/src/lpc/lpc.h @@ -3,7 +3,8 @@ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of @@ -120,7 +121,7 @@ extern struct lpc_ioconf lpc_ioconf; #define LPC_IOCONF_FUNC_PIO0_3 0 #define LPC_IOCONF_FUNC_USB_VBUS 1 -/* PIO0_4 +/* PIO0_4 */ #define LPC_IOCONF_FUNC_PIO0_4 0 #define LPC_IOCONF_FUNC_I2C_SCL 1 @@ -411,7 +412,7 @@ struct lpc_scb { vuint32_t mainclksel; /* 0x70 */ vuint32_t mainclkuen; vuint32_t sysahbclkdiv; - uint32_t r7c; + uint32_t r7c; vuint32_t sysahbclkctrl; /* 0x80 */ uint32_t r84[3]; @@ -429,14 +430,14 @@ struct lpc_scb { uint32_t rcc; uint32_t rd0[4]; - + vuint32_t clkoutsel; /* 0xe0 */ vuint32_t clkoutuen; vuint32_t clkoutdiv; uint32_t rec; - + uint32_t rf0[4]; /* 0xf0 */ - + vuint32_t pioporcap0; /* 0x100 */ vuint32_t pioporcap1; uint32_t r102[2]; @@ -445,7 +446,7 @@ struct lpc_scb { uint32_t r120[4]; /* 0x120 */ uint32_t r130[4]; /* 0x130 */ uint32_t r140[4]; /* 0x140 */ - + vuint32_t bodctrl; /* 0x150 */ vuint32_t systckcal; uint32_t r158[2]; @@ -479,13 +480,18 @@ struct lpc_scb { uint32_t r240[12 * 4]; /* 0x240 */ uint32_t r300[15 * 4]; /* 0x300 */ - + uint32_t r3f0; /* 0x3f0 */ vuint32_t device_id; }; extern struct lpc_scb lpc_scb; +#define LPC_SCB_SYSMEMREMAP_MAP 0 +# define LPC_SCB_SYSMEMREMAP_MAP_BOOT_LOADER 0 +# define LPC_SCB_SYSMEMREMAP_MAP_RAM 1 +# define LPC_SCB_SYSMEMREMAP_MAP_FLASH 2 + #define LPC_SCB_PRESETCTRL_SSP0_RST_N 0 #define LPC_SCB_PRESETCTRL_I2C_RST_N 1 #define LPC_SCB_PRESETCTRL_SSP1_RST_N 2 @@ -675,7 +681,7 @@ struct lpc_gpio { vuint32_t word[0x40]; /* 0x1000 */ uint8_t r1100[0x2000 - 0x1100]; - + vuint32_t dir[2]; /* 0x2000 */ uint8_t r2008[0x2080 - 0x2008]; @@ -1014,12 +1020,12 @@ extern struct lpc_nvic lpc_nvic; static inline void lpc_nvic_set_enable(int irq) { - lpc_nvic.iser |= (1 << irq); + lpc_nvic.iser = (1 << irq); } static inline void lpc_nvic_clear_enable(int irq) { - lpc_nvic.icer |= (1 << irq); + lpc_nvic.icer = (1 << irq); } static inline int @@ -1027,7 +1033,7 @@ lpc_nvic_enabled(int irq) { return (lpc_nvic.iser >> irq) & 1; } - + static inline void lpc_nvic_set_pending(int irq) { lpc_nvic.ispr = (1 << irq); @@ -1196,18 +1202,118 @@ extern struct lpc_adc lpc_adc; #define LPC_ADC_STAT_OVERRUN 8 #define LPC_ADC_STAT_ADINT 16 +struct lpc_ct16b { + vuint32_t ir; /* 0x00 */ + vuint32_t tcr; + vuint32_t tc; + vuint32_t pr; + + vuint32_t pc; /* 0x10 */ + vuint32_t mcr; + vuint32_t mr[4]; /* 0x18 */ + vuint32_t ccr; /* 0x28 */ + vuint32_t cr0; + + vuint32_t cr1_0; /* 0x30 (only for ct16b0 */ + vuint32_t cr1_1; /* 0x34 (only for ct16b1 */ + uint32_t r38; + vuint32_t emr; + + uint8_t r40[0x70 - 0x40]; + + vuint32_t ctcr; /* 0x70 */ + vuint32_t pwmc; +}; + +extern struct lpc_ct16b lpc_ct16b0, lpc_ct16b1; + +#define lpc_ct16b0 (*(struct lpc_ct16b *) 0x4000c000) +#define lpc_ct16b1 (*(struct lpc_ct16b *) 0x40010000) + +#define LPC_CT16B_IR_MR0INT 0 +#define LPC_CT16B_IR_MR1INT 1 +#define LPC_CT16B_IR_MR2INT 2 +#define LPC_CT16B_IR_MR3INT 3 +#define LPC_CT16B_IR_CR0INT 4 +#define LPC_CT16B0_IR_CR1INT 6 +#define LPC_CT16B1_IR_CR1INT 5 + +#define LPC_CT16B_TCR_CEN 0 +#define LPC_CT16B_TCR_CRST 1 + +#define LPC_CT16B_MCR_MR0I 0 +#define LPC_CT16B_MCR_MR0R 1 +#define LPC_CT16B_MCR_MR0S 2 +#define LPC_CT16B_MCR_MR1I 3 +#define LPC_CT16B_MCR_MR1R 4 +#define LPC_CT16B_MCR_MR1S 5 +#define LPC_CT16B_MCR_MR2I 6 +#define LPC_CT16B_MCR_MR2R 7 +#define LPC_CT16B_MCR_MR2S 8 +#define LPC_CT16B_MCR_MR3I 9 +#define LPC_CT16B_MCR_MR3R 10 +#define LPC_CT16B_MCR_MR3S 11 + +#define LPC_CT16B_CCR_CAP0RE 0 +#define LPC_CT16B_CCR_CAP0FE 1 +#define LPC_CT16B_CCR_CAP0I 2 +#define LPC_CT16B0_CCR_CAP1RE 6 +#define LPC_CT16B0_CCR_CAP1FE 7 +#define LPC_CT16B0_CCR_CAP1I 8 +#define LPC_CT16B1_CCR_CAP1RE 3 +#define LPC_CT16B1_CCR_CAP1FE 4 +#define LPC_CT16B1_CCR_CAP1I 5 + +#define LPC_CT16B_EMR_EM0 0 +#define LPC_CT16B_EMR_EM1 1 +#define LPC_CT16B_EMR_EM2 2 +#define LPC_CT16B_EMR_EM3 3 +#define LPC_CT16B_EMR_EMC0 4 +#define LPC_CT16B_EMR_EMC1 6 +#define LPC_CT16B_EMR_EMC2 8 +#define LPC_CT16B_EMR_EMC3 10 + +#define LPC_CT16B_EMR_EMC_NOTHING 0 +#define LPC_CT16B_EMR_EMC_CLEAR 1 +#define LPC_CT16B_EMR_EMC_SET 2 +#define LPC_CT16B_EMR_EMC_TOGGLE 3 + +#define LPC_CT16B_CCR_CTM 0 +#define LPC_CT16B_CCR_CTM_TIMER 0 +#define LPC_CT16B_CCR_CTM_COUNTER_RISING 1 +#define LPC_CT16B_CCR_CTM_COUNTER_FALLING 2 +#define LPC_CT16B_CCR_CTM_COUNTER_BOTH 3 +#define LPC_CT16B_CCR_CIS 2 +#define LPC_CT16B_CCR_CIS_CAP0 0 +#define LPC_CT16B0_CCR_CIS_CAP1 2 +#define LPC_CT16B1_CCR_CIS_CAP1 1 +#define LPC_CT16B_CCR_ENCC 4 +#define LPC_CT16B_CCR_SELCC 5 +#define LPC_CT16B_CCR_SELCC_RISING_CAP0 0 +#define LPC_CT16B_CCR_SELCC_FALLING_CAP0 1 +#define LPC_CT16B0_CCR_SELCC_RISING_CAP1 4 +#define LPC_CT16B0_CCR_SELCC_FALLING_CAP1 5 +#define LPC_CT16B1_CCR_SELCC_RISING_CAP1 2 +#define LPC_CT16B1_CCR_SELCC_FALLING_CAP1 3 +#define LPC_CT16B_CCR_ + +#define LPC_CT16B_PWMC_PWMEN0 0 +#define LPC_CT16B_PWMC_PWMEN1 1 +#define LPC_CT16B_PWMC_PWMEN2 2 +#define LPC_CT16B_PWMC_PWMEN3 3 + struct lpc_ct32b { vuint32_t ir; /* 0x00 */ vuint32_t tcr; vuint32_t tc; vuint32_t pr; - + vuint32_t pc; /* 0x10 */ vuint32_t mcr; vuint32_t mr[4]; /* 0x18 */ vuint32_t ccr; /* 0x28 */ vuint32_t cr0; - + vuint32_t cr1_0; /* 0x30 (only for ct32b0 */ vuint32_t cr1_1; /* 0x34 (only for ct32b1 */ uint32_t r38; @@ -1241,4 +1347,48 @@ extern struct lpc_ct32b lpc_ct32b0, lpc_ct32b1; #define LPC_CT32B_EMR_EMC_SET 2 #define LPC_CT32B_EMR_EMC_TOGGLE 3 +#define isr_decl(name) \ + void __attribute__ ((weak)) lpc_ ## name ## _isr(void); + +isr_decl(nmi) +isr_decl(hardfault) +isr_decl(memmanage) +isr_decl(busfault) +isr_decl(usagefault) +isr_decl(svc) +isr_decl(debugmon) +isr_decl(pendsv) +isr_decl(systick) + +isr_decl(pin_int0) /* IRQ0 */ +isr_decl(pin_int1) +isr_decl(pin_int2) +isr_decl(pin_int3) +isr_decl(pin_int4) /* IRQ4 */ +isr_decl(pin_int5) +isr_decl(pin_int6) +isr_decl(pin_int7) + +isr_decl(gint0) /* IRQ8 */ +isr_decl(gint1) +isr_decl(ssp1) +isr_decl(i2c) + +isr_decl(ct16b0) /* IRQ16 */ +isr_decl(ct16b1) +isr_decl(ct32b0) +isr_decl(ct32b1) +isr_decl(ssp0) /* IRQ20 */ +isr_decl(usart) +isr_decl(usb_irq) +isr_decl(usb_fiq) + +isr_decl(adc) /* IRQ24 */ +isr_decl(wwdt) +isr_decl(bod) +isr_decl(flash) + +isr_decl(usb_wakeup) + + #endif /* _LPC_H_ */