X-Git-Url: https://git.gag.com/?p=fw%2Faltos;a=blobdiff_plain;f=src%2Flpc%2Faltos.ld;h=028ad775d28ef579a3f44e99c9d25422f4874001;hp=4d6f35a82a32b83574fffa1730dea574d853d9c4;hb=0686a7b8aec524d81bda4c572549a3a068ce0eed;hpb=6343bd774f542a4f915cf1fca2053d03e93bf2c3

diff --git a/src/lpc/altos.ld b/src/lpc/altos.ld
index 4d6f35a8..028ad775 100644
--- a/src/lpc/altos.ld
+++ b/src/lpc/altos.ld
@@ -3,7 +3,8 @@
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
  *
  * This program is distributed in the hope that it will be useful, but
  * WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -16,7 +17,7 @@
  */
 
 MEMORY {
-	rom (rx) : ORIGIN = 0x00000000, LENGTH = 32K
+	rom (rx) : ORIGIN = 0x00001000, LENGTH = 28K
 	ram (!w) : ORIGIN = 0x10000000, LENGTH = 4K - 128
 	usb (!x) : ORIGIN = 0x20004000 + 2K - 256, LENGTH = 256
 	stack (!w) : ORIGIN = 0x10000000 + 4K - 128, LENGTH = 128
@@ -31,11 +32,15 @@ SECTIONS {
 	 * Rom contents
 	 */
 
-	.text ORIGIN(rom) : {
-		__text_start__ = .;
+	.interrupt ORIGIN(ram) : AT (ORIGIN(rom)) {
+		__interrupt_start__ = .;
+		__interrupt_rom__ = ORIGIN(rom);
 		*(.interrupt)	/* Interrupt vectors */
+		__interrupt_end__ = .;
+	} > ram
 
-		. = ORIGIN(rom) + 0x100;
+	.text ORIGIN(rom) + 0x100 : {
+		__text_start__ = .;
 
 		ao_romconfig.o(.romconfig*)
 		ao_product.o(.romconfig*)
@@ -50,16 +55,28 @@ SECTIONS {
 		__text_end__ = .;
 	} > rom
 
+	/* Boot data which must live at the start of ram so that
+	 * the application and bootloader share the same addresses.
+	 * This must be all uninitialized data
+	 */
+	.boot : {
+		__boot_start__ = .;
+		*(.boot)
+		. = ALIGN(4);
+		__boot_end__ = .;
+	} >ram
+
 	/* Data -- relocated to RAM, but written to ROM
 	 */
-	.data ORIGIN(ram) : AT (ADDR(.ARM.exidx) + SIZEOF (.ARM.exidx)) {
-		__data_start__ = .;
+	.data : AT (ADDR(.ARM.exidx) + SIZEOF (.ARM.exidx)) {
+		_start__ = .;
 		*(.data)	/* initialized data */
-		__data_end__ = .;
+		_end__ = .;
 		__bss_start__ = .;
 	} >ram
 
 	.bss : {
+		__bss_start__ = .;
 		*(.bss)
 		*(COMMON)
 		__bss_end__ = .;