X-Git-Url: https://git.gag.com/?p=fw%2Faltos;a=blobdiff_plain;f=src%2Fdrivers%2Fao_cc1200_CC1200.h;h=f0214c2a25df1f8f80b244290baa59b92ede99e3;hp=8d5c3b2ae54223ff9eddd3c893749974987533c6;hb=135abf0e7c5ceb5738a0b5f68fe2be4b7abdae5e;hpb=4a3fe79266a77f8fc001117f49db1d2f14f9e6b6 diff --git a/src/drivers/ao_cc1200_CC1200.h b/src/drivers/ao_cc1200_CC1200.h index 8d5c3b2a..f0214c2a 100644 --- a/src/drivers/ao_cc1200_CC1200.h +++ b/src/drivers/ao_cc1200_CC1200.h @@ -7,8 +7,24 @@ * ***************************************************************/ +/* + * Values affecting receive sensitivity: + * + * + * PQT - sets how good the preamble needs to look before + * we start looking for a sync word + * SYNC_THR - sets how good the sync needs to be before we + * start decoding a packet + */ + +/* Values depending on data rate + * + * DCFILT_BW_SETTLE + * DCFILT_BW + */ + #ifndef AO_CC1200_AGC_GAIN_ADJUST -#define AO_CC1200_AGC_GAIN_ADJUST -81 +#define AO_CC1200_AGC_GAIN_ADJUST -94 #endif CC1200_IOCFG2, 0x06, /* GPIO2 IO Pin Configuration */ @@ -18,7 +34,7 @@ CC1200_SYNC0, 0x91, /* Sync Word Configuration [7:0] */ CC1200_SYNC_CFG1, /* Sync Word Detection Configuration Reg. 1 */ ((CC1200_SYNC_CFG1_SYNC_MODE_16_BITS << CC1200_SYNC_CFG1_SYNC_MODE) | - (0xc << CC1200_SYNC_CFG1_SYNC_THR)), + (11 << CC1200_SYNC_CFG1_SYNC_THR)), CC1200_SYNC_CFG0, /* Sync Word Detection Configuration Reg. 0 */ ((1 << CC1200_SYNC_CFG0_AUTO_CLEAR) | (0 << CC1200_SYNC_CFG0_RX_CONFIG_LIMITATION) | @@ -29,8 +45,8 @@ CC1200_DCFILT_CFG, 0x5d, /* Digital DC Removal Configuration */ CC1200_PREAMBLE_CFG0, /* Preamble Detection Configuration Reg. 0 */ ((1 << CC1200_PREAMBLE_CFG0_PQT_EN) | - (CC1200_PREAMBLE_CFG0_PQT_VALID_TIMEOUT_24 << CC1200_PREAMBLE_CFG0_PQT_VALID_TIMEOUT) | - (2 << CC1200_PREAMBLE_CFG0_PQT)), + (CC1200_PREAMBLE_CFG0_PQT_VALID_TIMEOUT_11 << CC1200_PREAMBLE_CFG0_PQT_VALID_TIMEOUT) | + (15 << CC1200_PREAMBLE_CFG0_PQT)), CC1200_IQIC, 0xcb, /* Digital Image Channel Compensation Configuration */ CC1200_CHAN_BW, 0x11, /* Channel Filter Configuration */ CC1200_MDMCFG1, 0x40, /* General Modem Parameter Configuration Reg. 1 */ @@ -44,7 +60,7 @@ CC1200_AGC_CFG0, 0x87, /* Automatic Gain Control Configuration Reg. 0 */ CC1200_FIFO_CFG, 0x40, /* FIFO Configuration */ CC1200_SETTLING_CFG, /* Frequency Synthesizer Calibration and Settling Configuration */ - ((CC1200_SETTLING_CFG_FS_AUTOCAL_IDLE_TO_ON << CC1200_SETTLING_CFG_FS_AUTOCAL) | + ((CC1200_SETTLING_CFG_FS_AUTOCAL_EVERY_4TH_TIME << CC1200_SETTLING_CFG_FS_AUTOCAL) | (CC1200_SETTLING_CFG_LOCK_TIME_75_30 << CC1200_SETTLING_CFG_LOCK_TIME) | (CC1200_SETTLING_CFG_FSREG_TIME_60 << CC1200_SETTLING_CFG_FSREG_TIME)), CC1200_FS_CFG, /* Frequency Synthesizer Configuration */ @@ -85,6 +101,15 @@ (CC1200_MDMCFG2_SYMBOL_MAP_CFG_MODE_0 << CC1200_MDMCFG2_SYMBOL_MAP_CFG) | (CC1200_MDMCFG2_UPSAMPLER_P_8 << CC1200_MDMCFG2_UPSAMPLER_P) | (0 << CC1200_MDMCFG2_CFM_DATA_EN)), + CC1200_MDMCFG0, /* General Modem Parameter Configuration Reg. 0 */ + ((0 << CC1200_MDMCFG0_TRANSPARENT_MODE_EN) | + (0 << CC1200_MDMCFG0_TRANSPARENT_INTFACT) | + (0 << CC1200_MDMCFG0_DATA_FILTER_EN) | + (1 << CC1200_MDMCFG0_VITERBI_EN)), + CC1200_TOC_CFG, /* Timing Offset Correction Configuration */ + ((CC1200_TOC_CFG_TOC_LIMIT_2 << CC1200_TOC_CFG_TOC_LIMIT) | + (CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN_6_16 << CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN)| + (CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN_2_32 << CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN)), CC1200_FREQ2, 0x6c, /* Frequency Configuration [23:16] */ CC1200_FREQ1, 0xa3, /* Frequency Configuration [15:8] */ CC1200_FREQ0, 0x33, /* Frequency Configuration [7:0] */