X-Git-Url: https://git.gag.com/?p=fw%2Faltos;a=blobdiff_plain;f=src%2Favr%2Fao_timer.c;h=ff6a829afde0fca9887b8f3e6facfcc98a6769dd;hp=1e374c75a4c99fac30e8a28ff229b8a6c449633b;hb=0686a7b8aec524d81bda4c572549a3a068ce0eed;hpb=8125acc030574afed6f23aa8aa302d9c768bb04e

diff --git a/src/avr/ao_timer.c b/src/avr/ao_timer.c
index 1e374c75..ff6a829a 100644
--- a/src/avr/ao_timer.c
+++ b/src/avr/ao_timer.c
@@ -3,7 +3,8 @@
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
  *
  * This program is distributed in the hope that it will be useful, but
  * WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -17,7 +18,7 @@
 
 #include "ao.h"
 
-static volatile __data uint16_t ao_tick_count;
+volatile uint16_t ao_tick_count;
 
 uint16_t ao_time(void)
 {
@@ -28,21 +29,12 @@ uint16_t ao_time(void)
 	return v;
 }
 
-static __xdata uint8_t ao_forever;
-
-void
-ao_delay(uint16_t ticks)
-{
-	ao_alarm(ticks);
-	ao_sleep(&ao_forever);
-}
-
 #define T1_CLOCK_DIVISOR	8	/* 24e6/8 = 3e6 */
 #define T1_SAMPLE_TIME		30000	/* 3e6/30000 = 100 */
 
 #if HAS_ADC
-volatile __data uint8_t	ao_adc_interval = 1;
-volatile __data uint8_t	ao_adc_count;
+volatile uint8_t	ao_adc_interval = 1;
+volatile uint8_t	ao_adc_count;
 #endif
 
 void
@@ -61,7 +53,7 @@ ISR(TIMER1_COMPA_vect)
 
 #if HAS_ADC
 void
-ao_timer_set_adc_interval(uint8_t interval) __critical
+ao_timer_set_adc_interval(uint8_t interval) 
 {
 	ao_adc_interval = interval;
 	ao_adc_count = 0;
@@ -87,61 +79,3 @@ ao_timer_init(void)
 
 	TIMSK1 = (1 << OCIE1A);		/* Interrupt on compare match */
 }
-
-/*
- * AltOS always cranks the clock to the max frequency
- */
-void
-ao_clock_init(void)
-{
-	/* disable RC clock */
-	CLKSEL0 &= ~(1 << RCE);
-
-	/* Disable PLL */
-	PLLCSR &= ~(1 << PLLE);
-
-	/* Enable external clock */
-	CLKSEL0 |= (1 << EXTE);
-
-	/* wait for external clock to be ready */
-	while ((CLKSTA & (1 << EXTON)) == 0)
-		;
-
-	/* select external clock */
-	CLKSEL0 |= (1 << CLKS);
-
-	/* Disable the clock prescaler */
-	cli();
-	CLKPR = (1 << CLKPCE);
-
-	/* Always run the system clock at 8MHz */
-#if AVR_CLOCK > 12000000UL
-	CLKPR = 1;
-#else
-	CLKPR = 0;
-#endif
-	sei();
-
-	/* Set up the PLL to use the crystal */
-
-	/* Use primary system clock as PLL source */
-	PLLFRQ = ((0 << PINMUX) |	/* Use primary clock */
-		  (0 << PLLUSB) |	/* No divide by 2 for USB */
-		  (0 << PLLTM0) |	/* Disable high speed timer */
-		  (0x4 << PDIV0));	/* 48MHz PLL clock */
-
-	/* Set the frequency of the crystal */
-#if AVR_CLOCK > 12000000UL
-	PLLCSR |= (1 << PINDIV);	/* For 16MHz crystal on Teensy board */
-#else
-	PLLCSR &= ~(1 << PINDIV);	/* For 8MHz crystal on TeleScience board */
-#endif
-
-	/* Enable the PLL */
-	PLLCSR |= (1 << PLLE);
-	while (!(PLLCSR & (1 << PLOCK)))
-		;
-
-	set_sleep_mode(SLEEP_MODE_IDLE);
-	sleep_enable();
-}