X-Git-Url: https://git.gag.com/?p=fw%2Faltos;a=blobdiff_plain;f=src%2Favr%2Fao_pwmin.c;h=84397357a7ee89ee4967b3300f0e2b49950cb62f;hp=edcb163641cea8a1aa28db542e787d4f9650f892;hb=3fe932206f40f4d6f83a4ef49e064109a7a3de92;hpb=49b1ff4c614d24977b33cd17b583acc87acff476 diff --git a/src/avr/ao_pwmin.c b/src/avr/ao_pwmin.c index edcb1636..84397357 100644 --- a/src/avr/ao_pwmin.c +++ b/src/avr/ao_pwmin.c @@ -25,27 +25,40 @@ * project payload developed at Challenger Middle School. */ -volatile __data uint16_t ao_tick3_count; +volatile __data uint16_t ao_icp3_count = 0; +volatile __data uint16_t ao_icp3_last = 0; + +uint16_t ao_icp3(void) +{ + uint16_t v; + ao_arch_critical( + v = ao_icp3_count; + ); + return v; +} static void ao_pwmin_display(void) __reentrant { - uint8_t lo = TCNT1L; - uint8_t hi = TCNT1H; - uint16_t value = (hi <<8) | lo; + /* display the most recent value */ + printf("icp 3: %5u\n", ao_icp3()); - uint8_t lo3 = TCNT3L; - uint8_t hi3 = TCNT3H; - uint16_t value3 = (hi3 <<8) | lo3; +} - /* now display the value we read */ - printf("timer 1: %5u %2x %2x\n", value, hi, lo); - printf("timer 3: %5u %2x %2x\n", value3, hi3, lo3); -} -ISR(TIMER3_COMPA_vect) +ISR(TIMER3_CAPT_vect) { - ++ao_tick3_count; + + uint8_t lo = ICR3L; + uint8_t hi = ICR3H; + uint16_t ao_icp3_this = (hi <<8) | lo; + + /* handling counter rollovers */ + if (ao_icp3_this >= ao_icp3_last) + ao_icp3_count = ao_icp3_this - ao_icp3_last; + else + ao_icp3_count = ao_icp3_this + (65536 - ao_icp3_last); + ao_icp3_last = ao_icp3_this; } __code struct ao_cmds ao_pwmin_cmds[] = { @@ -59,15 +72,15 @@ ao_pwmin_init(void) /* do hardware setup here */ TCCR3A = ((0 << WGM31) | /* normal mode, OCR3A */ (0 << WGM30)); /* normal mode, OCR3A */ - TCCR3B = ((0 << ICNC3) | /* no input capture noise canceler */ + TCCR3B = ((1 << ICNC3) | /* input capture noise canceler on */ (0 << ICES3) | /* input capture on falling edge (don't care) */ (0 << WGM33) | /* normal mode, OCR3A */ (0 << WGM32) | /* normal mode, OCR3A */ - (4 << CS30)); /* clk/256 from prescaler */ + (3 << CS30)); /* clk/64 from prescaler */ - OCR3A = 1250; /* 8MHz clock */ + - TIMSK3 = (1 << OCIE3A); /* Interrupt on compare match */ + TIMSK3 = (1 << ICIE3); /* Interrupt on input compare */ /* set the spike filter bit in the TCCR3B register */