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   1 /*
   2  * Copyright © 2016 Keith Packard <keithp@keithp.com>
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation, either version 2 of the License, or
   7  * (at your option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful, but
  10  * WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  12  * General Public License for more details.
  13  */
  14
  15 #include <ao.h>
  16 #include <ao_exti.h>
  17
  18 void
  19 ao_debug_out(char c)
  20 {
  21         if (c == '\n')
  22                 ao_debug_out('\r');
  23         while (!(stm_usart1.isr & (1 << STM_USART_ISR_TXE)));
  24         stm_usart1.tdr = c;
  25 }
  26
  27 static int
  28 _ao_usart_tx_start(struct ao_stm_usart *usart)
  29 {
  30         if (!ao_fifo_empty(usart->tx_fifo)) {
  31 #if HAS_SERIAL_SW_FLOW
  32                 if (usart->gpio_cts && ao_gpio_get(usart->gpio_cts, usart->pin_cts, foo) == 1) {
  33                         ao_exti_enable(usart->gpio_cts, usart->pin_cts);
  34                         return 0;
  35                 }
  36 #endif
  37                 if (usart->reg->isr & (1 << STM_USART_ISR_TXE))
  38                 {
  39                         usart->tx_running = 1;
  40                         usart->reg->cr1 |= (1 << STM_USART_CR1_TXEIE) | (1 << STM_USART_CR1_TCIE);
  41                         ao_fifo_remove(usart->tx_fifo, usart->reg->tdr);
  42                         ao_wakeup(&usart->tx_fifo);
  43                         return 1;
  44                 }
  45         }
  46         return 0;
  47 }
  48
  49 #if HAS_SERIAL_SW_FLOW
  50 static void
  51 _ao_usart_cts(struct ao_stm_usart *usart)
  52 {
  53         if (_ao_usart_tx_start(usart))
  54                 ao_exti_disable(usart->gpio_cts, usart->pin_cts);
  55 }
  56 #endif
  57
  58 static void
  59 _ao_usart_rx(struct ao_stm_usart *usart, int stdin)
  60 {
  61         if (usart->reg->isr & (1 << STM_USART_ISR_RXNE)) {
  62                 usart->reg->icr = (1 << STM_USART_ICR_ORECF);
  63                 if (!ao_fifo_full(usart->rx_fifo)) {
  64                         ao_fifo_insert(usart->rx_fifo, usart->reg->rdr);
  65                         ao_wakeup(&usart->rx_fifo);
  66                         if (stdin)
  67                                 ao_wakeup(&ao_stdin_ready);
  68 #if HAS_SERIAL_SW_FLOW
  69                         /* If the fifo is nearly full, turn off RTS and wait
  70                          * for it to drain a bunch
  71                          */
  72                         if (usart->gpio_rts && ao_fifo_mostly(usart->rx_fifo)) {
  73                                 ao_gpio_set(usart->gpio_rts, usart->pin_rts, usart->pin_rts, 1);
  74                                 usart->rts = 0;
  75                         }
  76 #endif
  77                 } else {
  78                         usart->reg->cr1 &= ~(1 << STM_USART_CR1_RXNEIE);
  79                 }
  80         }
  81 }
  82
  83 static void
  84 ao_usart_isr(struct ao_stm_usart *usart, int stdin)
  85 {
  86         _ao_usart_rx(usart, stdin);
  87
  88         if (!_ao_usart_tx_start(usart))
  89                 usart->reg->cr1 &= ~(1<< STM_USART_CR1_TXEIE);
  90
  91         if (usart->reg->isr & (1 << STM_USART_ISR_TC)) {
  92                 usart->tx_running = 0;
  93                 usart->reg->cr1 &= ~(1 << STM_USART_CR1_TCIE);
  94                 if (usart->draining) {
  95                         usart->draining = 0;
  96                         ao_wakeup(&usart->tx_fifo);
  97                 }
  98         }
  99 }
 100
 101 static int
 102 _ao_usart_pollchar(struct ao_stm_usart *usart)
 103 {
 104         int     c;
 105
 106         if (ao_fifo_empty(usart->rx_fifo))
 107                 c = AO_READ_AGAIN;
 108         else {
 109                 uint8_t u;
 110                 ao_fifo_remove(usart->rx_fifo,u);
 111                 if ((usart->reg->cr1 & (1 << STM_USART_CR1_RXNEIE)) == 0) {
 112                         if (ao_fifo_barely(usart->rx_fifo))
 113                                 usart->reg->cr1 |= (1 << STM_USART_CR1_RXNEIE);
 114                 }
 115 #if HAS_SERIAL_SW_FLOW
 116                 /* If we've cleared RTS, check if there's space now and turn it back on */
 117                 if (usart->gpio_rts && usart->rts == 0 && ao_fifo_barely(usart->rx_fifo)) {
 118                         ao_gpio_set(usart->gpio_rts, usart->pin_rts, foo, 0);
 119                         usart->rts = 1;
 120                 }
 121 #endif
 122                 c = u;
 123         }
 124         return c;
 125 }
 126
 127 static char
 128 ao_usart_getchar(struct ao_stm_usart *usart)
 129 {
 130         int c;
 131         ao_arch_block_interrupts();
 132         while ((c = _ao_usart_pollchar(usart)) == AO_READ_AGAIN)
 133                 ao_sleep(&usart->rx_fifo);
 134         ao_arch_release_interrupts();
 135         return (char) c;
 136 }
 137
 138 static inline uint8_t
 139 _ao_usart_sleep_for(struct ao_stm_usart *usart, uint16_t timeout)
 140 {
 141         return ao_sleep_for(&usart->rx_fifo, timeout);
 142 }
 143
 144 static void
 145 ao_usart_putchar(struct ao_stm_usart *usart, char c)
 146 {
 147         ao_arch_block_interrupts();
 148         while (ao_fifo_full(usart->tx_fifo))
 149                 ao_sleep(&usart->tx_fifo);
 150         ao_fifo_insert(usart->tx_fifo, c);
 151         _ao_usart_tx_start(usart);
 152         ao_arch_release_interrupts();
 153 }
 154
 155 static void
 156 ao_usart_drain(struct ao_stm_usart *usart)
 157 {
 158         ao_arch_block_interrupts();
 159         while (!ao_fifo_empty(usart->tx_fifo) || usart->tx_running) {
 160                 usart->draining = 1;
 161                 ao_sleep(&usart->tx_fifo);
 162         }
 163         ao_arch_release_interrupts();
 164 }
 165
 166 static const struct {
 167         uint32_t brr;
 168 } ao_usart_speeds[] = {
 169         [AO_SERIAL_SPEED_4800] = {
 170                 AO_PCLK / 4800
 171         },
 172         [AO_SERIAL_SPEED_9600] = {
 173                 AO_PCLK / 9600
 174         },
 175         [AO_SERIAL_SPEED_19200] = {
 176                 AO_PCLK / 19200
 177         },
 178         [AO_SERIAL_SPEED_57600] = {
 179                 AO_PCLK / 57600
 180         },
 181         [AO_SERIAL_SPEED_115200] = {
 182                 AO_PCLK / 115200
 183         },
 184 };
 185
 186 static void
 187 ao_usart_set_speed(struct ao_stm_usart *usart, uint8_t speed)
 188 {
 189         if (speed > AO_SERIAL_SPEED_115200)
 190                 return;
 191         usart->reg->brr = ao_usart_speeds[speed].brr;
 192 }
 193
 194 static void
 195 ao_usart_init(struct ao_stm_usart *usart)
 196 {
 197         usart->reg->cr1 = ((0 << STM_USART_CR1_M1) |
 198                            (0 << STM_USART_CR1_EOBIE) |
 199                            (0 << STM_USART_CR1_RTOIE) |
 200                            (0 << STM_USART_CR1_DEAT) |
 201                            (0 << STM_USART_CR1_DEDT) |
 202                            (0 << STM_USART_CR1_OVER8) |
 203                            (0 << STM_USART_CR1_CMIE) |
 204                            (0 << STM_USART_CR1_MME) |
 205                            (0 << STM_USART_CR1_M0) |
 206                            (0 << STM_USART_CR1_WAKE) |
 207                            (0 << STM_USART_CR1_PCE) |
 208                            (0 << STM_USART_CR1_PS) |
 209                            (0 << STM_USART_CR1_PEIE) |
 210                            (0 << STM_USART_CR1_TXEIE) |
 211                            (0 << STM_USART_CR1_TCIE) |
 212                            (1 << STM_USART_CR1_RXNEIE) |
 213                            (0 << STM_USART_CR1_IDLEIE) |
 214                            (1 << STM_USART_CR1_TE) |
 215                            (1 << STM_USART_CR1_RE) |
 216                            (0 << STM_USART_CR1_UESM) |
 217                            (0 << STM_USART_CR1_UE));
 218
 219         usart->reg->cr2 = ((0 << STM_USART_CR2_ADD) |
 220                            (0 << STM_USART_CR2_RTOEN) |
 221                            (0 << STM_USART_CR2_ABRMOD) |
 222                            (0 << STM_USART_CR2_ABREN) |
 223                            (0 << STM_USART_CR2_MSBFIRST) |
 224                            (0 << STM_USART_CR2_DATAINV) |
 225                            (0 << STM_USART_CR2_TXINV) |
 226                            (0 << STM_USART_CR2_RXINV) |
 227                            (0 << STM_USART_CR2_SWAP) |
 228                            (0 << STM_USART_CR2_LINEN) |
 229                            (0 << STM_USART_CR2_STOP) |
 230                            (0 << STM_USART_CR2_CLKEN) |
 231                            (0 << STM_USART_CR2_CPOL) |
 232                            (0 << STM_USART_CR2_CHPA) |
 233                            (0 << STM_USART_CR2_LBCL) |
 234                            (0 << STM_USART_CR2_LBDIE) |
 235                            (0 << STM_USART_CR2_LBDL) |
 236                            (0 << STM_USART_CR2_ADDM7));
 237
 238         usart->reg->cr3 = ((0 << STM_USART_CR3_WUFIE) |
 239                            (0 << STM_USART_CR3_WUS) |
 240                            (0 << STM_USART_CR3_SCARCNT) |
 241                            (0 << STM_USART_CR3_DEP) |
 242                            (0 << STM_USART_CR3_DEM) |
 243                            (0 << STM_USART_CR3_DDRE) |
 244                            (0 << STM_USART_CR3_OVRDIS) |
 245                            (0 << STM_USART_CR3_ONEBIT) |
 246                            (0 << STM_USART_CR3_CTIIE) |
 247                            (0 << STM_USART_CR3_CTSE) |
 248                            (0 << STM_USART_CR3_RTSE) |
 249                            (0 << STM_USART_CR3_DMAT) |
 250                            (0 << STM_USART_CR3_DMAR) |
 251                            (0 << STM_USART_CR3_SCEN) |
 252                            (0 << STM_USART_CR3_NACK) |
 253                            (0 << STM_USART_CR3_HDSEL) |
 254                            (0 << STM_USART_CR3_IRLP) |
 255                            (0 << STM_USART_CR3_IREN) |
 256                            (0 << STM_USART_CR3_EIE));
 257
 258
 259         /* Pick a 9600 baud rate */
 260         ao_usart_set_speed(usart, AO_SERIAL_SPEED_9600);
 261
 262         /* Enable the usart */
 263         usart->reg->cr1 |= (1 << STM_USART_CR1_UE);
 264
 265 }
 266
 267 #if HAS_SERIAL_HW_FLOW
 268 static void
 269 ao_usart_set_flow(struct ao_stm_usart *usart)
 270 {
 271         usart->reg->cr3 |= ((1 << STM_USART_CR3_CTSE) |
 272                             (1 << STM_USART_CR3_RTSE));
 273 }
 274 #endif
 275
 276 #if HAS_SERIAL_1
 277
 278 struct ao_stm_usart ao_stm_usart1;
 279
 280 void stm_usart1_isr(void) { ao_usart_isr(&ao_stm_usart1, USE_SERIAL_1_STDIN); }
 281
 282 char
 283 ao_serial1_getchar(void)
 284 {
 285         return ao_usart_getchar(&ao_stm_usart1);
 286 }
 287
 288 void
 289 ao_serial1_putchar(char c)
 290 {
 291         ao_usart_putchar(&ao_stm_usart1, c);
 292 }
 293
 294 int
 295 _ao_serial1_pollchar(void)
 296 {
 297         return _ao_usart_pollchar(&ao_stm_usart1);
 298 }
 299
 300 uint8_t
 301 _ao_serial1_sleep_for(uint16_t timeout)
 302 {
 303         return _ao_usart_sleep_for(&ao_stm_usart1, timeout);
 304 }
 305
 306 void
 307 ao_serial1_drain(void)
 308 {
 309         ao_usart_drain(&ao_stm_usart1);
 310 }
 311
 312 void
 313 ao_serial1_set_speed(uint8_t speed)
 314 {
 315         ao_usart_drain(&ao_stm_usart1);
 316         ao_usart_set_speed(&ao_stm_usart1, speed);
 317 }
 318 #endif  /* HAS_SERIAL_1 */
 319
 320 #if HAS_SERIAL_2
 321
 322 struct ao_stm_usart ao_stm_usart2;
 323
 324 void stm_usart2_isr(void) { ao_usart_isr(&ao_stm_usart2, USE_SERIAL_2_STDIN); }
 325
 326 char
 327 ao_serial2_getchar(void)
 328 {
 329         return ao_usart_getchar(&ao_stm_usart2);
 330 }
 331
 332 void
 333 ao_serial2_putchar(char c)
 334 {
 335         ao_usart_putchar(&ao_stm_usart2, c);
 336 }
 337
 338 int
 339 _ao_serial2_pollchar(void)
 340 {
 341         return _ao_usart_pollchar(&ao_stm_usart2);
 342 }
 343
 344 uint8_t
 345 _ao_serial2_sleep_for(uint16_t timeout)
 346 {
 347         return _ao_usart_sleep_for(&ao_stm_usart2, timeout);
 348 }
 349
 350 void
 351 ao_serial2_drain(void)
 352 {
 353         ao_usart_drain(&ao_stm_usart2);
 354 }
 355
 356 void
 357 ao_serial2_set_speed(uint8_t speed)
 358 {
 359         ao_usart_drain(&ao_stm_usart2);
 360         ao_usart_set_speed(&ao_stm_usart2, speed);
 361 }
 362
 363 #if HAS_SERIAL_SW_FLOW
 364 void
 365 ao_serial2_cts(void)
 366 {
 367         _ao_usart_cts(&ao_stm_usart2);
 368 }
 369 #endif
 370
 371 #endif  /* HAS_SERIAL_2 */
 372
 373 #if HAS_SERIAL_SW_FLOW
 374 static void
 375 ao_serial_set_sw_rts_cts(struct ao_stm_usart *usart,
 376                          void (*isr)(void),
 377                          struct stm_gpio *port_rts,
 378                          int pin_rts,
 379                          struct stm_gpio *port_cts,
 380                          int pin_cts)
 381 {
 382         /* Pull RTS low to note that there's space in the FIFO
 383          */
 384         ao_enable_output(port_rts, pin_rts, foo, 0);
 385         usart->gpio_rts = port_rts;
 386         usart->pin_rts = pin_rts;
 387         usart->rts = 1;
 388
 389         ao_exti_setup(port_cts, pin_cts, AO_EXTI_MODE_FALLING|AO_EXTI_PRIORITY_MED, isr);
 390         usart->gpio_cts = port_cts;
 391         usart->pin_cts = pin_cts;
 392 }
 393 #endif
 394
 395 void
 396 ao_serial_init(void)
 397 {
 398 #if HAS_SERIAL_1
 399         /*
 400          *      TX      RX
 401          *      PA9     PA10
 402          *      PB6     PB7
 403          */
 404
 405 #if SERIAL_1_PA9_PA10
 406         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_IOPAEN);
 407
 408         stm_afr_set(&stm_gpioa, 9, STM_AFR_AF1);
 409         stm_afr_set(&stm_gpioa, 10, STM_AFR_AF1);
 410 #else
 411 #if SERIAL_1_PB6_PB7
 412         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_IOPBEN);
 413
 414         stm_afr_set(&stm_gpiob, 6, STM_AFR_AF0);
 415         stm_afr_set(&stm_gpiob, 7, STM_AFR_AF0);
 416 #else
 417 #error "No SERIAL_1 port configuration specified"
 418 #endif
 419 #endif
 420         /* Enable USART */
 421         stm_rcc.apb2enr |= (1 << STM_RCC_APB2ENR_USART1EN);
 422
 423         ao_stm_usart1.reg = &stm_usart1;
 424         ao_usart_init(&ao_stm_usart1);
 425
 426         stm_nvic_set_enable(STM_ISR_USART1_POS);
 427         stm_nvic_set_priority(STM_ISR_USART1_POS, 4);
 428 #if USE_SERIAL_1_STDIN && !DELAY_SERIAL_1_STDIN
 429         ao_add_stdio(_ao_serial1_pollchar,
 430                      ao_serial1_putchar,
 431                      NULL);
 432 #endif
 433 #endif
 434
 435 #if HAS_SERIAL_2
 436         /*
 437          *      TX      RX
 438          *      PA2     PA3
 439          *      PA14    PA15
 440          */
 441
 442 # if SERIAL_2_PA2_PA3
 443         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_IOPAEN);
 444
 445         stm_afr_set(&stm_gpioa, 2, STM_AFR_AF1);
 446         stm_afr_set(&stm_gpioa, 3, STM_AFR_AF1);
 447 #  if USE_SERIAL_2_FLOW
 448 #   if USE_SERIAL_2_SW_FLOW
 449         ao_serial_set_sw_rts_cts(&ao_stm_usart2,
 450                                  ao_serial2_cts,
 451                                  SERIAL_2_PORT_RTS,
 452                                  SERIAL_2_PIN_RTS,
 453                                  SERIAL_2_PORT_CTS,
 454                                  SERIAL_2_PIN_CTS);
 455 #   else
 456         stm_afr_set(&stm_gpioa, 0, STM_AFR_AF1);
 457         stm_afr_set(&stm_gpioa, 1, STM_AFR_AF1);
 458 #   endif
 459 #  endif
 460 # else
 461 #  if SERIAL_2_PA14_PA15
 462         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_IOPAEN);
 463
 464         stm_afr_set(&stm_gpioa, 14, STM_AFR_AF1);
 465         stm_afr_set(&stm_gpioa, 15, STM_AFR_AF1);
 466 #   if USE_SERIAL_2_FLOW
 467 #    error "Don't know how to set flowcontrol for serial 2 on PA14"
 468 #   endif
 469 #  else
 470 #   if SERIAL_2_PA2_PA15
 471         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_IOPAEN);
 472
 473         stm_afr_set(&stm_gpioa, 2, STM_AFR_AF1);
 474         stm_afr_set(&stm_gpioa, 15, STM_AFR_AF1);
 475 #    if USE_SERIAL_2_FLOW
 476 #     error "Don't know how to set flowcontrol for serial 2 on PA2_PA15"
 477 #    endif
 478 #   else
 479 #    error "No SERIAL_2 port configuration specified"
 480 #   endif
 481 #  endif
 482 # endif
 483         /* Enable USART */
 484         stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_USART2EN);
 485
 486         ao_stm_usart2.reg = &stm_usart2;
 487         ao_usart_init(&ao_stm_usart2);
 488 # if USE_SERIAL_2_FLOW && !USE_SERIAL_2_SW_FLOW
 489         ao_usart_set_flow(&ao_stm_usart2);
 490 # endif
 491
 492         stm_nvic_set_enable(STM_ISR_USART2_POS);
 493         stm_nvic_set_priority(STM_ISR_USART2_POS, 4);
 494 # if USE_SERIAL_2_STDIN && !DELAY_SERIAL_2_STDIN
 495         ao_add_stdio(_ao_serial2_pollchar,
 496                      ao_serial2_putchar,
 497                      NULL);
 498 # endif
 499 #endif
 500 }