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   1 /*
   2  * Copyright © 2018 Keith Packard <keithp@keithp.com>
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful, but
  10  * WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  12  * General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along
  15  * with this program; if not, write to the Free Software Foundation, Inc.,
  16  * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  17  */
  18
  19 #include <ao.h>
  20 #include <ao_exti.h>
  21
  22 static int
  23 _ao_usart_tx_start(struct ao_stm_usart *usart)
  24 {
  25         if (!ao_fifo_empty(usart->tx_fifo)) {
  26 #if HAS_SERIAL_SW_FLOW
  27                 if (usart->gpio_cts && ao_gpio_get(usart->gpio_cts, usart->pin_cts) == 1) {
  28                         ao_exti_enable(usart->gpio_cts, usart->pin_cts);
  29                         return 0;
  30                 }
  31 #endif
  32                 if (usart->reg->sr & (1 << STM_USART_SR_TXE))
  33                 {
  34                         usart->tx_running = 1;
  35                         usart->reg->cr1 |= (1 << STM_USART_CR1_TXEIE) | (1 << STM_USART_CR1_TCIE);
  36                         ao_fifo_remove(usart->tx_fifo, usart->reg->dr);
  37                         ao_wakeup(&usart->tx_fifo);
  38                         return 1;
  39                 }
  40         }
  41         return 0;
  42 }
  43
  44 #if HAS_SERIAL_SW_FLOW
  45 static void
  46 _ao_usart_cts(struct ao_stm_usart *usart)
  47 {
  48         if (_ao_usart_tx_start(usart))
  49                 ao_exti_disable(usart->gpio_cts, usart->pin_cts);
  50 }
  51 #endif
  52
  53 static void
  54 _ao_usart_rx(struct ao_stm_usart *usart, int is_stdin)
  55 {
  56         if (usart->reg->sr & (1 << STM_USART_SR_RXNE)) {
  57                 if (!ao_fifo_full(usart->rx_fifo)) {
  58                         ao_fifo_insert(usart->rx_fifo, usart->reg->dr);
  59                         ao_wakeup(&usart->rx_fifo);
  60                         if (is_stdin)
  61                                 ao_wakeup(&ao_stdin_ready);
  62 #if HAS_SERIAL_SW_FLOW
  63                         /* If the fifo is nearly full, turn off RTS and wait
  64                          * for it to drain a bunch
  65                          */
  66                         if (usart->gpio_rts && ao_fifo_mostly(usart->rx_fifo)) {
  67                                 ao_gpio_set(usart->gpio_rts, usart->pin_rts, 1);
  68                                 usart->rts = 0;
  69                         }
  70 #endif
  71                 } else {
  72                         usart->reg->cr1 &= ~(1 << STM_USART_CR1_RXNEIE);
  73                 }
  74         }
  75 }
  76
  77 static void
  78 ao_usart_isr(struct ao_stm_usart *usart, int is_stdin)
  79 {
  80         _ao_usart_rx(usart, is_stdin);
  81
  82         if (!_ao_usart_tx_start(usart))
  83                 usart->reg->cr1 &= ~(1<< STM_USART_CR1_TXEIE);
  84
  85         if (usart->reg->sr & (1 << STM_USART_SR_TC)) {
  86                 usart->tx_running = 0;
  87                 usart->reg->cr1 &= ~(1 << STM_USART_CR1_TCIE);
  88                 if (usart->draining) {
  89                         usart->draining = 0;
  90                         ao_wakeup(&usart->tx_fifo);
  91                 }
  92         }
  93 }
  94
  95 static int
  96 _ao_usart_pollchar(struct ao_stm_usart *usart)
  97 {
  98         int     c;
  99
 100         if (ao_fifo_empty(usart->rx_fifo))
 101                 c = AO_READ_AGAIN;
 102         else {
 103                 uint8_t u;
 104                 ao_fifo_remove(usart->rx_fifo,u);
 105                 if ((usart->reg->cr1 & (1 << STM_USART_CR1_RXNEIE)) == 0) {
 106                         if (ao_fifo_barely(usart->rx_fifo))
 107                                 usart->reg->cr1 |= (1 << STM_USART_CR1_RXNEIE);
 108                 }
 109 #if HAS_SERIAL_SW_FLOW
 110                 /* If we've cleared RTS, check if there's space now and turn it back on */
 111                 if (usart->gpio_rts && usart->rts == 0 && ao_fifo_barely(usart->rx_fifo)) {
 112                         ao_gpio_set(usart->gpio_rts, usart->pin_rts, 0);
 113                         usart->rts = 1;
 114                 }
 115 #endif
 116                 c = u;
 117         }
 118         return c;
 119 }
 120
 121 static char
 122 ao_usart_getchar(struct ao_stm_usart *usart)
 123 {
 124         int c;
 125         ao_arch_block_interrupts();
 126         while ((c = _ao_usart_pollchar(usart)) == AO_READ_AGAIN)
 127                 ao_sleep(&usart->rx_fifo);
 128         ao_arch_release_interrupts();
 129         return (char) c;
 130 }
 131
 132 static inline uint8_t
 133 _ao_usart_sleep_for(struct ao_stm_usart *usart, uint16_t timeout)
 134 {
 135         return ao_sleep_for(&usart->rx_fifo, timeout);
 136 }
 137
 138 static void
 139 ao_usart_putchar(struct ao_stm_usart *usart, char c)
 140 {
 141         ao_arch_block_interrupts();
 142         while (ao_fifo_full(usart->tx_fifo))
 143                 ao_sleep(&usart->tx_fifo);
 144         ao_fifo_insert(usart->tx_fifo, c);
 145         _ao_usart_tx_start(usart);
 146         ao_arch_release_interrupts();
 147 }
 148
 149 static void
 150 ao_usart_drain(struct ao_stm_usart *usart)
 151 {
 152         ao_arch_block_interrupts();
 153         while (!ao_fifo_empty(usart->tx_fifo) || usart->tx_running) {
 154                 usart->draining = 1;
 155                 ao_sleep(&usart->tx_fifo);
 156         }
 157         ao_arch_release_interrupts();
 158 }
 159
 160 static const struct {
 161         uint32_t brr;
 162 } ao_usart_speeds[] = {
 163         [AO_SERIAL_SPEED_4800] = {
 164                 AO_PCLK1 / 4800
 165         },
 166         [AO_SERIAL_SPEED_9600] = {
 167                 AO_PCLK1 / 9600
 168         },
 169         [AO_SERIAL_SPEED_19200] = {
 170                 AO_PCLK1 / 19200
 171         },
 172         [AO_SERIAL_SPEED_57600] = {
 173                 AO_PCLK1 / 57600
 174         },
 175         [AO_SERIAL_SPEED_115200] = {
 176                 AO_PCLK1 / 115200
 177         },
 178 };
 179
 180 static void
 181 ao_usart_set_speed(struct ao_stm_usart *usart, uint8_t speed)
 182 {
 183         if (speed > AO_SERIAL_SPEED_115200)
 184                 return;
 185         usart->reg->brr = ao_usart_speeds[speed].brr;
 186 }
 187
 188 static void
 189 ao_usart_init(struct ao_stm_usart *usart, int hw_flow)
 190 {
 191         usart->reg->cr1 = ((0 << STM_USART_CR1_OVER8) |
 192                           (1 << STM_USART_CR1_UE) |
 193                           (0 << STM_USART_CR1_M) |
 194                           (0 << STM_USART_CR1_WAKE) |
 195                           (0 << STM_USART_CR1_PCE) |
 196                           (0 << STM_USART_CR1_PS) |
 197                           (0 << STM_USART_CR1_PEIE) |
 198                           (0 << STM_USART_CR1_TXEIE) |
 199                           (0 << STM_USART_CR1_TCIE) |
 200                           (1 << STM_USART_CR1_RXNEIE) |
 201                           (0 << STM_USART_CR1_IDLEIE) |
 202                           (1 << STM_USART_CR1_TE) |
 203                           (1 << STM_USART_CR1_RE) |
 204                           (0 << STM_USART_CR1_RWU) |
 205                           (0 << STM_USART_CR1_SBK));
 206
 207         usart->reg->cr2 = ((0 << STM_USART_CR2_LINEN) |
 208                           (STM_USART_CR2_STOP_1 << STM_USART_CR2_STOP) |
 209                           (0 << STM_USART_CR2_CLKEN) |
 210                           (0 << STM_USART_CR2_CPOL) |
 211                           (0 << STM_USART_CR2_CPHA) |
 212                           (0 << STM_USART_CR2_LBCL) |
 213                           (0 << STM_USART_CR2_LBDIE) |
 214                           (0 << STM_USART_CR2_LBDL) |
 215                           (0 << STM_USART_CR2_ADD));
 216
 217         usart->reg->cr3 = ((0 << STM_USART_CR3_ONEBITE) |
 218                           (0 << STM_USART_CR3_CTSIE) |
 219                           (0 << STM_USART_CR3_CTSE) |
 220                           (0 << STM_USART_CR3_RTSE) |
 221                           (0 << STM_USART_CR3_DMAT) |
 222                           (0 << STM_USART_CR3_DMAR) |
 223                           (0 << STM_USART_CR3_SCEN) |
 224                           (0 << STM_USART_CR3_NACK) |
 225                           (0 << STM_USART_CR3_HDSEL) |
 226                           (0 << STM_USART_CR3_IRLP) |
 227                           (0 << STM_USART_CR3_IREN) |
 228                           (0 << STM_USART_CR3_EIE));
 229
 230         if (hw_flow)
 231                 usart->reg->cr3 |= ((1 << STM_USART_CR3_CTSE) |
 232                                     (1 << STM_USART_CR3_RTSE));
 233
 234         /* Pick a 9600 baud rate */
 235         ao_usart_set_speed(usart, AO_SERIAL_SPEED_9600);
 236 }
 237
 238 #if HAS_SERIAL_HW_FLOW
 239 static void
 240 ao_usart_set_flow(struct ao_stm_usart *usart)
 241 {
 242 }
 243 #endif
 244
 245 #if HAS_SERIAL_1
 246
 247 struct ao_stm_usart ao_stm_usart1;
 248
 249 void stm_usart1_isr(void) { ao_usart_isr(&ao_stm_usart1, USE_SERIAL_1_STDIN); }
 250
 251 char
 252 ao_serial1_getchar(void)
 253 {
 254         return ao_usart_getchar(&ao_stm_usart1);
 255 }
 256
 257 void
 258 ao_serial1_putchar(char c)
 259 {
 260         ao_usart_putchar(&ao_stm_usart1, c);
 261 }
 262
 263 int
 264 _ao_serial1_pollchar(void)
 265 {
 266         return _ao_usart_pollchar(&ao_stm_usart1);
 267 }
 268
 269 uint8_t
 270 _ao_serial1_sleep_for(uint16_t timeout)
 271 {
 272         return _ao_usart_sleep_for(&ao_stm_usart1, timeout);
 273 }
 274
 275 void
 276 ao_serial1_drain(void)
 277 {
 278         ao_usart_drain(&ao_stm_usart1);
 279 }
 280
 281 void
 282 ao_serial1_set_speed(uint8_t speed)
 283 {
 284         ao_usart_drain(&ao_stm_usart1);
 285         ao_usart_set_speed(&ao_stm_usart1, speed);
 286 }
 287 #endif  /* HAS_SERIAL_1 */
 288
 289 #if HAS_SERIAL_2
 290
 291 struct ao_stm_usart ao_stm_usart2;
 292
 293 void stm_usart2_isr(void) { ao_usart_isr(&ao_stm_usart2, USE_SERIAL_2_STDIN); }
 294
 295 char
 296 ao_serial2_getchar(void)
 297 {
 298         return ao_usart_getchar(&ao_stm_usart2);
 299 }
 300
 301 void
 302 ao_serial2_putchar(char c)
 303 {
 304         ao_usart_putchar(&ao_stm_usart2, c);
 305 }
 306
 307 int
 308 _ao_serial2_pollchar(void)
 309 {
 310         return _ao_usart_pollchar(&ao_stm_usart2);
 311 }
 312
 313 uint8_t
 314 _ao_serial2_sleep_for(uint16_t timeout)
 315 {
 316         return _ao_usart_sleep_for(&ao_stm_usart2, timeout);
 317 }
 318
 319 void
 320 ao_serial2_drain(void)
 321 {
 322         ao_usart_drain(&ao_stm_usart2);
 323 }
 324
 325 void
 326 ao_serial2_set_speed(uint8_t speed)
 327 {
 328         ao_usart_drain(&ao_stm_usart2);
 329         ao_usart_set_speed(&ao_stm_usart2, speed);
 330 }
 331
 332 #if HAS_SERIAL_SW_FLOW
 333 void
 334 ao_serial2_cts(void)
 335 {
 336         _ao_usart_cts(&ao_stm_usart2);
 337 }
 338 #endif
 339
 340 #endif  /* HAS_SERIAL_2 */
 341
 342 #if HAS_SERIAL_3
 343
 344 struct ao_stm_usart ao_stm_usart3;
 345
 346 void stm_usart3_isr(void) { ao_usart_isr(&ao_stm_usart3, USE_SERIAL_3_STDIN); }
 347
 348 char
 349 ao_serial3_getchar(void)
 350 {
 351         return ao_usart_getchar(&ao_stm_usart3);
 352 }
 353
 354 void
 355 ao_serial3_putchar(char c)
 356 {
 357         ao_usart_putchar(&ao_stm_usart3, c);
 358 }
 359
 360 int
 361 _ao_serial3_pollchar(void)
 362 {
 363         return _ao_usart_pollchar(&ao_stm_usart3);
 364 }
 365
 366 uint8_t
 367 _ao_serial3_sleep_for(uint16_t timeout)
 368 {
 369         return _ao_usart_sleep_for(&ao_stm_usart3, timeout);
 370 }
 371
 372 void
 373 ao_serial3_set_speed(uint8_t speed)
 374 {
 375         ao_usart_drain(&ao_stm_usart3);
 376         ao_usart_set_speed(&ao_stm_usart3, speed);
 377 }
 378
 379 void
 380 ao_serial3_drain(void)
 381 {
 382         ao_usart_drain(&ao_stm_usart3);
 383 }
 384 #endif  /* HAS_SERIAL_3 */
 385
 386 #if HAS_SERIAL_SW_FLOW
 387 static void
 388 ao_serial_set_sw_rts_cts(struct ao_stm_usart *usart,
 389                          void (*isr)(void),
 390                          struct stm_gpio *port_rts,
 391                          int pin_rts,
 392                          struct stm_gpio *port_cts,
 393                          int pin_cts)
 394 {
 395         /* Pull RTS low to note that there's space in the FIFO
 396          */
 397         ao_enable_output(port_rts, pin_rts, 0);
 398         usart->gpio_rts = port_rts;
 399         usart->pin_rts = pin_rts;
 400         usart->rts = 1;
 401
 402         ao_exti_setup(port_cts, pin_cts, AO_EXTI_MODE_FALLING|AO_EXTI_PRIORITY_MED, isr);
 403         usart->gpio_cts = port_cts;
 404         usart->pin_cts = pin_cts;
 405 }
 406 #endif
 407
 408 void
 409 ao_serial_init(void)
 410 {
 411 #if HAS_SERIAL_1
 412         /*
 413          *      TX      RX
 414          *      PA9     PA10
 415          *      PB6     PB7     *
 416          */
 417
 418 #if SERIAL_1_PA9_PA10
 419         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOAEN);
 420
 421         stm_afr_set(&stm_gpioa, 9, STM_AFR_AF7);
 422         stm_afr_set(&stm_gpioa, 10, STM_AFR_AF7);
 423 #else
 424 #if SERIAL_1_PB6_PB7
 425         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOBEN);
 426
 427         stm_afr_set(&stm_gpiob, 6, STM_AFR_AF7);
 428         stm_afr_set(&stm_gpiob, 7, STM_AFR_AF7);
 429 #else
 430 #error "No SERIAL_1 port configuration specified"
 431 #endif
 432 #endif
 433         /* Enable USART */
 434         stm_rcc.apb2enr |= (1 << STM_RCC_APB2ENR_USART1EN);
 435
 436         ao_stm_usart1.reg = &stm_usart1;
 437         ao_usart_init(&ao_stm_usart1, 0);
 438
 439         stm_nvic_set_enable(STM_ISR_USART1_POS);
 440         stm_nvic_set_priority(STM_ISR_USART1_POS, AO_STM_NVIC_MED_PRIORITY);
 441 #if USE_SERIAL_1_STDIN && !DELAY_SERIAL_1_STDIN
 442         ao_add_stdio(_ao_serial1_pollchar,
 443                      ao_serial1_putchar,
 444                      NULL);
 445 #endif
 446 #endif
 447
 448 #if HAS_SERIAL_2
 449         /*
 450          *      TX      RX
 451          *      PA2     PA3
 452          *      PD5     PD6
 453          */
 454
 455 #if SERIAL_2_PA2_PA3
 456         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOAEN);
 457
 458         stm_afr_set(&stm_gpioa, 2, STM_AFR_AF7);
 459         stm_afr_set(&stm_gpioa, 3, STM_AFR_AF7);
 460 # if USE_SERIAL_2_FLOW
 461 #  if USE_SERIAL_2_SW_FLOW
 462         ao_serial_set_sw_rts_cts(&ao_stm_usart2,
 463                                  ao_serial2_cts,
 464                                  SERIAL_2_PORT_RTS,
 465                                  SERIAL_2_PIN_RTS,
 466                                  SERIAL_2_PORT_CTS,
 467                                  SERIAL_2_PIN_CTS);
 468 #  else
 469         stm_afr_set(&stm_gpioa, 0, STM_AFR_AF7);
 470         stm_afr_set(&stm_gpioa, 1, STM_AFR_AF7);
 471 #  endif
 472 # endif
 473 #else
 474 #if SERIAL_2_PD5_PD6
 475         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIODEN);
 476
 477         stm_afr_set(&stm_gpiod, 5, STM_AFR_AF7);
 478         stm_afr_set(&stm_gpiod, 6, STM_AFR_AF7);
 479 #if USE_SERIAL_2_FLOW
 480 #error "Don't know how to set flowcontrol for serial 2 on PD"
 481 #endif
 482 #else
 483 #error "No SERIAL_2 port configuration specified"
 484 #endif
 485 #endif
 486         /* Enable USART */
 487         stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_USART2EN);
 488
 489         ao_stm_usart2.reg = &stm_usart2;
 490         ao_usart_init(&ao_stm_usart2, USE_SERIAL_2_FLOW && !USE_SERIAL_2_SW_FLOW);
 491
 492         stm_nvic_set_enable(STM_ISR_USART2_POS);
 493         stm_nvic_set_priority(STM_ISR_USART2_POS, AO_STM_NVIC_MED_PRIORITY);
 494 #if USE_SERIAL_2_STDIN && !DELAY_SERIAL_2_STDIN
 495         ao_add_stdio(_ao_serial2_pollchar,
 496                      ao_serial2_putchar,
 497                      NULL);
 498 #endif
 499 #endif
 500
 501 #if HAS_SERIAL_3
 502         /*
 503          *      TX      RX
 504          *      PB10    PB11
 505          *      PC10    PC11
 506          *      PD8     PD9
 507          */
 508 #if SERIAL_3_PB10_PB11
 509         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOBEN);
 510
 511         stm_afr_set(&stm_gpiob, 10, STM_AFR_AF7);
 512         stm_afr_set(&stm_gpiob, 11, STM_AFR_AF7);
 513 #else
 514 #if SERIAL_3_PC10_PC11
 515         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOCEN);
 516
 517         stm_afr_set(&stm_gpioc, 10, STM_AFR_AF7);
 518         stm_afr_set(&stm_gpioc, 11, STM_AFR_AF7);
 519 #else
 520 #if SERIAL_3_PD8_PD9
 521         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIODEN);
 522
 523         stm_afr_set(&stm_gpiod, 8, STM_AFR_AF7);
 524         stm_afr_set(&stm_gpiod, 9, STM_AFR_AF7);
 525 #else
 526 #error "No SERIAL_3 port configuration specified"
 527 #endif
 528 #endif
 529 #endif
 530         /* Enable USART */
 531         stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_USART3EN);
 532
 533         ao_stm_usart3.reg = &stm_usart3;
 534         ao_usart_init(&ao_stm_usart3, 0);
 535
 536         stm_nvic_set_enable(STM_ISR_USART3_POS);
 537         stm_nvic_set_priority(STM_ISR_USART3_POS, AO_STM_NVIC_MED_PRIORITY);
 538 #if USE_SERIAL_3_STDIN && !DELAY_SERIAL_3_STDIN
 539         ao_add_stdio(_ao_serial3_pollchar,
 540                      ao_serial3_putchar,
 541                      NULL);
 542 #endif
 543 #endif
 544 }