Merge branch 'micropeak-1.1'
[fw/altos] / src / stm / ao_serial_stm.c
1 /*
2  * Copyright © 2012 Keith Packard <keithp@keithp.com>
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License as published by
6  * the Free Software Foundation; version 2 of the License.
7  *
8  * This program is distributed in the hope that it will be useful, but
9  * WITHOUT ANY WARRANTY; without even the implied warranty of
10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
11  * General Public License for more details.
12  *
13  * You should have received a copy of the GNU General Public License along
14  * with this program; if not, write to the Free Software Foundation, Inc.,
15  * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
16  */
17
18 #include <ao.h>
19
20 void
21 ao_debug_out(char c)
22 {
23         if (c == '\n')
24                 ao_debug_out('\r');
25         while (!(stm_usart1.sr & (1 << STM_USART_SR_TXE)));
26         stm_usart1.dr = c;
27 }
28
29 static void
30 _ao_usart_tx_start(struct ao_stm_usart *usart)
31 {
32         if (!ao_fifo_empty(usart->tx_fifo) && !usart->tx_started)
33         {
34                 usart->tx_started = 1;
35                 ao_fifo_remove(usart->tx_fifo, usart->reg->dr);
36         }
37 }
38
39 static void
40 ao_usart_isr(struct ao_stm_usart *usart, int stdin)
41 {
42         uint32_t        sr;
43
44         sr = usart->reg->sr;
45         usart->reg->sr = 0;
46
47         if (sr & (1 << STM_USART_SR_RXNE)) {
48                 char c = usart->reg->dr;
49                 if (!ao_fifo_full(usart->rx_fifo))
50                         ao_fifo_insert(usart->rx_fifo, c);
51                 ao_wakeup(&usart->rx_fifo);
52                 if (stdin)
53                         ao_wakeup(&ao_stdin_ready);
54         }
55         if (sr & (1 << STM_USART_SR_TC)) {
56                 usart->tx_started = 0;
57                 _ao_usart_tx_start(usart);
58                 ao_wakeup(&usart->tx_fifo);
59         }
60 }
61
62 char
63 ao_usart_getchar(struct ao_stm_usart *usart)
64 {
65         char c;
66         ao_arch_block_interrupts();
67         while (ao_fifo_empty(usart->rx_fifo))
68                 ao_sleep(&usart->rx_fifo);
69         ao_fifo_remove(usart->rx_fifo, c);
70         ao_arch_release_interrupts();
71         return c;
72 }
73
74 int
75 ao_usart_pollchar(struct ao_stm_usart *usart)
76 {
77         int     c;
78         
79         ao_arch_block_interrupts();
80         if (ao_fifo_empty(usart->rx_fifo))
81                 c = AO_READ_AGAIN;
82         else {
83                 uint8_t u;
84                 ao_fifo_remove(usart->rx_fifo,u);
85                 c = u;
86         }
87         ao_arch_release_interrupts();
88         return c;
89 }
90
91 void
92 ao_usart_putchar(struct ao_stm_usart *usart, char c)
93 {
94         ao_arch_block_interrupts();
95         while (ao_fifo_full(usart->tx_fifo))
96                 ao_sleep(&usart->tx_fifo);
97         ao_fifo_insert(usart->tx_fifo, c);
98         _ao_usart_tx_start(usart);
99         ao_arch_release_interrupts();
100 }
101
102 void
103 ao_usart_drain(struct ao_stm_usart *usart)
104 {
105         ao_arch_block_interrupts();
106         while (!ao_fifo_empty(usart->tx_fifo))
107                 ao_sleep(&usart->tx_fifo);
108         ao_arch_release_interrupts();
109 }
110
111 static const struct {
112         uint32_t brr;
113 } ao_usart_speeds[] = {
114         [AO_SERIAL_SPEED_4800] = {
115                 AO_PCLK1 / 4800
116         },
117         [AO_SERIAL_SPEED_9600] = {
118                 AO_PCLK1 / 9600
119         },
120         [AO_SERIAL_SPEED_19200] = {
121                 AO_PCLK1 / 19200
122         },
123         [AO_SERIAL_SPEED_57600] = {
124                 AO_PCLK1 / 57600
125         },
126         [AO_SERIAL_SPEED_115200] = {
127                 AO_PCLK1 / 115200
128         },
129 };
130
131 void
132 ao_usart_set_speed(struct ao_stm_usart *usart, uint8_t speed)
133 {
134         if (speed > AO_SERIAL_SPEED_115200)
135                 return;
136         usart->reg->brr = ao_usart_speeds[speed].brr;
137 }
138
139 void
140 ao_usart_init(struct ao_stm_usart *usart)
141 {
142         usart->reg->cr1 = ((0 << STM_USART_CR1_OVER8) |
143                           (1 << STM_USART_CR1_UE) |
144                           (0 << STM_USART_CR1_M) |
145                           (0 << STM_USART_CR1_WAKE) |
146                           (0 << STM_USART_CR1_PCE) |
147                           (0 << STM_USART_CR1_PS) |
148                           (0 << STM_USART_CR1_PEIE) |
149                           (0 << STM_USART_CR1_TXEIE) |
150                           (1 << STM_USART_CR1_TCIE) |
151                           (1 << STM_USART_CR1_RXNEIE) |
152                           (0 << STM_USART_CR1_IDLEIE) |
153                           (1 << STM_USART_CR1_TE) |
154                           (1 << STM_USART_CR1_RE) |
155                           (0 << STM_USART_CR1_RWU) |
156                           (0 << STM_USART_CR1_SBK));
157
158         usart->reg->cr2 = ((0 << STM_USART_CR2_LINEN) |
159                           (STM_USART_CR2_STOP_1 << STM_USART_CR2_STOP) |
160                           (0 << STM_USART_CR2_CLKEN) |
161                           (0 << STM_USART_CR2_CPOL) |
162                           (0 << STM_USART_CR2_CPHA) |
163                           (0 << STM_USART_CR2_LBCL) |
164                           (0 << STM_USART_CR2_LBDIE) |
165                           (0 << STM_USART_CR2_LBDL) |
166                           (0 << STM_USART_CR2_ADD));
167
168         usart->reg->cr3 = ((0 << STM_USART_CR3_ONEBITE) |
169                           (0 << STM_USART_CR3_CTSIE) |
170                           (0 << STM_USART_CR3_CTSE) |
171                           (0 << STM_USART_CR3_RTSE) |
172                           (0 << STM_USART_CR3_DMAT) |
173                           (0 << STM_USART_CR3_DMAR) |
174                           (0 << STM_USART_CR3_SCEN) |
175                           (0 << STM_USART_CR3_NACK) |
176                           (0 << STM_USART_CR3_HDSEL) |
177                           (0 << STM_USART_CR3_IRLP) |
178                           (0 << STM_USART_CR3_IREN) |
179                           (0 << STM_USART_CR3_EIE));
180
181         /* Pick a 9600 baud rate */
182         ao_usart_set_speed(usart, AO_SERIAL_SPEED_9600);
183 }
184
185 #if HAS_SERIAL_1
186
187 struct ao_stm_usart ao_stm_usart1;
188
189 void stm_usart1_isr(void) { ao_usart_isr(&ao_stm_usart1, USE_SERIAL_1_STDIN); }
190
191 char
192 ao_serial1_getchar(void)
193 {
194         return ao_usart_getchar(&ao_stm_usart1);
195 }
196
197 void
198 ao_serial1_putchar(char c)
199 {
200         ao_usart_putchar(&ao_stm_usart1, c);
201 }
202
203 int
204 ao_serial1_pollchar(void)
205 {
206         return ao_usart_pollchar(&ao_stm_usart1);
207 }
208
209 void
210 ao_serial1_set_speed(uint8_t speed)
211 {
212         ao_usart_set_speed(&ao_stm_usart1, speed);
213 }
214 #endif  /* HAS_SERIAL_1 */
215
216 #if HAS_SERIAL_2
217
218 struct ao_stm_usart ao_stm_usart2;
219
220 void stm_usart2_isr(void) { ao_usart_isr(&ao_stm_usart2, USE_SERIAL_2_STDIN); }
221
222 char
223 ao_serial2_getchar(void)
224 {
225         return ao_usart_getchar(&ao_stm_usart2);
226 }
227
228 void
229 ao_serial2_putchar(char c)
230 {
231         ao_usart_putchar(&ao_stm_usart2, c);
232 }
233
234 int
235 ao_serial2_pollchar(void)
236 {
237         return ao_usart_pollchar(&ao_stm_usart2);
238 }
239
240 void
241 ao_serial2_set_speed(uint8_t speed)
242 {
243         ao_usart_set_speed(&ao_stm_usart2, speed);
244 }
245 #endif  /* HAS_SERIAL_2 */
246
247 #if HAS_SERIAL_3
248
249 struct ao_stm_usart ao_stm_usart3;
250
251 void stm_usart3_isr(void) { ao_usart_isr(&ao_stm_usart3, USE_SERIAL_2_STDIN); }
252
253 char
254 ao_serial3_getchar(void)
255 {
256         return ao_usart_getchar(&ao_stm_usart3);
257 }
258
259 void
260 ao_serial3_putchar(char c)
261 {
262         ao_usart_putchar(&ao_stm_usart3, c);
263 }
264
265 int
266 ao_serial3_pollchar(void)
267 {
268         return ao_usart_pollchar(&ao_stm_usart3);
269 }
270
271 void
272 ao_serial3_set_speed(uint8_t speed)
273 {
274         ao_usart_set_speed(&ao_stm_usart3, speed);
275 }
276 #endif  /* HAS_SERIAL_3 */
277
278 void
279 ao_serial_init(void)
280 {
281 #if HAS_SERIAL_1
282         /*
283          *      TX      RX
284          *      PA9     PA10
285          *      PB6     PB7     *
286          */
287
288 #if SERIAL_1_PA9_PA10
289         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOAEN);
290
291         stm_afr_set(&stm_gpioa, 9, STM_AFR_AF7);
292         stm_afr_set(&stm_gpioa, 10, STM_AFR_AF7);
293 #else
294 #if SERIAL_1_PB6_PB7
295         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOBEN);
296
297         stm_afr_set(&stm_gpiob, 6, STM_AFR_AF7);
298         stm_afr_set(&stm_gpiob, 7, STM_AFR_AF7);
299 #else
300 #error "No SERIAL_1 port configuration specified"
301 #endif
302 #endif
303         /* Enable USART */
304         stm_rcc.apb2enr |= (1 << STM_RCC_APB2ENR_USART1EN);
305
306         ao_stm_usart1.reg = &stm_usart1;
307         ao_usart_init(&ao_stm_usart1);
308
309         stm_nvic_set_enable(STM_ISR_USART1_POS);
310         stm_nvic_set_priority(STM_ISR_USART1_POS, 4);
311 #if USE_SERIAL_1_STDIN
312         ao_add_stdio(ao_serial1_pollchar,
313                      ao_serial1_putchar,
314                      NULL);
315 #endif
316 #endif
317
318 #if HAS_SERIAL_2
319         /*
320          *      TX      RX
321          *      PA2     PA3
322          *      PD5     PD6
323          */
324
325 #if SERIAL_2_PA2_PA3
326         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOAEN);
327
328         stm_afr_set(&stm_gpioa, 2, STM_AFR_AF7);
329         stm_afr_set(&stm_gpioa, 3, STM_AFR_AF7);
330 #else
331 #if SERIAL_2_PD5_PD6
332         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIODEN);
333
334         stm_afr_set(&stm_gpiod, 5, STM_AFR_AF7);
335         stm_afr_set(&stm_gpiod, 6, STM_AFR_AF7);
336 #else
337 #error "No SERIAL_2 port configuration specified"
338 #endif  
339 #endif
340         /* Enable USART */
341         stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_USART2EN);
342
343         ao_stm_usart2.reg = &stm_usart2;
344         ao_usart_init(&ao_stm_usart2);
345
346         stm_nvic_set_enable(STM_ISR_USART2_POS);
347         stm_nvic_set_priority(STM_ISR_USART2_POS, 4);
348 #if USE_SERIAL_2_STDIN
349         ao_add_stdio(ao_serial2_pollchar,
350                      ao_serial2_putchar,
351                      NULL);
352 #endif
353 #endif
354
355 #if HAS_SERIAL_3
356         /*
357          *      TX      RX
358          *      PB10    PB11
359          *      PC10    PC11
360          *      PD8     PD9
361          */
362 #if SERIAL_3_PB10_PB11
363         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOBEN);
364
365         stm_afr_set(&stm_gpiob, 10, STM_AFR_AF7);
366         stm_afr_set(&stm_gpiob, 11, STM_AFR_AF7);
367 #else
368 #if SERIAL_3_PC10_PC11
369         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOCEN);
370
371         stm_afr_set(&stm_gpioc, 10, STM_AFR_AF7);
372         stm_afr_set(&stm_gpioc, 11, STM_AFR_AF7);
373 #else
374 #if SERIAL_3_PD8_PD9
375         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIODEN);
376
377         stm_afr_set(&stm_gpiod, 8, STM_AFR_AF7);
378         stm_afr_set(&stm_gpiod, 9, STM_AFR_AF7);
379 #else
380 #error "No SERIAL_3 port configuration specified"
381 #endif
382 #endif
383 #endif
384         /* Enable USART */
385         stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_USART3EN);
386
387         ao_stm_usart3.reg = &stm_usart3;
388         ao_usart_init(&ao_stm_usart3);
389
390         stm_nvic_set_enable(STM_ISR_USART3_POS);
391         stm_nvic_set_priority(STM_ISR_USART3_POS, 4);
392 #if USE_SERIAL_3_STDIN
393         ao_add_stdio(ao_serial3_pollchar,
394                      ao_serial3_putchar,
395                      NULL);
396 #endif
397 #endif
398 }
399
400