altos/test: Adjust CRC error rate after FEC fix
[fw/altos] / src / stm / ao_dma_stm.c
1 /*
2  * Copyright © 2012 Keith Packard <keithp@keithp.com>
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License as published by
6  * the Free Software Foundation; either version 2 of the License, or
7  * (at your option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful, but
10  * WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
12  * General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License along
15  * with this program; if not, write to the Free Software Foundation, Inc.,
16  * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
17  */
18
19 #include "ao.h"
20
21 #define NUM_DMA 7
22
23 struct ao_dma_config {
24         void            (*isr)(int index);
25 };
26
27 uint8_t ao_dma_done[NUM_DMA];
28
29 static struct ao_dma_config ao_dma_config[NUM_DMA];
30 static uint8_t ao_dma_allocated[NUM_DMA];
31 static uint8_t ao_dma_mutex[NUM_DMA];
32
33 static void
34 ao_dma_isr(uint8_t index) {
35         /* Get channel interrupt bits */
36         uint32_t        isr = stm_dma.isr & (STM_DMA_ISR_MASK <<
37                                              STM_DMA_ISR(index));
38
39         /* Ack them */
40         stm_dma.ifcr = isr;
41         if (ao_dma_config[index].isr)
42                 (*ao_dma_config[index].isr)(index);
43         else {
44                 ao_dma_done[index] = 1;
45                 ao_wakeup(&ao_dma_done[index]);
46         }
47 }
48
49 void stm_dma1_channel1_isr(void) { ao_dma_isr(STM_DMA_INDEX(1)); }
50 void stm_dma1_channel2_isr(void) { ao_dma_isr(STM_DMA_INDEX(2)); }
51 #ifdef STM_DMA1_3_STOLEN
52 #define LEAVE_DMA_ON
53 #else
54 void stm_dma1_channel3_isr(void) { ao_dma_isr(STM_DMA_INDEX(3)); }
55 #endif
56 void stm_dma1_channel4_isr(void) { ao_dma_isr(STM_DMA_INDEX(4)); }
57 #ifdef STM_DMA1_5_STOLEN
58 #define LEAVE_DMA_ON
59 #else
60 void stm_dma1_channel5_isr(void) { ao_dma_isr(STM_DMA_INDEX(5)); }
61 #endif
62 void stm_dma1_channel6_isr(void) { ao_dma_isr(STM_DMA_INDEX(6)); }
63 void stm_dma1_channel7_isr(void) { ao_dma_isr(STM_DMA_INDEX(7)); }
64
65 #ifndef LEAVE_DMA_ON
66 static uint8_t ao_dma_active;
67 #endif
68
69 void
70 ao_dma_set_transfer(uint8_t             index,
71                     volatile void       *peripheral,
72                     void                *memory,
73                     uint16_t            count,
74                     uint32_t            ccr)
75 {
76         if (ao_dma_allocated[index]) {
77                 if (ao_dma_mutex[index])
78                         ao_panic(AO_PANIC_DMA);
79                 ao_dma_mutex[index] = 0xff;
80         } else
81                 ao_mutex_get(&ao_dma_mutex[index]);
82 #ifndef LEAVE_DMA_ON
83         ao_arch_critical(
84                 if (ao_dma_active++ == 0)
85                         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_DMA1EN);
86                 );
87 #endif
88         stm_dma.channel[index].ccr = ccr | (1 << STM_DMA_CCR_TCIE);
89         stm_dma.channel[index].cndtr = count;
90         stm_dma.channel[index].cpar = peripheral;
91         stm_dma.channel[index].cmar = memory;
92         ao_dma_config[index].isr = NULL;
93 }
94
95 void
96 ao_dma_set_isr(uint8_t index, void (*isr)(int))
97 {
98         ao_dma_config[index].isr = isr;
99 }
100
101 void
102 ao_dma_start(uint8_t index)
103 {
104         ao_dma_done[index] = 0;
105         stm_dma.channel[index].ccr |= (1UL << STM_DMA_CCR_EN);
106 }
107
108 void
109 ao_dma_done_transfer(uint8_t index)
110 {
111         stm_dma.channel[index].ccr &= ~(1UL << STM_DMA_CCR_EN);
112 #ifndef LEAVE_DMA_ON
113         ao_arch_critical(
114                 if (--ao_dma_active == 0)
115                         stm_rcc.ahbenr &= ~(1UL << STM_RCC_AHBENR_DMA1EN);
116                 );
117 #endif
118         if (ao_dma_allocated[index])
119                 ao_dma_mutex[index] = 0;
120         else
121                 ao_mutex_put(&ao_dma_mutex[index]);
122 }
123
124 void
125 ao_dma_alloc(uint8_t index)
126 {
127         if (ao_dma_allocated[index])
128                 ao_panic(AO_PANIC_DMA);
129         ao_dma_allocated[index] = 1;
130 }
131
132 #if DEBUG
133 void
134 ao_dma_dump_cmd(void)
135 {
136         int i;
137
138 #ifndef LEAVE_DMA_ON
139         ao_arch_critical(
140                 if (ao_dma_active++ == 0)
141                         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_DMA1EN);
142                 );
143 #endif
144         printf ("isr %08x ifcr%08x\n", stm_dma.isr, stm_dma.ifcr);
145         for (i = 0; i < NUM_DMA; i++)
146                 printf("%d: done %d allocated %d mutex %2d ccr %04x cndtr %04x cpar %08x cmar %08x isr %08x\n",
147                        i,
148                        ao_dma_done[i],
149                        ao_dma_allocated[i],
150                        ao_dma_mutex[i],
151                        stm_dma.channel[i].ccr,
152                        stm_dma.channel[i].cndtr,
153                        stm_dma.channel[i].cpar,
154                        stm_dma.channel[i].cmar,
155                        ao_dma_config[i].isr);
156 #ifndef LEAVE_DMA_ON
157         ao_arch_critical(
158                 if (--ao_dma_active == 0)
159                         stm_rcc.ahbenr &= ~(1 << STM_RCC_AHBENR_DMA1EN);
160                 );
161 #endif
162 }
163
164 static const struct ao_cmds ao_dma_cmds[] = {
165         { ao_dma_dump_cmd,      "D\0Dump DMA status" },
166         { 0, NULL }
167 };
168 #endif
169
170 void
171 ao_dma_init(void)
172 {
173         int     index;
174
175 #ifdef LEAVE_DMA_ON
176         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_DMA1EN);
177 #endif
178         for (index = 0; index < STM_NUM_DMA; index++) {
179 #if STM_DMA1_5_STOLEN
180                 if (index == STM_DMA_INDEX(5)) {
181                         ao_dma_allocated[index] = 1;
182                         ao_dma_mutex[index] = 0xff;
183                         continue;
184                 }
185 #endif
186 #if STM_DMA1_3_STOLEN
187                 if (index == STM_DMA_INDEX(3)) {
188                         ao_dma_allocated[index] = 1;
189                         ao_dma_mutex[index] = 0xff;
190                         continue;
191                 }
192 #endif
193                 stm_nvic_set_enable(STM_ISR_DMA1_CHANNEL1_POS + index);
194                 stm_nvic_set_priority(STM_ISR_DMA1_CHANNEL1_POS + index,
195                                       AO_STM_NVIC_MED_PRIORITY);
196                 ao_dma_allocated[index] = 0;
197                 ao_dma_mutex[index] = 0;
198         }
199 #if DEBUG
200         ao_cmd_register(&ao_dma_cmds[0]);
201 #endif
202 }