git.gag.com Git - fw/altos/blob - src/stm/ao_dma_stm.c

   1 /*
   2  * Copyright © 2012 Keith Packard <keithp@keithp.com>
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; version 2 of the License.
   7  *
   8  * This program is distributed in the hope that it will be useful, but
   9  * WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  11  * General Public License for more details.
  12  *
  13  * You should have received a copy of the GNU General Public License along
  14  * with this program; if not, write to the Free Software Foundation, Inc.,
  15  * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  16  */
  17
  18 #include "ao.h"
  19
  20 #define NUM_DMA 7
  21
  22 struct ao_dma_config {
  23         void            (*isr)(int index);
  24 };
  25
  26 uint8_t ao_dma_done[NUM_DMA];
  27
  28 static struct ao_dma_config ao_dma_config[NUM_DMA];
  29 static uint8_t ao_dma_allocated[NUM_DMA];
  30 static uint8_t ao_dma_mutex[NUM_DMA];
  31 static uint8_t ao_dma_active;
  32
  33 static void
  34 ao_dma_isr(uint8_t index) {
  35         /* Get channel interrupt bits */
  36         uint32_t        isr = stm_dma.isr & (STM_DMA_ISR_MASK <<
  37                                              STM_DMA_ISR(index));
  38
  39         /* Ack them */
  40         stm_dma.ifcr = isr;
  41         if (ao_dma_config[index].isr)
  42                 (*ao_dma_config[index].isr)(index);
  43         else {
  44                 ao_dma_done[index] = 1;
  45                 ao_wakeup(&ao_dma_done[index]);
  46         }
  47 }
  48
  49 void stm_dma1_channel1_isr(void) { ao_dma_isr(STM_DMA_INDEX(1)); }
  50 void stm_dma1_channel2_isr(void) { ao_dma_isr(STM_DMA_INDEX(2)); }
  51 void stm_dma1_channel3_isr(void) { ao_dma_isr(STM_DMA_INDEX(3)); }
  52 void stm_dma1_channel4_isr(void) { ao_dma_isr(STM_DMA_INDEX(4)); }
  53 void stm_dma1_channel5_isr(void) { ao_dma_isr(STM_DMA_INDEX(5)); }
  54 void stm_dma1_channel6_isr(void) { ao_dma_isr(STM_DMA_INDEX(6)); }
  55 void stm_dma1_channel7_isr(void) { ao_dma_isr(STM_DMA_INDEX(7)); }
  56
  57 void
  58 ao_dma_set_transfer(uint8_t             index,
  59                     volatile void       *peripheral,
  60                     void                *memory,
  61                     uint16_t            count,
  62                     uint32_t            ccr)
  63 {
  64         if (ao_dma_allocated[index]) {
  65                 if (ao_dma_mutex[index])
  66                         ao_panic(AO_PANIC_DMA);
  67                 ao_dma_mutex[index] = 1;
  68         } else
  69                 ao_mutex_get(&ao_dma_mutex[index]);
  70         ao_arch_critical(
  71                 if (ao_dma_active++ == 0)
  72                         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_DMA1EN);
  73                 );
  74         stm_dma.channel[index].ccr = ccr | (1 << STM_DMA_CCR_TCIE);
  75         stm_dma.channel[index].cndtr = count;
  76         stm_dma.channel[index].cpar = peripheral;
  77         stm_dma.channel[index].cmar = memory;
  78         ao_dma_config[index].isr = NULL;
  79 }
  80
  81 void
  82 ao_dma_set_isr(uint8_t index, void (*isr)(int))
  83 {
  84         ao_dma_config[index].isr = isr;
  85 }
  86
  87 void
  88 ao_dma_start(uint8_t index)
  89 {
  90         ao_dma_done[index] = 0;
  91         stm_dma.channel[index].ccr |= (1 << STM_DMA_CCR_EN);
  92 }
  93
  94 void
  95 ao_dma_done_transfer(uint8_t index)
  96 {
  97         stm_dma.channel[index].ccr &= ~(1 << STM_DMA_CCR_EN);
  98         ao_arch_critical(
  99                 if (--ao_dma_active == 0)
 100                         stm_rcc.ahbenr &= ~(1 << STM_RCC_AHBENR_DMA1EN);
 101                 );
 102         if (ao_dma_allocated[index])
 103                 ao_dma_mutex[index] = 0;
 104         else
 105                 ao_mutex_put(&ao_dma_mutex[index]);
 106 }
 107
 108 void
 109 ao_dma_abort(uint8_t index)
 110 {
 111         stm_dma.channel[index].ccr &= ~(1 << STM_DMA_CCR_EN);
 112         ao_wakeup(&ao_dma_done[index]);
 113 }
 114
 115 void
 116 ao_dma_alloc(uint8_t index)
 117 {
 118         if (ao_dma_allocated[index])
 119                 ao_panic(AO_PANIC_DMA);
 120         ao_dma_allocated[index] = 1;
 121 }
 122
 123 void
 124 ao_dma_init(void)
 125 {
 126         int     index;
 127
 128         for (index = 0; index < STM_NUM_DMA; index++) {
 129                 stm_nvic_set_enable(STM_ISR_DMA1_CHANNEL1_POS + index);
 130                 stm_nvic_set_priority(STM_ISR_DMA1_CHANNEL1_POS + index, 4);
 131                 ao_dma_allocated[index] = 0;
 132                 ao_dma_mutex[index] = 0;
 133         }
 134
 135 }