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   1 /*
   2  * Copyright © 2013 Keith Packard <keithp@keithp.com>
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; version 2 of the License.
   7  *
   8  * This program is distributed in the hope that it will be useful, but
   9  * WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  11  * General Public License for more details.
  12  *
  13  * You should have received a copy of the GNU General Public License along
  14  * with this program; if not, write to the Free Software Foundation, Inc.,
  15  * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  16  */
  17
  18 #include <ao.h>
  19 #include <ao_serial.h>
  20
  21 struct ao_fifo  ao_usart_rx_fifo;
  22 struct ao_fifo  ao_usart_tx_fifo;
  23 uint8_t         ao_usart_tx_avail;
  24 uint8_t         ao_usart_tx_avail_min;
  25
  26 #define LPC_USART_TX_FIFO_SIZE  16
  27
  28 void
  29 ao_debug_out(char c)
  30 {
  31         if (c == '\n')
  32                 ao_debug_out('\r');
  33         while (!(lpc_usart.lsr & (1 << LPC_USART_LSR_TEMT)))
  34                 ;
  35         lpc_usart.rbr_thr = c;
  36 }
  37
  38 static void
  39 _ao_serial_tx_start(void)
  40 {
  41         if (!ao_fifo_empty(ao_usart_tx_fifo) && ao_usart_tx_avail) {
  42                 ao_usart_tx_avail--;
  43                 if (ao_usart_tx_avail < ao_usart_tx_avail_min)
  44                         ao_usart_tx_avail_min = ao_usart_tx_avail;
  45                 ao_fifo_remove(ao_usart_tx_fifo, lpc_usart.rbr_thr);
  46         }
  47 }
  48
  49 void
  50 lpc_usart_isr(void)
  51 {
  52         (void) lpc_usart.iir_fcr;
  53
  54         while (lpc_usart.lsr & (1 << LPC_USART_LSR_RDR)) {
  55                 char c = lpc_usart.rbr_thr;
  56                 if (!ao_fifo_full(ao_usart_rx_fifo))
  57                         ao_fifo_insert(ao_usart_rx_fifo, c);
  58                 ao_wakeup(&ao_usart_rx_fifo);
  59                 if (stdin)
  60                         ao_wakeup(&ao_stdin_ready);
  61         }
  62         if (lpc_usart.lsr & (1 << LPC_USART_LSR_THRE)) {
  63                 ao_usart_tx_avail = LPC_USART_TX_FIFO_SIZE;
  64                 _ao_serial_tx_start();
  65                 ao_wakeup(&ao_usart_tx_fifo);
  66         }
  67 }
  68
  69 int
  70 _ao_serial0_pollchar(void)
  71 {
  72         int     c;
  73
  74         if (ao_fifo_empty(ao_usart_rx_fifo))
  75                 c = AO_READ_AGAIN;
  76         else {
  77                 uint8_t u;
  78                 ao_fifo_remove(ao_usart_rx_fifo,u);
  79                 c = u;
  80         }
  81         return c;
  82 }
  83
  84 char
  85 ao_serial0_getchar(void)
  86 {
  87         int c;
  88         ao_arch_block_interrupts();
  89         while ((c = _ao_serial0_pollchar()) == AO_READ_AGAIN)
  90                 ao_sleep(&ao_usart_rx_fifo);
  91         ao_arch_release_interrupts();
  92         return (char) c;
  93 }
  94
  95 void
  96 ao_serial0_putchar(char c)
  97 {
  98         ao_arch_block_interrupts();
  99         while (ao_fifo_full(ao_usart_tx_fifo))
 100                 ao_sleep(&ao_usart_tx_fifo);
 101         ao_fifo_insert(ao_usart_tx_fifo, c);
 102         _ao_serial_tx_start();
 103         ao_arch_release_interrupts();
 104 }
 105
 106 void
 107 ao_serial0_drain(void)
 108 {
 109         ao_arch_block_interrupts();
 110         while (!ao_fifo_empty(ao_usart_tx_fifo))
 111                 ao_sleep(&ao_usart_tx_fifo);
 112         ao_arch_release_interrupts();
 113 }
 114
 115 #include "ao_serial_lpc.h"
 116
 117 void
 118 ao_serial0_set_speed(uint8_t speed)
 119 {
 120         if (speed > AO_SERIAL_SPEED_115200)
 121                 return;
 122
 123         /* Flip to allow access to divisor latches */
 124         lpc_usart.lcr |= (1 << LPC_USART_LCR_DLAB);
 125
 126         /* DL LSB */
 127         lpc_usart.rbr_thr = ao_usart_speeds[speed].dl & 0xff;
 128
 129         /* DL MSB */
 130         lpc_usart.ier = (ao_usart_speeds[speed].dl >> 8) & 0xff;
 131
 132         lpc_usart.fdr = ((ao_usart_speeds[speed].divaddval << LPC_USART_FDR_DIVADDVAL) |
 133                          (ao_usart_speeds[speed].mulval << LPC_USART_FDR_MULVAL));
 134
 135         /* Turn access to divisor latches back off */
 136         lpc_usart.lcr &= ~(1 << LPC_USART_LCR_DLAB);
 137 }
 138
 139 void
 140 ao_serial_init(void)
 141 {
 142 #if SERIAL_0_18_19
 143         lpc_ioconf.pio0_18 = ((LPC_IOCONF_FUNC_PIO0_18_RXD << LPC_IOCONF_FUNC) |
 144                               (LPC_IOCONF_MODE_INACTIVE << LPC_IOCONF_MODE) |
 145                               (0 << LPC_IOCONF_HYS) |
 146                               (0 << LPC_IOCONF_INV) |
 147                               (0 << LPC_IOCONF_OD));
 148         lpc_ioconf.pio0_19 = ((LPC_IOCONF_FUNC_PIO0_19_TXD << LPC_IOCONF_FUNC) |
 149                               (LPC_IOCONF_MODE_INACTIVE << LPC_IOCONF_MODE) |
 150                               (0 << LPC_IOCONF_HYS) |
 151                               (0 << LPC_IOCONF_INV) |
 152                               (0 << LPC_IOCONF_OD));
 153 #endif
 154
 155         /* Turn on the USART */
 156         lpc_scb.sysahbclkctrl |= (1 << LPC_SCB_SYSAHBCLKCTRL_USART);
 157
 158         /* Turn on the USART clock */
 159         lpc_scb.uartclkdiv = AO_LPC_CLKOUT / AO_LPC_USARTCLK;
 160
 161         /* Configure USART */
 162
 163         /* Enable FIFOs, reset fifo contents, interrupt on 1 received char */
 164         lpc_usart.iir_fcr = ((1 << LPC_USART_FCR_FIFOEN) |
 165                          (1 << LPC_USART_FCR_RXFIFORES) |
 166                          (1 << LPC_USART_FCR_TXFIFORES) |
 167                          (LPC_USART_FCR_RXTL_1 << LPC_USART_FCR_RXTL));
 168
 169         ao_usart_tx_avail = LPC_USART_TX_FIFO_SIZE;
 170         ao_usart_tx_avail_min = LPC_USART_TX_FIFO_SIZE;
 171
 172         /* 8 n 1 */
 173         lpc_usart.lcr = ((LPC_USART_LCR_WLS_8 << LPC_USART_LCR_WLS) |
 174                          (LPC_USART_LCR_SBS_1 << LPC_USART_LCR_SBS) |
 175                          (0 << LPC_USART_LCR_PE) |
 176                          (LPC_USART_LCR_PS_ODD << LPC_USART_LCR_PS) |
 177                          (0 << LPC_USART_LCR_BC) |
 178                          (0 << LPC_USART_LCR_DLAB));
 179
 180         /* Disable flow control */
 181         lpc_usart.mcr = ((0 << LPC_USART_MCR_DTRCTRL) |
 182                          (0 << LPC_USART_MCR_RTSCTRL) |
 183                          (0 << LPC_USART_MCR_LMS) |
 184                          (0 << LPC_USART_MCR_RTSEN) |
 185                          (0 << LPC_USART_MCR_CTSEN));
 186
 187         /* 16x oversampling */
 188         lpc_usart.osr = ((0 << LPC_USART_OSR_OSFRAC) |
 189                          ((16 - 1) << LPC_USART_OSR_OSINT) |
 190                          (0 << LPC_USART_OSR_FDINT));
 191
 192         /* Full duplex */
 193         lpc_usart.hden = ((0 << LPC_USART_HDEN_HDEN));
 194
 195         /* Set baud rate */
 196         ao_serial0_set_speed(AO_SERIAL_SPEED_9600);
 197
 198         /* Enable interrupts */
 199         lpc_usart.ier = ((1 << LPC_USART_IER_RBRINTEN) |
 200                          (1 << LPC_USART_IER_THREINTEN));
 201
 202         lpc_nvic_set_enable(LPC_ISR_USART_POS);
 203         lpc_nvic_set_priority(LPC_ISR_USART_POS, 0);
 204 #if USE_SERIAL_0_STDIN
 205         ao_add_stdio(_ao_serial_pollchar,
 206                      ao_serial_putchar,
 207                      NULL);
 208 #endif
 209 }