2 * Copyright © 2013 Keith Packard <keithp@keithp.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2 of the License.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
18 #ifndef _AO_ARCH_FUNCS_H_
19 #define _AO_ARCH_FUNCS_H_
21 #define ao_spi_get_bit(reg,bit,pin,bus,speed) ao_spi_get_mask(reg,(1<<bit),bus,speed)
22 #define ao_spi_put_bit(reg,bit,pin,bus) ao_spi_put_mask(reg,(1<<bit),bus)
24 #define ao_enable_port(port) (lpc_scb.sysahbclkctrl |= (1 << LPC_SCB_SYSAHBCLKCTRL_GPIO))
26 #define lpc_all_bit(port,bit) (((port) << 5) | (bit))
28 #define ao_gpio_set(port, bit, pin, v) (lpc_gpio.byte[lpc_all_bit(port,bit)] = (v))
30 #define ao_gpio_get(port, bit, pin) (lpc_gpio_byte[lpc_all_bit(port,bit)])
32 #define ao_enable_output(port,bit,pin,v) do { \
33 ao_enable_port(port); \
34 ao_gpio_set(port, bit, pin, v); \
35 lpc_gpio.dir[port] |= (1 << bit); \
38 #define ao_enable_input(port,bit,mode) do { \
39 vuint32_t *_ioconf = &lpc_ioconf.pio0_0 + ((port)*24+(bit)); \
41 ao_enable_port(port); \
42 lpc_gpio.dir[port] &= ~(1 << bit); \
43 if (mode == AO_EXTI_MODE_PULL_UP) \
44 _mode = LPC_IOCONF_MODE_PULL_UP << LPC_IOCONF_MODE; \
45 else if (mode == AO_EXTI_MODE_PULL_DOWN) \
46 _mode = LPC_IOCONF_MODE_PULL_UP << LPC_IOCONF_MODE; \
48 _mode = LPC_IOCONF_MODE_INACTIVE << LPC_IOCONF_MODE; \
49 *_ioconf = ((*_ioconf & ~(LPC_IOCONF_MODE_MASK << LPC_IOCONF_MODE)) | \
51 (1 << LPC_IOCONF_ADMODE)); \
54 #define lpc_token_paster_2(x,y) x ## y
55 #define lpc_token_evaluator_2(x,y) lpc_token_paster_2(x,y)
56 #define lpc_token_paster_3(x,y,z) x ## y ## z
57 #define lpc_token_evaluator_3(x,y,z) lpc_token_paster_3(x,y,z)
58 #define lpc_token_paster_4(w,x,y,z) w ## x ## y ## z
59 #define lpc_token_evaluator_4(w,x,y,z) lpc_token_paster_4(w,x,y,z)
60 #define analog_reg(port,bit) lpc_token_evaluator_4(pio,port,_,bit)
61 #define analog_func(id) lpc_token_evaluator_2(LPC_IOCONF_FUNC_AD,id)
63 #define ao_enable_analog(port,bit,id) do { \
64 ao_enable_port(port); \
65 lpc_gpio.dir[port] &= ~(1 << bit); \
66 lpc_ioconf.analog_reg(port,bit) = ((analog_func(id) << LPC_IOCONF_FUNC) | \
67 (0 << LPC_IOCONF_ADMODE)); \
70 #define ARM_PUSH32(stack, val) (*(--(stack)) = (val))
72 static inline uint32_t
73 ao_arch_irqsave(void) {
75 asm("mrs %0,primask" : "=&r" (primask));
76 ao_arch_block_interrupts();
81 ao_arch_irqrestore(uint32_t primask) {
82 asm("msr primask,%0" : : "r" (primask));
86 ao_arch_memory_barrier() {
87 asm volatile("" ::: "memory");
91 ao_arch_init_stack(struct ao_task *task, void *start)
93 uint32_t *sp = (uint32_t *) (task->stack + AO_STACK_SIZE);
94 uint32_t a = (uint32_t) start;
97 /* Return address (goes into LR) */
100 /* Clear register values r0-r7 */
108 /* PRIMASK with interrupts enabled */
114 static inline void ao_arch_save_regs(void) {
115 /* Save general registers */
116 asm("push {r0-r7,lr}\n");
123 asm("mrs r0,primask");
127 static inline void ao_arch_save_stack(void) {
129 asm("mov %0,sp" : "=&r" (sp) );
130 ao_cur_task->sp = (sp);
131 if ((uint8_t *) sp < &ao_cur_task->stack[0])
132 ao_panic (AO_PANIC_STACK);
135 static inline void ao_arch_restore_stack(void) {
137 sp = (uint32_t) ao_cur_task->sp;
140 asm("mov sp, %0" : : "r" (sp) );
142 /* Restore PRIMASK */
144 asm("msr primask,r0");
148 asm("msr apsr_nczvq,r0");
150 /* Restore general registers and return */
151 asm("pop {r0-r7,pc}\n");
154 #define ao_arch_isr_stack()
156 #define ao_arch_wait_interrupt() do { \
157 asm(".global ao_idle_loc\n\twfi\nao_idle_loc:"); \
158 ao_arch_release_interrupts(); \
159 ao_arch_block_interrupts(); \
162 #define ao_arch_critical(b) do { \
163 ao_arch_block_interrupts(); \
164 do { b } while (0); \
165 ao_arch_release_interrupts(); \
172 #define ao_spi_set_cs(port,mask) (lpc_gpio.clr[port] = (mask))
173 #define ao_spi_clr_cs(port,mask) (lpc_gpio.set[port] = (mask))
175 #define ao_spi_get_mask(port,mask,bus,speed) do { \
176 ao_spi_get(bus, speed); \
177 ao_spi_set_cs(port, mask); \
180 #define ao_spi_put_mask(reg,mask,bus) do { \
181 ao_spi_clr_cs(reg,mask); \
185 #define ao_spi_get_bit(reg,bit,pin,bus,speed) ao_spi_get_mask(reg,(1<<bit),bus,speed)
186 #define ao_spi_put_bit(reg,bit,pin,bus) ao_spi_put_mask(reg,(1<<bit),bus)
189 ao_spi_get(uint8_t spi_index, uint32_t speed);
192 ao_spi_put(uint8_t spi_index);
195 ao_spi_send(void *block, uint16_t len, uint8_t spi_index);
198 ao_spi_send_fixed(uint8_t value, uint16_t len, uint8_t spi_index);
201 ao_spi_recv(void *block, uint16_t len, uint8_t spi_index);
204 ao_spi_duplex(void *out, void *in, uint16_t len, uint8_t spi_index);
206 extern uint16_t ao_spi_speed[LPC_NUM_SPI];
211 #define ao_spi_init_cs(port, mask) do { \
213 for (__bit__ = 0; __bit__ < 32; __bit__++) { \
214 if (mask & (1 << __bit__)) \
215 ao_enable_output(port, __bit__, PIN, 1); \
219 #define HAS_ARCH_START_SCHEDULER 1
221 static inline void ao_arch_start_scheduler(void) {
225 asm("mrs %0,msp" : "=&r" (sp));
226 asm("msr psp,%0" : : "r" (sp));
227 asm("mrs %0,control" : "=&r" (control));
229 asm("msr control,%0" : : "r" (control));
232 #endif /* _AO_ARCH_FUNCS_H_ */