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   1 /*
   2  * Copyright © 2009 Keith Packard <keithp@keithp.com>
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; version 2 of the License.
   7  *
   8  * This program is distributed in the hope that it will be useful, but
   9  * WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  11  * General Public License for more details.
  12  *
  13  * You should have received a copy of the GNU General Public License along
  14  * with this program; if not, write to the Free Software Foundation, Inc.,
  15  * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  16  */
  17
  18 #include "ao.h"
  19 #include "at45db161d.h"
  20
  21 /*
  22  * Using SPI on USART 0, with P1_1 as the chip select
  23  */
  24
  25 #define FLASH_CS                P1_1
  26 #define FLASH_CS_INDEX          1
  27
  28 __xdata uint8_t ao_flash_dma_in_done;
  29 __xdata uint8_t ao_flash_dma_out_done;
  30 __xdata uint8_t ao_flash_mutex;
  31
  32 uint8_t ao_flash_dma_out_id;
  33 uint8_t ao_flash_dma_in_id;
  34
  35 static __xdata uint8_t  ao_flash_const = 0xff;
  36
  37 #define ao_flash_delay() do { \
  38         _asm nop _endasm; \
  39         _asm nop _endasm; \
  40         _asm nop _endasm; \
  41 } while(0)
  42
  43 void ao_flash_cs_low(void)
  44 {
  45         ao_flash_delay();
  46         FLASH_CS = 0;
  47         ao_flash_delay();
  48 }
  49
  50 void ao_flash_cs_high(void)
  51 {
  52         ao_flash_delay();
  53         FLASH_CS = 1;
  54         ao_flash_delay();
  55 }
  56
  57 /* Send bytes over SPI.
  58  *
  59  * This sets up two DMA engines, one writing the data and another reading
  60  * bytes coming back.  We use the bytes coming back to tell when the transfer
  61  * is complete, as the transmit register is double buffered and hence signals
  62  * completion one byte before the transfer is actually complete
  63  */
  64 static void
  65 ao_flash_send(void __xdata *block, uint16_t len)
  66 {
  67         ao_dma_set_transfer(ao_flash_dma_in_id,
  68                             &U0DBUFXADDR,
  69                             &ao_flash_const,
  70                             len,
  71                             DMA_CFG0_WORDSIZE_8 |
  72                             DMA_CFG0_TMODE_SINGLE |
  73                             DMA_CFG0_TRIGGER_URX0,
  74                             DMA_CFG1_SRCINC_0 |
  75                             DMA_CFG1_DESTINC_0 |
  76                             DMA_CFG1_PRIORITY_NORMAL);
  77
  78         ao_dma_set_transfer(ao_flash_dma_out_id,
  79                             block,
  80                             &U0DBUFXADDR,
  81                             len,
  82                             DMA_CFG0_WORDSIZE_8 |
  83                             DMA_CFG0_TMODE_SINGLE |
  84                             DMA_CFG0_TRIGGER_UTX0,
  85                             DMA_CFG1_SRCINC_1 |
  86                             DMA_CFG1_DESTINC_0 |
  87                             DMA_CFG1_PRIORITY_NORMAL);
  88
  89         ao_dma_start(ao_flash_dma_in_id);
  90         ao_dma_start(ao_flash_dma_out_id);
  91         ao_dma_trigger(ao_flash_dma_out_id);
  92         __critical while (!ao_flash_dma_in_done)
  93                 ao_sleep(&ao_flash_dma_in_done);
  94 }
  95
  96 /* Receive bytes over SPI.
  97  *
  98  * This sets up tow DMA engines, one reading the data and another
  99  * writing constant values to the SPI transmitter as that is what
 100  * clocks the data coming in.
 101  */
 102 static void
 103 ao_flash_recv(void __xdata *block, uint16_t len)
 104 {
 105         ao_dma_set_transfer(ao_flash_dma_in_id,
 106                             &U0DBUFXADDR,
 107                             block,
 108                             len,
 109                             DMA_CFG0_WORDSIZE_8 |
 110                             DMA_CFG0_TMODE_SINGLE |
 111                             DMA_CFG0_TRIGGER_URX0,
 112                             DMA_CFG1_SRCINC_0 |
 113                             DMA_CFG1_DESTINC_1 |
 114                             DMA_CFG1_PRIORITY_NORMAL);
 115
 116         ao_dma_set_transfer(ao_flash_dma_out_id,
 117                             &ao_flash_const,
 118                             &U0DBUFXADDR,
 119                             len,
 120                             DMA_CFG0_WORDSIZE_8 |
 121                             DMA_CFG0_TMODE_SINGLE |
 122                             DMA_CFG0_TRIGGER_UTX0,
 123                             DMA_CFG1_SRCINC_0 |
 124                             DMA_CFG1_DESTINC_0 |
 125                             DMA_CFG1_PRIORITY_NORMAL);
 126
 127         ao_dma_start(ao_flash_dma_in_id);
 128         ao_dma_start(ao_flash_dma_out_id);
 129         ao_dma_trigger(ao_flash_dma_out_id);
 130         __critical while (!ao_flash_dma_in_done)
 131                 ao_sleep(&ao_flash_dma_in_done);
 132 }
 133
 134 struct ao_flash_instruction {
 135         uint8_t instruction;
 136         uint8_t address[3];
 137 } __xdata ao_flash_instruction;
 138
 139 static void
 140 ao_flash_set_pagesize_512(void)
 141 {
 142         ao_flash_cs_low();
 143         ao_flash_instruction.instruction = FLASH_SET_CONFIG;
 144         ao_flash_instruction.address[0] = FLASH_SET_512_BYTE_0;
 145         ao_flash_instruction.address[1] = FLASH_SET_512_BYTE_1;
 146         ao_flash_instruction.address[2] = FLASH_SET_512_BYTE_2;
 147         ao_flash_send(&ao_flash_instruction, 4);
 148         ao_flash_cs_high();
 149 }
 150
 151
 152 static uint8_t
 153 ao_flash_read_status(void)
 154 {
 155         ao_flash_cs_low();
 156         ao_flash_instruction.instruction = FLASH_READ_STATUS;
 157         ao_flash_send(&ao_flash_instruction, 1);
 158         ao_flash_recv(&ao_flash_instruction, 1);
 159         ao_flash_cs_high();
 160         return ao_flash_instruction.instruction;
 161 }
 162
 163 #define FLASH_BLOCK_NONE        0xffff
 164
 165 static __xdata uint8_t ao_flash_data[FLASH_BLOCK_SIZE_MAX];
 166 static __pdata uint16_t ao_flash_block = FLASH_BLOCK_NONE;
 167 static __pdata uint8_t  ao_flash_block_dirty;
 168 static __pdata uint8_t  ao_flash_write_pending;
 169 static __pdata uint8_t  ao_flash_setup_done;
 170 static __data uint32_t  ao_flash_device_size;
 171 static __data uint8_t   ao_flash_block_shift;
 172
 173 static void
 174 ao_flash_setup(void)
 175 {
 176         uint8_t status;
 177
 178         if (ao_flash_setup_done)
 179                 return;
 180
 181         ao_mutex_get(&ao_flash_mutex);
 182         if (ao_flash_setup_done) {
 183                 ao_mutex_put(&ao_flash_mutex);
 184                 return;
 185         }
 186         ao_flash_setup_done = 1;
 187
 188         /* On first use, check to see if the flash chip has
 189          * been programmed to use 512 byte pages. If not, do so.
 190          * And then, because the flash part must be power cycled
 191          * for that change to take effect, panic.
 192          */
 193         status = ao_flash_read_status();
 194
 195         if (!(status & FLASH_STATUS_PAGESIZE_512)) {
 196                 ao_flash_set_pagesize_512();
 197                 ao_panic(AO_PANIC_FLASH);
 198         }
 199
 200         switch (status & 0x3c) {
 201
 202         /* AT45DB321D */
 203         case 0x34:
 204                 ao_flash_block_shift = 9;
 205                 ao_flash_device_size = ((uint32_t) 4 * (uint32_t) 1024 * (uint32_t) 1024);
 206                 break;
 207
 208         /* AT45DB161D */
 209         case 0x2c:
 210                 ao_flash_block_shift = 9;
 211                 ao_flash_device_size = ((uint32_t) 2 * (uint32_t) 1024 * (uint32_t) 1024);
 212                 break;
 213
 214         /* AT45DB081D */
 215         case 0x24:
 216                 ao_flash_block_shift = 8;
 217                 ao_flash_device_size = ((uint32_t) 1024 * (uint32_t) 1024);
 218                 break;
 219
 220         /* AT45DB041D */
 221         case 0x1c:
 222                 ao_flash_block_shift = 8;
 223                 ao_flash_device_size = ((uint32_t) 512 * (uint32_t) 1024);
 224                 break;
 225
 226         /* AT45DB021D */
 227         case 0x14:
 228                 ao_flash_block_shift = 8;
 229                 ao_flash_device_size = ((uint32_t) 256 * (uint32_t) 1024);
 230                 break;
 231
 232         /* AT45DB011D */
 233         case 0x0c:
 234                 ao_flash_block_shift = 8;
 235                 ao_flash_device_size = ((uint32_t) 128 * (uint32_t) 1024);
 236                 break;
 237
 238         default:
 239                 ao_panic(AO_PANIC_FLASH);
 240         }
 241         ao_mutex_put(&ao_flash_mutex);
 242 }
 243
 244 static void
 245 ao_flash_wait_write(void)
 246 {
 247         if (ao_flash_write_pending) {
 248                 for (;;) {
 249                         uint8_t status = ao_flash_read_status();
 250                         if ((status & FLASH_STATUS_RDY))
 251                                 break;
 252                 }
 253                 ao_flash_write_pending = 0;
 254         }
 255 }
 256
 257 /* Write the current block to the FLASHPROM */
 258 static void
 259 ao_flash_write_block(void)
 260 {
 261         ao_flash_wait_write();
 262         ao_flash_cs_low();
 263         ao_flash_instruction.instruction = FLASH_WRITE;
 264
 265         /* 13/14 block bits + 9/8 byte bits (always 0) */
 266         ao_flash_instruction.address[0] = ao_flash_block >> (16 - ao_flash_block_shift);
 267         ao_flash_instruction.address[1] = ao_flash_block << (ao_flash_block_shift - 8);
 268         ao_flash_instruction.address[2] = 0;
 269         ao_flash_send(&ao_flash_instruction, 4);
 270         ao_flash_send(ao_flash_data, FLASH_BLOCK_SIZE);
 271         ao_flash_cs_high();
 272         ao_flash_write_pending = 1;
 273 }
 274
 275 /* Read the current block from the FLASHPROM */
 276 static void
 277 ao_flash_read_block(void)
 278 {
 279         ao_flash_wait_write();
 280         ao_flash_cs_low();
 281         ao_flash_instruction.instruction = FLASH_READ;
 282
 283         /* 13/14 block bits + 9/8 byte bits (always 0) */
 284         ao_flash_instruction.address[0] = ao_flash_block >> (16 - ao_flash_block_shift);
 285         ao_flash_instruction.address[1] = ao_flash_block << (ao_flash_block_shift - 8);
 286         ao_flash_instruction.address[2] = 0;
 287         ao_flash_send(&ao_flash_instruction, 4);
 288         ao_flash_recv(ao_flash_data, FLASH_BLOCK_SIZE);
 289         ao_flash_cs_high();
 290 }
 291
 292 static void
 293 ao_flash_flush_internal(void)
 294 {
 295         if (ao_flash_block_dirty) {
 296                 ao_flash_write_block();
 297                 ao_flash_block_dirty = 0;
 298         }
 299 }
 300
 301 static void
 302 ao_flash_fill(uint16_t block)
 303 {
 304         if (block != ao_flash_block) {
 305                 ao_flash_flush_internal();
 306                 ao_flash_block = block;
 307                 ao_flash_read_block();
 308         }
 309 }
 310
 311 uint8_t
 312 ao_ee_write(uint32_t pos, uint8_t *buf, uint16_t len) __reentrant
 313 {
 314         uint16_t block;
 315         uint16_t this_len;
 316         uint16_t        this_off;
 317
 318         ao_flash_setup();
 319         if (pos >= FLASH_DATA_SIZE || pos + len > FLASH_DATA_SIZE)
 320                 return 0;
 321         while (len) {
 322
 323                 /* Compute portion of transfer within
 324                  * a single block
 325                  */
 326                 this_off = (uint16_t) pos & FLASH_BLOCK_MASK;
 327                 this_len = FLASH_BLOCK_SIZE - this_off;
 328                 block = (uint16_t) (pos >> FLASH_BLOCK_SHIFT);
 329                 if (this_len > len)
 330                         this_len = len;
 331
 332                 /* Transfer the data */
 333                 ao_mutex_get(&ao_flash_mutex); {
 334                         if (this_len != FLASH_BLOCK_SIZE)
 335                                 ao_flash_fill(block);
 336                         else {
 337                                 ao_flash_flush_internal();
 338                                 ao_flash_block = block;
 339                         }
 340                         memcpy(ao_flash_data + this_off, buf, this_len);
 341                         ao_flash_block_dirty = 1;
 342                 } ao_mutex_put(&ao_flash_mutex);
 343
 344                 /* See how much is left */
 345                 buf += this_len;
 346                 len -= this_len;
 347                 pos += this_len;
 348         }
 349         return 1;
 350 }
 351
 352 uint8_t
 353 ao_ee_read(uint32_t pos, uint8_t *buf, uint16_t len) __reentrant
 354 {
 355         uint16_t block;
 356         uint16_t this_len;
 357         uint16_t this_off;
 358
 359         ao_flash_setup();
 360         if (pos >= FLASH_DATA_SIZE || pos + len > FLASH_DATA_SIZE)
 361                 return 0;
 362         while (len) {
 363
 364
 365                 /* Compute portion of transfer within
 366                  * a single block
 367                  */
 368                 this_off = (uint16_t) pos & FLASH_BLOCK_MASK;
 369                 this_len = FLASH_BLOCK_SIZE - this_off;
 370                 block = (uint16_t) (pos >> FLASH_BLOCK_SHIFT);
 371                 if (this_len > len)
 372                         this_len = len;
 373
 374                 /* Transfer the data */
 375                 ao_mutex_get(&ao_flash_mutex); {
 376                         ao_flash_fill(block);
 377                         memcpy(buf, ao_flash_data + this_off, this_len);
 378                 } ao_mutex_put(&ao_flash_mutex);
 379
 380                 /* See how much is left */
 381                 buf += this_len;
 382                 len -= this_len;
 383                 pos += this_len;
 384         }
 385         return 1;
 386 }
 387
 388 void
 389 ao_ee_flush(void) __reentrant
 390 {
 391         ao_mutex_get(&ao_flash_mutex); {
 392                 ao_flash_flush_internal();
 393         } ao_mutex_put(&ao_flash_mutex);
 394 }
 395
 396 /*
 397  * Read/write the config block, which is in
 398  * the last block of the flash
 399  */
 400 uint8_t
 401 ao_ee_write_config(uint8_t *buf, uint16_t len) __reentrant
 402 {
 403         ao_flash_setup();
 404         if (len > FLASH_BLOCK_SIZE)
 405                 return 0;
 406         ao_mutex_get(&ao_flash_mutex); {
 407                 ao_flash_fill(FLASH_CONFIG_BLOCK);
 408                 memcpy(ao_flash_data, buf, len);
 409                 ao_flash_block_dirty = 1;
 410                 ao_flash_flush_internal();
 411         } ao_mutex_put(&ao_flash_mutex);
 412         return 1;
 413 }
 414
 415 uint8_t
 416 ao_ee_read_config(uint8_t *buf, uint16_t len) __reentrant
 417 {
 418         ao_flash_setup();
 419         if (len > FLASH_BLOCK_SIZE)
 420                 return 0;
 421         ao_mutex_get(&ao_flash_mutex); {
 422                 ao_flash_fill(FLASH_CONFIG_BLOCK);
 423                 memcpy(buf, ao_flash_data, len);
 424         } ao_mutex_put(&ao_flash_mutex);
 425         return 1;
 426 }
 427
 428 static void
 429 flash_dump(void) __reentrant
 430 {
 431         uint8_t b;
 432         uint16_t block;
 433         uint8_t i;
 434
 435         ao_cmd_hex();
 436         block = ao_cmd_lex_i;
 437         if (ao_cmd_status != ao_cmd_success)
 438                 return;
 439         i = 0;
 440         do {
 441                 if ((i & 7) == 0) {
 442                         if (i)
 443                                 putchar('\n');
 444                         ao_cmd_put16((uint16_t) i);
 445                 }
 446                 putchar(' ');
 447                 ao_ee_read(((uint32_t) block << 8) | i, &b, 1);
 448                 ao_cmd_put8(b);
 449                 ++i;
 450         } while (i != 0);
 451         putchar('\n');
 452 }
 453
 454 static void
 455 flash_store(void) __reentrant
 456 {
 457         uint16_t block;
 458         uint8_t i;
 459         uint16_t len;
 460         uint8_t b;
 461         uint32_t addr;
 462
 463         ao_cmd_hex();
 464         block = ao_cmd_lex_i;
 465         ao_cmd_hex();
 466         i = ao_cmd_lex_i;
 467         addr = ((uint32_t) block << 8) | i;
 468         ao_cmd_hex();
 469         len = ao_cmd_lex_i;
 470         if (ao_cmd_status != ao_cmd_success)
 471                 return;
 472         while (len--) {
 473                 ao_cmd_hex();
 474                 if (ao_cmd_status != ao_cmd_success)
 475                         return;
 476                 b = ao_cmd_lex_i;
 477                 ao_ee_write(addr, &b, 1);
 478                 addr++;
 479         }
 480         ao_ee_flush();
 481 }
 482
 483 static void
 484 flash_status(void) __reentrant
 485 {
 486         uint8_t status;
 487
 488         ao_mutex_get(&ao_flash_mutex); {
 489                 status = ao_flash_read_status();
 490                 printf ("Flash status: 0x%02x\n", status);
 491         } ao_mutex_put(&ao_flash_mutex);
 492 }
 493
 494 __code struct ao_cmds ao_flash_cmds[] = {
 495         { 'e', flash_dump,      "e <block>                          Dump a block of flash data" },
 496         { 'w', flash_store,     "w <block> <start> <len> <data> ... Write data to flash" },
 497         { 'f', flash_status,    "f                                  Show flash status register" },
 498         { 0,   flash_store, NULL },
 499 };
 500
 501 /*
 502  * To initialize the chip, set up the CS line and
 503  * the SPI interface
 504  */
 505 void
 506 ao_ee_init(void)
 507 {
 508         /* set up CS */
 509         FLASH_CS = 1;
 510         P1DIR |= (1 << FLASH_CS_INDEX);
 511         P1SEL &= ~(1 << FLASH_CS_INDEX);
 512
 513         /* Set up the USART pin assignment */
 514         PERCFG = (PERCFG & ~PERCFG_U0CFG_ALT_MASK) | PERCFG_U0CFG_ALT_2;
 515
 516         /* Ensure that USART0 takes precidence over USART1 for pins that
 517          * they share
 518          */
 519         P2SEL = (P2SEL & ~P2SEL_PRI3P1_MASK) | P2SEL_PRI3P1_USART0;
 520
 521         /* Make the SPI pins be controlled by the USART peripheral */
 522         P1SEL |= ((1 << 5) | (1 << 4) | (1 << 3));
 523
 524         /* Set up OUT DMA */
 525         ao_flash_dma_out_id = ao_dma_alloc(&ao_flash_dma_out_done);
 526
 527         /* Set up IN DMA */
 528         ao_flash_dma_in_id = ao_dma_alloc(&ao_flash_dma_in_done);
 529
 530         /* Set up the USART.
 531          *
 532          * SPI master mode
 533          */
 534         U0CSR = (UxCSR_MODE_SPI | UxCSR_RE | UxCSR_MASTER);
 535
 536         /* Set the baud rate and signal parameters
 537          *
 538          * The cc1111 is limited to a 24/8 MHz SPI clock,
 539          * while the at45db161d.h is limited to 20MHz. So,
 540          * use the 3MHz clock (BAUD_E 17, BAUD_M 0)
 541          */
 542         U0BAUD = 0;
 543         U0GCR = (UxGCR_CPOL_NEGATIVE |
 544                  UxGCR_CPHA_FIRST_EDGE |
 545                  UxGCR_ORDER_MSB |
 546                  (17 << UxGCR_BAUD_E_SHIFT));
 547         ao_cmd_register(&ao_flash_cmds[0]);
 548 }