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   1 /*
   2  * Copyright © 2009 Keith Packard <keithp@keithp.com>
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; version 2 of the License.
   7  *
   8  * This program is distributed in the hope that it will be useful, but
   9  * WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  11  * General Public License for more details.
  12  *
  13  * You should have received a copy of the GNU General Public License along
  14  * with this program; if not, write to the Free Software Foundation, Inc.,
  15  * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  16  */
  17
  18 #include "ao.h"
  19 #include "25lc1024.h"
  20
  21 /*
  22  * Using SPI on USART 0, with P1_2 as the chip select
  23  */
  24
  25 #define EE_CS           P1_2
  26 #define EE_CS_INDEX     2
  27
  28 __xdata uint8_t ao_ee_dma_in_done;
  29 __xdata uint8_t ao_ee_dma_out_done;
  30 __xdata uint8_t ao_ee_mutex;
  31
  32 uint8_t ao_ee_dma_out_id;
  33 uint8_t ao_ee_dma_in_id;
  34
  35 static __xdata uint8_t  ao_ee_const = 0xff;
  36
  37 #define ao_ee_delay() do { \
  38         _asm nop _endasm; \
  39         _asm nop _endasm; \
  40         _asm nop _endasm; \
  41 } while(0)
  42
  43 void ao_ee_cs_low(void)
  44 {
  45         ao_ee_delay();
  46         EE_CS = 0;
  47         ao_ee_delay();
  48 }
  49
  50 void ao_ee_cs_high(void)
  51 {
  52         ao_ee_delay();
  53         EE_CS = 1;
  54         ao_ee_delay();
  55 }
  56
  57 /* Send bytes over SPI.
  58  *
  59  * This sets up two DMA engines, one writing the data and another reading
  60  * bytes coming back.  We use the bytes coming back to tell when the transfer
  61  * is complete, as the transmit register is double buffered and hence signals
  62  * completion one byte before the transfer is actually complete
  63  */
  64 static void
  65 ao_ee_send(void __xdata *block, uint16_t len)
  66 {
  67         ao_dma_set_transfer(ao_ee_dma_in_id,
  68                             &U0DBUFXADDR,
  69                             &ao_ee_const,
  70                             len,
  71                             DMA_CFG0_WORDSIZE_8 |
  72                             DMA_CFG0_TMODE_SINGLE |
  73                             DMA_CFG0_TRIGGER_URX0,
  74                             DMA_CFG1_SRCINC_0 |
  75                             DMA_CFG1_DESTINC_0 |
  76                             DMA_CFG1_PRIORITY_NORMAL);
  77
  78         ao_dma_set_transfer(ao_ee_dma_out_id,
  79                             block,
  80                             &U0DBUFXADDR,
  81                             len,
  82                             DMA_CFG0_WORDSIZE_8 |
  83                             DMA_CFG0_TMODE_SINGLE |
  84                             DMA_CFG0_TRIGGER_UTX0,
  85                             DMA_CFG1_SRCINC_1 |
  86                             DMA_CFG1_DESTINC_0 |
  87                             DMA_CFG1_PRIORITY_NORMAL);
  88
  89         ao_dma_start(ao_ee_dma_in_id);
  90         ao_dma_start(ao_ee_dma_out_id);
  91         ao_dma_trigger(ao_ee_dma_out_id);
  92         __critical while (!ao_ee_dma_in_done)
  93                 ao_sleep(&ao_ee_dma_in_done);
  94 }
  95
  96 /* Receive bytes over SPI.
  97  *
  98  * This sets up tow DMA engines, one reading the data and another
  99  * writing constant values to the SPI transmitter as that is what
 100  * clocks the data coming in.
 101  */
 102 static void
 103 ao_ee_recv(void __xdata *block, uint16_t len)
 104 {
 105         ao_dma_set_transfer(ao_ee_dma_in_id,
 106                             &U0DBUFXADDR,
 107                             block,
 108                             len,
 109                             DMA_CFG0_WORDSIZE_8 |
 110                             DMA_CFG0_TMODE_SINGLE |
 111                             DMA_CFG0_TRIGGER_URX0,
 112                             DMA_CFG1_SRCINC_0 |
 113                             DMA_CFG1_DESTINC_1 |
 114                             DMA_CFG1_PRIORITY_NORMAL);
 115
 116         ao_dma_set_transfer(ao_ee_dma_out_id,
 117                             &ao_ee_const,
 118                             &U0DBUFXADDR,
 119                             len,
 120                             DMA_CFG0_WORDSIZE_8 |
 121                             DMA_CFG0_TMODE_SINGLE |
 122                             DMA_CFG0_TRIGGER_UTX0,
 123                             DMA_CFG1_SRCINC_0 |
 124                             DMA_CFG1_DESTINC_0 |
 125                             DMA_CFG1_PRIORITY_NORMAL);
 126
 127         ao_dma_start(ao_ee_dma_in_id);
 128         ao_dma_start(ao_ee_dma_out_id);
 129         ao_dma_trigger(ao_ee_dma_out_id);
 130         __critical while (!ao_ee_dma_in_done)
 131                 ao_sleep(&ao_ee_dma_in_done);
 132 }
 133
 134 #define EE_BLOCK        256
 135
 136 struct ao_ee_instruction {
 137         uint8_t instruction;
 138         uint8_t address[3];
 139 } __xdata ao_ee_instruction;
 140
 141 static void
 142 ao_ee_write_enable(void)
 143 {
 144         ao_ee_cs_low();
 145         ao_ee_instruction.instruction = EE_WREN;
 146         ao_ee_send(&ao_ee_instruction, 1);
 147         ao_ee_cs_high();
 148 }
 149
 150 static uint8_t
 151 ao_ee_rdsr(void)
 152 {
 153         ao_ee_cs_low();
 154         ao_ee_instruction.instruction = EE_RDSR;
 155         ao_ee_send(&ao_ee_instruction, 1);
 156         ao_ee_recv(&ao_ee_instruction, 1);
 157         ao_ee_cs_high();
 158         return ao_ee_instruction.instruction;
 159 }
 160
 161 static void
 162 ao_ee_wrsr(uint8_t status)
 163 {
 164         ao_ee_cs_low();
 165         ao_ee_instruction.instruction = EE_WRSR;
 166         ao_ee_instruction.address[0] = status;
 167         ao_ee_send(&ao_ee_instruction, 2);
 168         ao_ee_cs_high();
 169 }
 170
 171 #define EE_BLOCK_NONE   0xffff
 172
 173 static __xdata uint8_t ao_ee_data[EE_BLOCK];
 174 static __pdata uint16_t ao_ee_block = EE_BLOCK_NONE;
 175 static __pdata uint8_t  ao_ee_block_dirty;
 176
 177 /* Write the current block to the EEPROM */
 178 static void
 179 ao_ee_write_block(void)
 180 {
 181         uint8_t status;
 182
 183         status = ao_ee_rdsr();
 184         if (status & (EE_STATUS_BP0|EE_STATUS_BP1|EE_STATUS_WPEN)) {
 185                 status &= ~(EE_STATUS_BP0|EE_STATUS_BP1|EE_STATUS_WPEN);
 186                 ao_ee_wrsr(status);
 187         }
 188         ao_ee_write_enable();
 189         ao_ee_cs_low();
 190         ao_ee_instruction.instruction = EE_WRITE;
 191         ao_ee_instruction.address[0] = ao_ee_block >> 8;
 192         ao_ee_instruction.address[1] = ao_ee_block;
 193         ao_ee_instruction.address[2] = 0;
 194         ao_ee_send(&ao_ee_instruction, 4);
 195         ao_ee_send(ao_ee_data, EE_BLOCK);
 196         ao_ee_cs_high();
 197         for (;;) {
 198                 uint8_t status = ao_ee_rdsr();
 199                 if ((status & EE_STATUS_WIP) == 0)
 200                         break;
 201         }
 202 }
 203
 204 /* Read the current block from the EEPROM */
 205 static void
 206 ao_ee_read_block(void)
 207 {
 208         ao_ee_cs_low();
 209         ao_ee_instruction.instruction = EE_READ;
 210         ao_ee_instruction.address[0] = ao_ee_block >> 8;
 211         ao_ee_instruction.address[1] = ao_ee_block;
 212         ao_ee_instruction.address[2] = 0;
 213         ao_ee_send(&ao_ee_instruction, 4);
 214         ao_ee_recv(ao_ee_data, EE_BLOCK);
 215         ao_ee_cs_high();
 216 }
 217
 218 static void
 219 ao_ee_flush_internal(void)
 220 {
 221         if (ao_ee_block_dirty) {
 222                 ao_ee_write_block();
 223                 ao_ee_block_dirty = 0;
 224         }
 225 }
 226
 227 static void
 228 ao_ee_fill(uint16_t block)
 229 {
 230         if (block != ao_ee_block) {
 231                 ao_ee_flush_internal();
 232                 ao_ee_block = block;
 233                 ao_ee_read_block();
 234         }
 235 }
 236
 237 uint8_t
 238 ao_ee_write(uint32_t pos, uint8_t *buf, uint16_t len) __reentrant
 239 {
 240         uint16_t block;
 241         uint16_t this_len;
 242         uint8_t this_off;
 243
 244         if (pos >= AO_EE_DATA_SIZE || pos + len > AO_EE_DATA_SIZE)
 245                 return 0;
 246         while (len) {
 247
 248                 /* Compute portion of transfer within
 249                  * a single block
 250                  */
 251                 this_off = pos;
 252                 this_len = 256 - (uint16_t) this_off;
 253                 block = (uint16_t) (pos >> 8);
 254                 if (this_len > len)
 255                         this_len = len;
 256                 if (this_len & 0xff00)
 257                         ao_panic(AO_PANIC_EE);
 258
 259                 /* Transfer the data */
 260                 ao_mutex_get(&ao_ee_mutex); {
 261                         if (this_len != 256)
 262                                 ao_ee_fill(block);
 263                         else {
 264                                 ao_ee_flush_internal();
 265                                 ao_ee_block = block;
 266                         }
 267                         memcpy(ao_ee_data + this_off, buf, this_len);
 268                         ao_ee_block_dirty = 1;
 269                 } ao_mutex_put(&ao_ee_mutex);
 270
 271                 /* See how much is left */
 272                 buf += this_len;
 273                 len -= this_len;
 274         }
 275         return 1;
 276 }
 277
 278 uint8_t
 279 ao_ee_read(uint32_t pos, uint8_t *buf, uint16_t len) __reentrant
 280 {
 281         uint16_t block;
 282         uint16_t this_len;
 283         uint8_t this_off;
 284
 285         if (pos >= AO_EE_DATA_SIZE || pos + len > AO_EE_DATA_SIZE)
 286                 return 0;
 287         while (len) {
 288
 289                 /* Compute portion of transfer within
 290                  * a single block
 291                  */
 292                 this_off = pos;
 293                 this_len = 256 - (uint16_t) this_off;
 294                 block = (uint16_t) (pos >> 8);
 295                 if (this_len > len)
 296                         this_len = len;
 297                 if (this_len & 0xff00)
 298                         ao_panic(AO_PANIC_EE);
 299
 300                 /* Transfer the data */
 301                 ao_mutex_get(&ao_ee_mutex); {
 302                         ao_ee_fill(block);
 303                         memcpy(buf, ao_ee_data + this_off, this_len);
 304                 } ao_mutex_put(&ao_ee_mutex);
 305
 306                 /* See how much is left */
 307                 buf += this_len;
 308                 len -= this_len;
 309         }
 310         return 1;
 311 }
 312
 313 void
 314 ao_ee_flush(void) __reentrant
 315 {
 316         ao_mutex_get(&ao_ee_mutex); {
 317                 ao_ee_flush_internal();
 318         } ao_mutex_put(&ao_ee_mutex);
 319 }
 320
 321 /*
 322  * Read/write the config block, which is in
 323  * the last block of the ao_eeprom
 324  */
 325 uint8_t
 326 ao_ee_write_config(uint8_t *buf, uint16_t len) __reentrant
 327 {
 328         if (len > AO_EE_BLOCK_SIZE)
 329                 return 0;
 330         ao_mutex_get(&ao_ee_mutex); {
 331                 ao_ee_fill(AO_EE_CONFIG_BLOCK);
 332                 memcpy(ao_ee_data, buf, len);
 333                 ao_ee_block_dirty = 1;
 334                 ao_ee_flush_internal();
 335         } ao_mutex_put(&ao_ee_mutex);
 336         return 1;
 337 }
 338
 339 uint8_t
 340 ao_ee_read_config(uint8_t *buf, uint16_t len) __reentrant
 341 {
 342         if (len > AO_EE_BLOCK_SIZE)
 343                 return 0;
 344         ao_mutex_get(&ao_ee_mutex); {
 345                 ao_ee_fill(AO_EE_CONFIG_BLOCK);
 346                 memcpy(buf, ao_ee_data, len);
 347         } ao_mutex_put(&ao_ee_mutex);
 348         return 1;
 349 }
 350
 351 static void
 352 ee_dump(void)
 353 {
 354         __xdata uint8_t b;
 355         __xdata uint16_t block;
 356         __xdata uint8_t i;
 357
 358         ao_cmd_hex();
 359         block = ao_cmd_lex_i;
 360         if (ao_cmd_status != ao_cmd_success)
 361                 return;
 362         i = 0;
 363         do {
 364                 if ((i & 7) == 0) {
 365                         if (i)
 366                                 putchar('\n');
 367                         ao_cmd_put16((uint16_t) i);
 368                 }
 369                 putchar(' ');
 370                 ao_ee_read(((uint32_t) block << 8) | i, &b, 1);
 371                 ao_cmd_put8(b);
 372                 ++i;
 373         } while (i != 0);
 374         putchar('\n');
 375 }
 376
 377 static void
 378 ee_store(void)
 379 {
 380         __xdata uint16_t block;
 381         __xdata uint8_t i;
 382         __xdata uint16_t len;
 383         __xdata uint8_t b;
 384         __xdata uint32_t addr;
 385
 386         ao_cmd_hex();
 387         block = ao_cmd_lex_i;
 388         ao_cmd_hex();
 389         i = ao_cmd_lex_i;
 390         addr = ((uint32_t) block << 8) | i;
 391         ao_cmd_hex();
 392         len = ao_cmd_lex_i;
 393         if (ao_cmd_status != ao_cmd_success)
 394                 return;
 395         while (len--) {
 396                 ao_cmd_hex();
 397                 if (ao_cmd_status != ao_cmd_success)
 398                         return;
 399                 b = ao_cmd_lex_i;
 400                 ao_ee_write(addr, &b, 1);
 401                 addr++;
 402         }
 403         ao_ee_flush();
 404 }
 405
 406 __code struct ao_cmds ao_ee_cmds[] = {
 407         { 'e', ee_dump,         "e <block>                          Dump a block of EEPROM data" },
 408         { 'w', ee_store,        "w <block> <start> <len> <data> ... Write data to EEPROM" },
 409         { 0,   ee_store, NULL },
 410 };
 411
 412 /*
 413  * To initialize the chip, set up the CS line and
 414  * the SPI interface
 415  */
 416 void
 417 ao_ee_init(void)
 418 {
 419         /* set up CS */
 420         EE_CS = 1;
 421         P1DIR |= (1 << EE_CS_INDEX);
 422         P1SEL &= ~(1 << EE_CS_INDEX);
 423
 424         /* Set up the USART pin assignment */
 425         PERCFG = (PERCFG & ~PERCFG_U0CFG_ALT_MASK) | PERCFG_U0CFG_ALT_2;
 426
 427         /* Ensure that USART0 takes precidence over USART1 for pins that
 428          * they share
 429          */
 430         P2SEL = (P2SEL & ~P2SEL_PRI3P1_MASK) | P2SEL_PRI3P1_USART0;
 431
 432         /* Make the SPI pins be controlled by the USART peripheral */
 433         P1SEL |= ((1 << 5) | (1 << 4) | (1 << 3));
 434
 435         /* Set up OUT DMA */
 436         ao_ee_dma_out_id = ao_dma_alloc(&ao_ee_dma_out_done);
 437
 438         /* Set up IN DMA */
 439         ao_ee_dma_in_id = ao_dma_alloc(&ao_ee_dma_in_done);
 440
 441         /* Set up the USART.
 442          *
 443          * SPI master mode
 444          */
 445         U0CSR = (UxCSR_MODE_SPI | UxCSR_RE | UxCSR_MASTER);
 446
 447         /* Set the baud rate and signal parameters
 448          *
 449          * The cc1111 is limited to a 24/8 MHz SPI clock,
 450          * while the 25LC1024 is limited to 20MHz. So,
 451          * use the 3MHz clock (BAUD_E 17, BAUD_M 0)
 452          */
 453         U0BAUD = 0;
 454         U0GCR = (UxGCR_CPOL_NEGATIVE |
 455                  UxGCR_CPHA_FIRST_EDGE |
 456                  UxGCR_ORDER_MSB |
 457                  (17 << UxGCR_BAUD_E_SHIFT));
 458         ao_cmd_register(&ao_ee_cmds[0]);
 459 }