From fab1b2b01944a97bc9a7275a2df59fe22f42d81f Mon Sep 17 00:00:00 2001 From: bernhardheld Date: Mon, 14 Jul 2003 19:41:19 +0000 Subject: [PATCH 1/1] pic16 progress by Vangelis git-svn-id: https://sdcc.svn.sourceforge.net/svnroot/sdcc/trunk/sdcc@2735 4a8a32a2-be11-0410-ad9d-d568d2c75423 --- ChangeLog | 26 ++++++++++++++-- src/SDCCglobl.h | 1 + src/SDCCmain.c | 5 ++-- src/pic/Makefile | 2 ++ src/pic16/device.c | 4 ++- src/pic16/device.h | 8 +++++ src/pic16/gen.c | 40 ++++++++++++++++--------- src/pic16/gen.h | 2 ++ src/pic16/genarith.c | 23 ++++++++++---- src/pic16/glue.c | 33 +++++++++++++++----- src/pic16/main.c | 70 ++++++++++++++++++++++++++++++------------- src/pic16/pcode.c | 28 ++++++++--------- src/pic16/pcode.h | 2 +- src/pic16/pcodepeep.c | 14 +++++---- src/pic16/peeph.def | 37 ++++++++++++++++++++++- 15 files changed, 217 insertions(+), 78 deletions(-) diff --git a/ChangeLog b/ChangeLog index 99666497..e36c2f66 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,23 @@ +2003-07-14 Bernhard Held + + pic16 progress by Vangelis: + * src/SDCCglobl.h: + * src/SDCCmain.c: + * src/pic/Makefile: + * src/pic: + * pic/Makefile: + * pic16/device.c: + * pic16/device.h: + * pic16/gen.c: + * pic16/gen.h: + * pic16/genarith.c: + * pic16/glue.c: + * pic16/main.c: + * pic16/pcode.c: + * pic16/pcode.h: + * pic16/pcodepeep.c: + * pic16/peeph.def: + 2003-07-13 Jesus Calvino-Fraga * src/SDCCmain.c, src/SDCCglobl.h: added option --no-std-crt0 @@ -97,9 +117,9 @@ Scott D. for Vangelis Rokas (vrokas@otenet.gr). I (scott) don't know all the details, but essentially this set of changes enable the pic16 port to generate movff instructions and generate assembler - directives, - * src/SDCCmain.c: - * src/pic16/gen.c: + directives, + * src/SDCCmain.c: + * src/pic16/gen.c: * src/pic16/glue.c: * src/pic16/pcode.c: * src/pic16/device.c: diff --git a/src/SDCCglobl.h b/src/SDCCglobl.h index 6262f815..b09081bd 100644 --- a/src/SDCCglobl.h +++ b/src/SDCCglobl.h @@ -242,6 +242,7 @@ struct options int noCcodeInAsm; /* hide c-code from asm */ int iCodeInAsm; /* show i-code in asm */ int printSearchDirs; /* display the directories in the compiler's search path */ + int gen_banksel; /* enable the generation of the banksel assembler directive in pic16 port */ int vc_err_style; /* errors and warnings are compatible with Micro$oft visual studio */ int use_stdout; /* send errors to stdout instead of stderr */ int no_std_crt0; /*For the z80/gbz80 do not link default crt0.o*/ diff --git a/src/SDCCmain.c b/src/SDCCmain.c index 9368e9fe..9403075a 100644 --- a/src/SDCCmain.c +++ b/src/SDCCmain.c @@ -228,11 +228,10 @@ optionsTable[] = { #if !OPT_DISABLE_Z80 || !OPT_DISABLE_GBZ80 { 0, "--no-std-crt0", &options.no_std_crt0, "For the z80/gbz80 do not link default crt0.o"}, #endif - /* End of options */ -#if 0 /* 10jun03 !OPT_DISABLE_PIC16 */ - { 0, "--no-movff", &options.no_movff, "disable generating MOVFF opcode in PIC16 port"}, +#if !OPT_DISABLE_PIC16 { 0, "--gen-banksel", &options.gen_banksel, "enable the generation of banksel assembler directives in PIC16 port"}, #endif + /* End of options */ { 0, NULL } }; diff --git a/src/pic/Makefile b/src/pic/Makefile index 3b856364..6fff46fe 100644 --- a/src/pic/Makefile +++ b/src/pic/Makefile @@ -1,2 +1,4 @@ # Make all in this directory +PORT = pic + include ../port.mk diff --git a/src/pic16/device.c b/src/pic16/device.c index b04f455e..3996e450 100644 --- a/src/pic16/device.c +++ b/src/pic16/device.c @@ -77,6 +77,7 @@ static int num_of_supported_PICS = sizeof(Pics)/sizeof(PIC_device); static PIC_device *pic=NULL; AssignedMemory *pic16_finalMapping=NULL; +int pic16_finalMappingSize=0; #define DEFAULT_CONFIG_BYTE 0xff @@ -295,7 +296,8 @@ void pic16_dump_cblock(FILE *of) fputc('\n',of); - //pic16_finalMapping[start].reg->isEmitted = 1; +//#warning why is the following line commented out?! (VR) +// pic16_finalMapping[start].reg->isEmitted = 1; } } diff --git a/src/pic16/device.h b/src/pic16/device.h index f24cb7a8..3c683113 100644 --- a/src/pic16/device.h +++ b/src/pic16/device.h @@ -71,6 +71,14 @@ typedef struct AssignedMemory { */ extern AssignedMemory *pic16_finalMapping; + +/* + * pic16_finalMappingSize - Size of register assignments that pic16_finalMapping can hold + */ + +extern int pic16_finalMappingSize; + + #define PROCESSOR_NAMES 4 /* Processor unique attributes */ typedef struct PIC_device { diff --git a/src/pic16/gen.c b/src/pic16/gen.c index e73f4cca..405bbbe5 100644 --- a/src/pic16/gen.c +++ b/src/pic16/gen.c @@ -289,8 +289,8 @@ static regs *getFreePtr (iCode *ic, asmop **aopp, bool result) bool r0iu = FALSE , r1iu = FALSE; bool r0ou = FALSE , r1ou = FALSE; - //fprintf(stderr, "%s:%d: getting free ptr from ic = %c\n", __FUNCTION__, __LINE__, ic->op); + /* the logic: if r0 & r1 used in the instruction then we are in trouble otherwise */ @@ -754,7 +754,7 @@ void pic16_aopOp (operand *op, iCode *ic, bool result) if (!op) return ; - // DEBUGpic16_emitcode(";","%d",__LINE__); + DEBUGpic16_emitcode(";","%d",__LINE__); /* if this a literal */ if (IS_OP_LITERAL(op)) { op->aop = aop = newAsmop(AOP_LIT); @@ -1272,7 +1272,9 @@ static pCodeOp *popRegFromString(char *str, int size, int offset) if(PCOR(pcop)->r == NULL) { //fprintf(stderr,"%d - couldn't find %s in allocated registers, size =%d\n",__LINE__,aop->aopu.aop_dir,aop->size); PCOR(pcop)->r = pic16_allocRegByName (pcop->name,size); + //fprintf(stderr, "allocating new register -> %s\n", str); + DEBUGpic16_emitcode(";","%d %s offset=%d - had to alloc by reg name",__LINE__,pcop->name,offset); } else { DEBUGpic16_emitcode(";","%d %s offset=%d",__LINE__,pcop->name,offset); @@ -2737,10 +2739,16 @@ static void genFunction (iCode *ic) /* if this is an interrupt service routine then save acc, b, dpl, dph */ if (IFFUNC_ISISR(sym->type)) { - pic16_addpCode2pBlock(pb,pic16_newpCode(POC_BRA,pic16_newpCodeOp("END_OF_INTERRUPT+2",PO_STR))); - pic16_emitpcodeNULLop(POC_NOP); - pic16_emitpcodeNULLop(POC_NOP); - pic16_emitpcodeNULLop(POC_NOP); + +#if 0 + pic16_addpCode2pBlock(pb,pic16_newpCode(POC_BRA,pic16_newpCodeOp("END_OF_INTERRUPT+2",PO_STR))); + + /* what is the reason of having these 3 NOPS? VR - 030701 */ + pic16_emitpcodeNULLop(POC_NOP); + pic16_emitpcodeNULLop(POC_NOP); + pic16_emitpcodeNULLop(POC_NOP); +#endif + pic16_emitpcode(POC_MOVWF, pic16_popCopyReg(&pic16_pc_wsave)); pic16_emitpcode(POC_SWAPFW, pic16_popCopyReg(&pic16_pc_status)); pic16_emitpcode(POC_CLRF, pic16_popCopyReg(&pic16_pc_status)); @@ -2980,14 +2988,17 @@ static void genEndFunction (iCode *ic) _G.debugLine = 0; } - pic16_emitcode ("reti",""); +// pic16_emitcode ("reti",""); pic16_emitpcode(POC_CLRF, pic16_popCopyReg(&pic16_pc_status)); pic16_emitpcode(POC_SWAPFW, pic16_popCopyReg(&pic16_pc_ssave)); pic16_emitpcode(POC_MOVWF, pic16_popCopyReg(&pic16_pc_status)); pic16_emitpcode(POC_SWAPF, pic16_popCopyReg(&pic16_pc_wsave)); pic16_emitpcode(POC_SWAPFW, pic16_popCopyReg(&pic16_pc_wsave)); + +#if 0 pic16_addpCode2pBlock(pb,pic16_newpCodeLabel("END_OF_INTERRUPT",-1)); +#endif pic16_emitpcodeNULLop(POC_RETFIE); @@ -9376,8 +9387,7 @@ static void genAssign (iCode *ic) } else { DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); - if(!options_no_movff) { - +#if 1 /* This is a hack to turn MOVFW/MOVWF pairs to MOVFF command. It normally should work, but mind that thw W register live range is not checked, so if the code generator assumes that the W @@ -9389,13 +9399,13 @@ static void genAssign (iCode *ic) Vangelis Rokas 030603 (vrokas@otenet.gr) */ - pic16_emitpcode(POC_MOVFF, pic16_popGet2(AOP(right), AOP(result), offset)); - } else { + pic16_emitpcode(POC_MOVFF, pic16_popGet2(AOP(right), AOP(result), offset)); +#else /* This is the old code, which is assumed(?!) that works fine(!?) */ - pic16_emitpcode(POC_MOVFW, pic16_popGet(AOP(right),offset)); - pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),offset)); - } + pic16_emitpcode(POC_MOVFW, pic16_popGet(AOP(right),offset)); + pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),offset)); +#endif } offset++; @@ -9993,6 +10003,8 @@ void genpic16Code (iCode *lic) } #endif +// dumpiCode(lic); + for (ic = lic ; ic ; ic = ic->next ) { // fprintf(stderr, "; VR = %c %x\n", ic->op, ic->op); diff --git a/src/pic16/gen.h b/src/pic16/gen.h index 8b72f5da..1b737d4c 100644 --- a/src/pic16/gen.h +++ b/src/pic16/gen.h @@ -110,6 +110,7 @@ extern unsigned pic16_fReturnSizePic; #define MOVA(x) if (strcmp(x,"a") && strcmp(x,"acc")) pic16_emitcode(";XXX mov","a,%s %s,%d",x,__FILE__,__LINE__); #define CLRC pic16_emitcode(";XXX clr","c %s,%d",__FILE__,__LINE__); + #define BIT_NUMBER(x) (x & 7) #define BIT_REGISTER(x) (x>>3) @@ -177,5 +178,6 @@ void pic16_freeAsmop (operand *op, asmop *aaop, iCode *ic, bool pop); const char *pic16_pCodeOpType( pCodeOp *pcop); +void dumpiCode(iCode *lic); #endif diff --git a/src/pic16/genarith.c b/src/pic16/genarith.c index 218c263a..0bf43881 100644 --- a/src/pic16/genarith.c +++ b/src/pic16/genarith.c @@ -180,7 +180,7 @@ bool pic16_genPlusIncr (iCode *ic) DEBUGpic16_emitcode ("; ","%s %d",__FUNCTION__,__LINE__); /* if the literal value of the right hand side is greater than 1 then it is faster to add */ - if ((icount = (unsigned int) floatFromVal (AOP(IC_RIGHT(ic))->aopu.aop_lit)) > 2) + if ((icount = (unsigned int) floatFromVal (AOP(IC_RIGHT(ic))->aopu.aop_lit)) > 1) // this was > 2 why? VR return FALSE ; /* if increment 16 bits in register */ @@ -202,7 +202,7 @@ bool pic16_genPlusIncr (iCode *ic) } DEBUGpic16_emitcode ("; ","%s %d",__FUNCTION__,__LINE__); - /* if left is in accumulator - probably a bit operation*/ + /* if left is in accumulator - probably a bit operation*/ // VR - why this is a bit operation?! if( strcmp(pic16_aopGet(AOP(IC_LEFT(ic)),0,FALSE,FALSE),"a") && (AOP_TYPE(IC_RESULT(ic)) == AOP_CRY) ) { @@ -778,20 +778,33 @@ static void genAddLit (iCode *ic, int lit) } /*-----------------------------------------------------------------*/ -/* pic16_genPlus - generates code for addition */ +/* pic16_genPlus - generates code for addition */ /*-----------------------------------------------------------------*/ void pic16_genPlus (iCode *ic) { int size, offset = 0; - + operand *result, *left, *right; + /* special cases :- */ DEBUGpic16_emitcode ("; ***","%s %d",__FUNCTION__,__LINE__); + +#if 1 + result = IC_RESULT(ic); + left = IC_LEFT(ic); + right = IC_RIGHT(ic); + pic16_aopOp (left,ic,FALSE); + pic16_aopOp (right,ic,FALSE); + pic16_aopOp (result,ic,TRUE); + DEBUGpic16_pic16_AopType(__LINE__,left, right, result); + +#else pic16_aopOp (IC_LEFT(ic),ic,FALSE); pic16_aopOp (IC_RIGHT(ic),ic,FALSE); pic16_aopOp (IC_RESULT(ic),ic,TRUE); - DEBUGpic16_pic16_AopType(__LINE__,IC_LEFT(ic),IC_RIGHT(ic),IC_RESULT(ic)); +#endif + /* if literal, literal on the right or if left requires ACC or right is already diff --git a/src/pic16/glue.c b/src/pic16/glue.c index f9728d6c..69db51ea 100644 --- a/src/pic16/glue.c +++ b/src/pic16/glue.c @@ -566,8 +566,14 @@ pic16createInterruptVect (FILE * vFile) return; } - fprintf (vFile, ";\t.area\t%s\n", CODE_NAME); - fprintf (vFile, ";__interrupt_vect:\n"); +/* + * update started by Vangelis Rokas on 19-Jun-2003 + * all fprintf() calls are prefixed with ';' so they seem + * as comments to the assembler. I (VR) removed them */ + +// fprintf (vFile, "\t.area\t%s\n", CODE_NAME); + fprintf(vFile, "\tcode\t0x0000\n"); + fprintf (vFile, "__interrupt_vect:\n"); if (!port->genIVT || !(port->genIVT (vFile, interrupts, maxInterrupts))) @@ -795,7 +801,7 @@ pic16glue () pic16emitOverlay(ovrFile); - pic16_AnalyzepCode('*'); + pic16_AnalyzepCode('*'); //#ifdef PCODE_DEBUG //pic16_printCallTree(stderr); @@ -803,7 +809,7 @@ pic16glue () pic16_InlinepCode(); - pic16_AnalyzepCode('*'); + pic16_AnalyzepCode('*'); pic16_pcode_test(); @@ -898,7 +904,10 @@ pic16glue () copyFile (asmFile, bit->oFile); - fprintf (asmFile, "\tORG 0\n"); +/* the following is commented out. the CODE directive will be + used instead before code */ + +// fprintf (asmFile, "\tORG 0\n"); /* copy the interrupt vector table */ if (mainf && IFFUNC_HASBODY(mainf->type)) { @@ -922,9 +931,12 @@ pic16glue () fprintf (asmFile, ";\t.area %s\n", port->mem.static_name); /* MOF */ fprintf (asmFile, ";\t.area %s\n", port->mem.post_static_name); fprintf (asmFile, ";\t.area %s\n", port->mem.static_name); - + if (mainf && IFFUNC_HASBODY(mainf->type)) { fprintf (asmFile,"__sdcc_gsinit_startup:\n"); + +#if 0 + /* 8051 legacy (?!) - VR 20-Jun-2003 */ /* if external stack is specified then the higher order byte of the xdatalocation is going into P2 and the lower order going into @@ -935,6 +947,7 @@ pic16glue () fprintf(asmFile,";\tmov\t_spx,#0x%02x\n", (unsigned int)options.xdata_loc & 0xff); } +#endif } @@ -945,7 +958,7 @@ pic16glue () * by the ugly shucking and jiving about 20 lines ago. */ fprintf(asmFile, ";\t.area %s\n", port->mem.post_static_name); - fprintf (asmFile,";\tljmp\t__sdcc_program_startup\n"); + fprintf (asmFile,"\tgoto\t__sdcc_program_startup\n"); } /* copy over code */ @@ -956,9 +969,15 @@ pic16glue () //copyFile (stderr, code->oFile); + fprintf(asmFile, "; I code from now on!\n"); pic16_copypCode(asmFile, 'I'); + + fprintf(asmFile, "; dbName from now on!\n"); pic16_copypCode(asmFile, statsg->dbName); + + fprintf(asmFile, "; X code from now on!\n"); pic16_copypCode(asmFile, 'X'); + fprintf(asmFile, "; M code from now on!\n"); pic16_copypCode(asmFile, 'M'); pic16_copypCode(asmFile, code->dbName); pic16_copypCode(asmFile, 'P'); diff --git a/src/pic16/main.c b/src/pic16/main.c index abd6c3a5..30153b2a 100644 --- a/src/pic16/main.c +++ b/src/pic16/main.c @@ -57,6 +57,7 @@ _pic16_init (void) { asm_addTree (&asm_asxxxx_mapping); pic16_pCodeInitRegisters(); + maxInterrupts = 2; } static void @@ -265,26 +266,53 @@ _pic16_genIVT (FILE * of, symbol ** interrupts, int maxInterrupts) { int i; +#if 0 if (options.model != MODEL_FLAT24) { /* Let the default code handle it. */ return FALSE; } +#endif + + /* PIC18F family has only two interrupts, the high and the low + * priority interrupts, which reside in 0x0008 and 0x0018 respectively */ + + fprintf(of, "; RESET vector\n"); + fprintf(of, "\tgoto\t__sdcc_gsinit_startup\n"); + fprintf(of, "\tres 2\n"); - fprintf (of, "\t;ajmp\t__sdcc_gsinit_startup\n"); + fprintf(of, "; High priority interrupt vector 0x0008\n"); + + if(interrupts[1]) { + fprintf(of, "\tgoto\t%s\n", interrupts[1]->rname); + fprintf(of, "\tres\t6\n"); + } else { + fprintf(of, "\tretfie\n"); + fprintf(of, "\tres\t14\n"); + } + + fprintf(of, "; Low priority interrupt vector 0x0018\n"); + if(interrupts[2]) { + fprintf(of, "\tgoto\t%s\n", interrupts[2]->rname); + } else { + fprintf(of, "\tretfie\n"); + } +#if 0 /* now for the other interrupts */ for (i = 0; i < maxInterrupts; i++) { + fprintf(of, "; %s priority interrupt vector 0x%s\n", (i==0)?"high":"low", (i==0)?"0008":"0018"); if (interrupts[i]) { - fprintf (of, "\t;ljmp\t%s\n\t.ds\t4\n", interrupts[i]->rname); + fprintf (of, "\tgoto\t%s\n\tres\t4\n", interrupts[i]->rname); } else { - fprintf (of, "\t;reti\n\t.ds\t7\n"); + fprintf (of, "\tretfie\n\tres\t7\n"); } } +#endif return TRUE; } @@ -360,7 +388,7 @@ PORT pic16_port = TARGET_ID_PIC16, "pic16", "MCU PIC16", /* Target name */ - "p18f452", /* Processor */ + "p18f442", /* Processor */ { pic16glue, TRUE, /* Emit glue around main */ @@ -396,23 +424,23 @@ PORT pic16_port = */ }, { - "XSEG (XDATA)", - "STACK (DATA)", - "CSEG (CODE)", - "DSEG (DATA)", - "ISEG (DATA)", - "XSEG (XDATA)", - "BSEG (BIT)", - "RSEG (DATA)", - "GSINIT (CODE)", - "OSEG (OVR,DATA)", - "GSFINAL (CODE)", - "HOME (CODE)", - NULL, // xidata - NULL, // xinit - NULL, - NULL, - 1 // code is read only + "XSEG (XDATA)", // xstack + "STACK (DATA)", // istack + "CSEG (CODE)", // code + "DSEG (DATA)", // data + "ISEG (DATA)", // idata + "XSEG (XDATA)", // xdata + "BSEG (BIT)", // bit + "RSEG (DATA)", // reg + "GSINIT (CODE)", // static + "OSEG (OVR,DATA)", // overlay + "GSFINAL (CODE)", // post static + "HOME (CODE)", // home + NULL, // xidata + NULL, // xinit + NULL, // default location for auto vars + NULL, // default location for global vars + 1 // code is read only }, { NULL, NULL }, { diff --git a/src/pic16/pcode.c b/src/pic16/pcode.c index da76025f..b4bbe2db 100644 --- a/src/pic16/pcode.c +++ b/src/pic16/pcode.c @@ -70,8 +70,6 @@ static int mnemonics_initialized = 0; static hTab *pic16MnemonicsHash = NULL; static hTab *pic16pCodePeepCommandsHash = NULL; -int options_gen_banksel = 1; - static pFile *the_pFile = NULL; static pBlock *pb_dead_pcodes = NULL; @@ -2166,7 +2164,7 @@ pCodeInstruction pic16_pciSWAPFW = { }; -#if 1 +#if 0 // mdubuc - Remove TRIS pCodeInstruction pic16_pciTRIS = { @@ -2538,7 +2536,7 @@ void pic16initMnemonics(void) pic16Mnemonics[POC_SUBFWB_D1] = &pic16_pciSUBFWB_D1; pic16Mnemonics[POC_SWAPF] = &pic16_pciSWAPF; pic16Mnemonics[POC_SWAPFW] = &pic16_pciSWAPFW; - pic16Mnemonics[POC_TRIS] = &pic16_pciTRIS; +// pic16Mnemonics[POC_TRIS] = &pic16_pciTRIS; pic16Mnemonics[POC_TSTFSZ] = &pic16_pciTSTFSZ; pic16Mnemonics[POC_XORLW] = &pic16_pciXORLW; pic16Mnemonics[POC_XORWF] = &pic16_pciXORWF; @@ -3780,7 +3778,6 @@ char *pic16_get_op(pCodeOp *pcop,char *buffer, size_t size) } - /*-----------------------------------------------------------------*/ /* pic16_get_op2 - variant to support two memory operand commands */ /*-----------------------------------------------------------------*/ @@ -3923,17 +3920,12 @@ static char *pCode2str(char *str, size_t size, pCode *pc) if( (PCI(pc)->num_ops >= 1) && (PCI(pc)->pcop)) { -#if 1 if(PCI(pc)->is2MemOp) { -// fprintf(stderr, "HELP !\n"); -#if 1 SAFE_snprintf(&s,&size, "%s,%s", pic16_get_op(PCOP(PCI(pc)->pcop), NULL, 0), pic16_get_op2(PCOP(PCI(pc)->pcop), NULL, 0)); break; -#endif } -#endif if(PCI(pc)->isBitInst) { if(PCI(pc)->pcop->type == PO_GPR_BIT) { @@ -5252,7 +5244,6 @@ static void insertBankSwitch(int position, pCode *pc, int bsr) if(!pc) return; - /* * if bsr == -1 then do not insert a MOVLB instruction, but rather * insert a BANKSEL assembler directive for the symbol used by @@ -5260,8 +5251,9 @@ static void insertBankSwitch(int position, pCode *pc, int bsr) * bank at linking time */ - if(!options_gen_banksel || bsr != -1) { - new_pc = pic16_newpCode(POC_MOVLB, pic16_newpCodeOpLit(bsr)); + if(!options.gen_banksel || bsr != -1) { +// new_pc = pic16_newpCode(POC_MOVLB, pic16_newpCodeOpLit(bsr)); + return; } else { /* emit the BANKSEL [symbol] */ @@ -5991,7 +5983,7 @@ static void pic16_FixRegisterBanking(pBlock *pb) // if (cur_bank != reg_bank) { cur_bank = reg_bank; - insertBankSwitch(0, pc, (options_gen_banksel)?-1:cur_bank); //cur_bank); + insertBankSwitch(0, pc, (options.gen_banksel)?-1:cur_bank); //cur_bank); // } }else { @@ -6222,7 +6214,9 @@ static void AnalyzeFlow(int level) // for(pb = the_pFile->pbHead; pb; pb = pb->next) pic16_pCodeRegOptimizeRegUsage(level); - OptimizepCode('*'); + + if(!options.nopeep) + OptimizepCode('*'); /* @@ -6428,7 +6422,9 @@ void pic16_AnalyzepCode(char dbName) } } - changes = OptimizepCode(dbName); + if(!options.nopeep) + changes = OptimizepCode(dbName); + else changes = 0; } while(changes && (i++ < MAX_PASSES)); diff --git a/src/pic16/pcode.h b/src/pic16/pcode.h index 54f76e14..3ffbd3c7 100644 --- a/src/pic16/pcode.h +++ b/src/pic16/pcode.h @@ -264,7 +264,7 @@ typedef enum POC_SUBFWB_D1, POC_SWAPF, POC_SWAPFW, - POC_TRIS , // To be removed +// POC_TRIS , // To be removed POC_TSTFSZ, POC_XORLW, POC_XORWF, diff --git a/src/pic16/pcodepeep.c b/src/pic16/pcodepeep.c index b62d9c63..a6786be4 100644 --- a/src/pic16/pcodepeep.c +++ b/src/pic16/pcodepeep.c @@ -886,7 +886,7 @@ static int pcComparePattern(pCodeToken *pct, char *pat, int max_tokens) return (i+1); } - //dump1Token(*pat); DFPRINTF((stderr,"\n")); +// dump1Token(*pat); fputc('\n', stderr); DFPRINTF((stderr,"\n")); if(pct->tt != *pat) return 0; @@ -1198,6 +1198,7 @@ static void peepRuleBlock2pCodeBlock( lineNode *ln, pCodeWildBlock *pcwb) for( ; ln; ln = ln->next) { //DFPRINTF((stderr,"%s\n",ln->line)); +// fprintf(stderr, "peep rule : %s\n", ln->line); tokenizeLineNode(ln->line); @@ -1205,7 +1206,7 @@ static void peepRuleBlock2pCodeBlock( lineNode *ln, pCodeWildBlock *pcwb) int i; fprintf(stderr,"ERROR assembling line:\n%s\n",ln->line); fprintf(stderr,"Tokens:\n"); - for(i=0; i<5; i++) + for(i=0; i<8; i++) dump1Token(tokArr[i].tt); fputc('\n',stderr); exit (1); @@ -1349,7 +1350,7 @@ void pic16_peepRules2pCode(peepRule *rules) peepRuleBlock2pCodeBlock(pr->match, ¤tRule->target); //DFPRINTF((stderr,"finished target, here it is in pcode form:\n")); - //pic16_printpBlock(stderr, currentRule->target.pb); +// pic16_printpBlock(stderr, currentRule->target.pb); //DFPRINTF((stderr,"target with labels merged:\n")); //pic16_pBlockMergeLabels(curBlock); @@ -1514,13 +1515,14 @@ static int pCodeOpCompare(pCodeOp *pcops, pCodeOp *pcopd) if(!pcops || !pcopd) return 0; -/* + +#if 1 fprintf(stderr," Comparing operands %s", pic16_get_op( pcops,NULL,0)); fprintf(stderr," to %s\n", pic16_get_op( pcopd,NULL,0)); -*/ +#endif if(pcops->type != pcopd->type) { //fprintf(stderr," - fail - diff types\n"); @@ -2066,7 +2068,7 @@ int pic16_pCodePeepMatchRule(pCode *pc) if(!pcin && pct) { DFPRINTF((stderr," partial match... no more code\n")); - fprintf(stderr," partial match... no more code\n"); +// fprintf(stderr," partial match... no more code\n"); matched = 0; } if(!pct) { diff --git a/src/pic16/peeph.def b/src/pic16/peeph.def index 1d8a2750..2eb4dcbf 100644 --- a/src/pic16/peeph.def +++ b/src/pic16/peeph.def @@ -289,9 +289,44 @@ replace restart { // From: Vangelis Rokas (vrokas@otenet.gr) //replace { -// movf %1,W +// movf %1,w // movwf %2 //} by { // ; peep 12 - Use movff to move source to dest // movff %1, %2 //} + +//replace restart { +// banksel %1 +// banksel %2 +//} by { +// ; peep 13 - remove redudant banksel directive +// banksel %2 +//} + +//replace restart { +// movff %1,%2 +// movf %1,w +//} by { +// ; peep 14a - movff/movf is 6 bytes long, movfw/movwf is 4 +// movf %1,w +// movwf %2 +//} + +//replace restart { +// movff %1,%2 +// movff %1,%3 +//} by { +// ; peep 14b - movff/movff is 8 bytes long movf/mowf/movwf is 6 +// movf %1,w +// movwf %2 +// movwf %3 +//} + +replace { + movff %1,%2 +} by { + ; peep xxx - test peep to see if peep rules can handle movff + movf %1,w + movwf %2 +} -- 2.30.2