From f5d0b4482025a6fddd4d37ce3bac5d037c343257 Mon Sep 17 00:00:00 2001 From: borutr Date: Tue, 17 Apr 2007 06:20:14 +0000 Subject: [PATCH] * device/lib/ds400/tinibios.c, device/lib/hc08/_divuint.c, device/lib/hc08/_divulong.c: replaced _asm and _endasm keywords with their double underscore equivalent git-svn-id: https://sdcc.svn.sourceforge.net/svnroot/sdcc/trunk/sdcc@4752 4a8a32a2-be11-0410-ad9d-d568d2c75423 --- ChangeLog | 6 +- device/lib/ds400/tinibios.c | 230 ++++++++--------- device/lib/hc08/_divuint.c | 136 +++++----- device/lib/hc08/_divulong.c | 500 ++++++++++++++++++------------------ 4 files changed, 438 insertions(+), 434 deletions(-) diff --git a/ChangeLog b/ChangeLog index 65493c02..9995d465 100644 --- a/ChangeLog +++ b/ChangeLog @@ -5,10 +5,14 @@ 2007-04-17 Borut Razem * doc/sdccman.lyx: fixed #1701874: Mac OSX references in SDCC manual + * device/lib/ds400/tinibios.c, device/lib/hc08/_divuint.c, + device/lib/hc08/_divulong.c: replaced _asm and _endasm keywords + with their double underscore equivalent 2007-04-14 Borut Razem - * doc/sdccman.lyx: some additional "freeware" replaced with "free open source" + * doc/sdccman.lyx: some additional "freeware" replaced with "free open + source" 2007-04-13 Borut Razem diff --git a/device/lib/ds400/tinibios.c b/device/lib/ds400/tinibios.c index 5c2f55d6..3a8e0f3e 100755 --- a/device/lib/ds400/tinibios.c +++ b/device/lib/ds400/tinibios.c @@ -1,24 +1,24 @@ /*------------------------------------------------------------------------- tinibios.c - startup and serial routines for the DS80C400 (tested on TINIM400) - + Written By - Johan Knol, johan.knol@iduna.nl - + Further hacked by Kevin Vigor with invaluable assistance from Bob Heise. - + This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2, or (at your option) any later version. - + This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. - + You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - + In other words, you are welcome to use, share and improve this program. You are forbidden to forbid anyone else to use, share and improve what you give them. Help stamp out software-hoarding! @@ -33,34 +33,34 @@ unsigned char _sdcc_external_startup(void) { - IE = 0; // Disable all interrupts. + IE = 0; // Disable all interrupts. - PSW = 0; - + PSW = 0; + __asm - ; save the 24-bit return address - pop ar2; msb - pop ar1 - pop ar0; lsb + ; save the 24-bit return address + pop ar2; msb + pop ar1 + pop ar0; lsb - mov _ESP,#0x00; reinitialize the stack - mov _SP,#0x00 + mov _ESP,#0x00; reinitialize the stack + mov _SP,#0x00 - ; restore the 24-bit return address - push ar0; lsb - push ar1 - push ar2; msb + ; restore the 24-bit return address + push ar0; lsb + push ar1 + push ar2; msb __endasm; - - // Stub: call rom_init here, then fixup IVT. - // - - Serial0Init(1, 0); // baud argument ignored. - - IE = 0x80; // Enable interrupts. - - return 0; + + // Stub: call rom_init here, then fixup IVT. + // + + Serial0Init(1, 0); // baud argument ignored. + + IE = 0x80; // Enable interrupts. + + return 0; } // now the serial0 stuff @@ -92,18 +92,18 @@ void Serial0Init (unsigned long baud, unsigned char buffered) { ES0 = 0; // disable serial channel 0 interrupt -#if 0 +#if 0 // Need no port setup, done by boot rom. baud; #else - SCON0 = 0x5A; // 10 bit serial 0, use timer baud rate, enable recieving - RCAP2H = (TIMER_RELOAD >> 8) & 0xff; - RCAP2L = TIMER_RELOAD & 0xff; - T2CON = 0x30; // Enable timer 2 for serial port - TR2 = 1; // Set timer 2 to run - - baud; -#endif + SCON0 = 0x5A; // 10 bit serial 0, use timer baud rate, enable recieving + RCAP2H = (TIMER_RELOAD >> 8) & 0xff; + RCAP2L = TIMER_RELOAD & 0xff; + T2CON = 0x30; // Enable timer 2 for serial port + TR2 = 1; // Set timer 2 to run + + baud; +#endif serial0Buffered=buffered; @@ -119,14 +119,14 @@ void Serial0Init (unsigned long baud, unsigned char buffered) void Serial0SwitchToBuffered(void) { - IE &= ~0x80; - - serial0Buffered = 1; - installInterrupt(Serial0IrqHandler, 0x23); - RI_0=TI_0=0; // clear "pending" interrupts - ES0 = 1; // enable serial channel 0 interrupt - - IE |= 0x80; + IE &= ~0x80; + + serial0Buffered = 1; + installInterrupt(Serial0IrqHandler, 0x23); + RI_0=TI_0=0; // clear "pending" interrupts + ES0 = 1; // enable serial channel 0 interrupt + + IE |= 0x80; } void Serial0IrqHandler (void) __interrupt 4 @@ -220,21 +220,21 @@ void Serial0Flush() void ClockInit() { - // nada, all done by DSS_rom_init + // nada, all done by DSS_rom_init } // we can't just use milliSeconds unsigned long ClockTicks(void) { - return task_gettimemillis_long(); + return task_gettimemillis_long(); } void ClockMilliSecondsDelay(unsigned long delay) { unsigned long ms = task_gettimemillis_long() + delay; - while (ms > task_gettimemillis_long()) - ; + while (ms > task_gettimemillis_long()) + ; } // Return the start of the XI_SEG. Really just a workaround for the @@ -243,10 +243,10 @@ void ClockMilliSecondsDelay(unsigned long delay) // the linker. static void __xdata *_xisegStart(void) __naked { - _asm - mov dptr, #(s_XISEG) - ret - _endasm; + __asm + mov dptr, #(s_XISEG) + ret + __endasm; } // Return the length of the XI_SEG. Really just a workaround for the @@ -255,22 +255,22 @@ static void __xdata *_xisegStart(void) __naked // the linker. static unsigned _xisegLen(void) __naked { - __asm - mov dptr, #(l_XISEG) - ret - __endasm; + __asm + mov dptr, #(l_XISEG) + ret + __endasm; } // Returns the address of the first byte available for heap memory, // i.e. the first byte following the XI_SEG. static void __xdata *_firstHeapByte(void) { - unsigned char __xdata *start; - - start = (unsigned char __xdata *) _xisegStart(); - start += _xisegLen(); + unsigned char __xdata *start; + + start = (unsigned char __xdata *) _xisegStart(); + start += _xisegLen(); - return (void __xdata *)start; + return (void __xdata *)start; } // TINIm400 specific startup. @@ -280,71 +280,71 @@ static void __xdata *_firstHeapByte(void) unsigned char romInit(unsigned char noisy, char speed) { - void __xdata *heapStart; - void __xdata *heapEnd; - unsigned long heapLen; - unsigned char rc; + void __xdata *heapStart; + void __xdata *heapEnd; + unsigned long heapLen; + unsigned char rc; - if (speed == SPEED_2X) - { - PMR = 0x82; - PMR = 0x92; + if (speed == SPEED_2X) + { + PMR = 0x82; + PMR = 0x92; - while (!(EXIF & 8)) - ; + while (!(EXIF & 8)) + ; - PMR = 0x12; - } - else if (speed == SPEED_4X) - { - // Hangs on TINIm400! - PMR = 0x82; - PMR = 0x8a; - PMR = 0x9a; + PMR = 0x12; + } + else if (speed == SPEED_4X) + { + // Hangs on TINIm400! + PMR = 0x82; + PMR = 0x8a; + PMR = 0x9a; + + while (!(EXIF & 8)) + ; - while (!(EXIF & 8)) - ; + PMR = 0x1a; + } - PMR = 0x1a; - } - - heapStart = _firstHeapByte(); - heapEnd = (void __xdata *)CE0_END; + heapStart = _firstHeapByte(); + heapEnd = (void __xdata *)CE0_END; - rc = init_rom(heapStart, heapEnd); - - if (noisy) + rc = init_rom(heapStart, heapEnd); + + if (noisy) + { + if (rc) + { + printf("error: rom_init returns %d\n", (int)rc); + return rc; + } + else { - if (rc) - { - printf("error: rom_init returns %d\n", (int)rc); - return rc; - } - else - { - heapLen = CE0_END - (unsigned long)heapStart; - printf("Heap starts at %p, length %luK\n", heapStart, heapLen / 1024); - } + heapLen = CE0_END - (unsigned long)heapStart; + printf("Heap starts at %p, length %luK\n", heapStart, heapLen / 1024); } - - task_settickreload(RELOAD_14_746); - - // Switch to interrupt driven serial I/O now that the rom is initialized. - Serial0SwitchToBuffered(); - - P5 &= ~4; // LED on. - - return 0; + } + + task_settickreload(RELOAD_14_746); + + // Switch to interrupt driven serial I/O now that the rom is initialized. + Serial0SwitchToBuffered(); + + P5 &= ~4; // LED on. + + return 0; } // Install an interrupt handler. void installInterrupt(void (*isrPtr)(void), unsigned char offset) { - unsigned char __xdata * vectPtr = (unsigned char __xdata *) offset; - unsigned long isr = (unsigned long)isrPtr; + unsigned char __xdata * vectPtr = (unsigned char __xdata *) offset; + unsigned long isr = (unsigned long)isrPtr; - *vectPtr++ = 0x02; - *vectPtr++ = (unsigned char)(isr >> 16); - *vectPtr++ = (unsigned char)(isr >> 8); - *vectPtr = (unsigned char)isr; + *vectPtr++ = 0x02; + *vectPtr++ = (unsigned char)(isr >> 16); + *vectPtr++ = (unsigned char)(isr >> 8); + *vectPtr = (unsigned char)isr; } diff --git a/device/lib/hc08/_divuint.c b/device/lib/hc08/_divuint.c index f6c34b29..c8a8add5 100644 --- a/device/lib/hc08/_divuint.c +++ b/device/lib/hc08/_divuint.c @@ -44,101 +44,101 @@ static void _divuint_dummy (void) _naked { - _asm + __asm - .globl __divuint + .globl __divuint - __divuint: + __divuint: - #define count r2 - #define reste_l r3 - #define reste_h r4 - #define al dpl - #define ah dph + #define count r2 + #define reste_l r3 + #define reste_h r4 + #define al dpl + #define ah dph #if defined(SDCC_STACK_AUTO) && !defined(SDCC_PARMS_IN_BANK1) - ar0 = 0 ; BUG register set is not considered - ar1 = 1 + ar0 = 0 ; BUG register set is not considered + ar1 = 1 - .globl __divint + .globl __divint - mov a,sp - add a,#-2 ; 2 bytes return address - mov r0,a ; r0 points to bh - mov ar1,@r0 ; load bh - dec r0 - mov ar0,@r0 ; load bl + mov a,sp + add a,#-2 ; 2 bytes return address + mov r0,a ; r0 points to bh + mov ar1,@r0 ; load bh + dec r0 + mov ar0,@r0 ; load bl - #define bl r0 - #define bh r1 + #define bl r0 + #define bh r1 - __divint: ; entry point for __divsint + __divint: ; entry point for __divsint #else // SDCC_STACK_AUTO #if !defined(SDCC_PARMS_IN_BANK1) #if defined(SDCC_NOOVERLAY) - .area DSEG (DATA) + .area DSEG (DATA) #else - .area OSEG (OVR,DATA) + .area OSEG (OVR,DATA) #endif - .globl __divuint_PARM_2 - .globl __divsint_PARM_2 + .globl __divuint_PARM_2 + .globl __divsint_PARM_2 - __divuint_PARM_2: - __divsint_PARM_2: - .ds 2 + __divuint_PARM_2: + __divsint_PARM_2: + .ds 2 - .area CSEG (CODE) + .area CSEG (CODE) #endif // !SDCC_PARMS_IN_BANK1 #if defined(SDCC_PARMS_IN_BANK1) - #define bl (b1_0) - #define bh (b1_1) + #define bl (b1_0) + #define bh (b1_1) #else - #define bl (__divuint_PARM_2) - #define bh (__divuint_PARM_2 + 1) + #define bl (__divuint_PARM_2) + #define bh (__divuint_PARM_2 + 1) #endif // SDCC_PARMS_IN_BANK1 #endif // SDCC_STACK_AUTO - mov count,#16 - clr a - mov reste_l,a - mov reste_h,a - - loop: mov a,al ; a <<= 1 - add a,acc - mov al,a - mov a,ah - rlc a - mov ah,a - - mov a,reste_l ; reste <<= 1 - rlc a ; feed in carry - mov reste_l,a - mov a,reste_h - rlc a - mov reste_h,a - - mov a,reste_l ; reste - b - subb a,bl ; here carry is always clear, because - ; reste <<= 1 never overflows - mov b,a - mov a,reste_h - subb a,bh - - jc smaller ; reste >= b? - - mov reste_h,a ; -> yes; reste = reste - b; - mov reste_l,b - orl al,#1 - smaller: ; -> no - djnz count,loop - ret - - _endasm ; + mov count,#16 + clr a + mov reste_l,a + mov reste_h,a + + loop: mov a,al ; a <<= 1 + add a,acc + mov al,a + mov a,ah + rlc a + mov ah,a + + mov a,reste_l ; reste <<= 1 + rlc a ; feed in carry + mov reste_l,a + mov a,reste_h + rlc a + mov reste_h,a + + mov a,reste_l ; reste - b + subb a,bl ; here carry is always clear, because + ; reste <<= 1 never overflows + mov b,a + mov a,reste_h + subb a,bh + + jc smaller ; reste >= b? + + mov reste_h,a ; -> yes; reste = reste - b; + mov reste_l,b + orl al,#1 + smaller: ; -> no + djnz count,loop + ret + + __endasm ; } #else // defined _DIVUINT_ASM_SMALL || defined _DIVUINT_ASM_SMALL_AUTO diff --git a/device/lib/hc08/_divulong.c b/device/lib/hc08/_divulong.c index 992f787c..5f518f8f 100644 --- a/device/lib/hc08/_divulong.c +++ b/device/lib/hc08/_divulong.c @@ -44,140 +44,140 @@ static void _divlong_dummy (void) _naked { - _asm + __asm - .globl __divulong + .globl __divulong - __divulong: + __divulong: - #define count r2 + #define count r2 - #define a0 dpl - #define a1 dph - #define a2 b - #define a3 r3 + #define a0 dpl + #define a1 dph + #define a2 b + #define a3 r3 - #define reste0 r4 - #define reste1 r5 - #define reste2 r6 - #define reste3 r7 + #define reste0 r4 + #define reste1 r5 + #define reste2 r6 + #define reste3 r7 #if !defined(SDCC_PARMS_IN_BANK1) #if defined(SDCC_NOOVERLAY) - .area DSEG (DATA) + .area DSEG (DATA) #else - .area OSEG (OVR,DATA) + .area OSEG (OVR,DATA) #endif - .globl __divulong_PARM_2 - .globl __divslong_PARM_2 + .globl __divulong_PARM_2 + .globl __divslong_PARM_2 - __divulong_PARM_2: - __divslong_PARM_2: - .ds 4 + __divulong_PARM_2: + __divslong_PARM_2: + .ds 4 - .area CSEG (CODE) + .area CSEG (CODE) - #define b0 (__divulong_PARM_2) - #define b1 (__divulong_PARM_2 + 1) - #define b2 (__divulong_PARM_2 + 2) - #define b3 (__divulong_PARM_2 + 3) + #define b0 (__divulong_PARM_2) + #define b1 (__divulong_PARM_2 + 1) + #define b2 (__divulong_PARM_2 + 2) + #define b3 (__divulong_PARM_2 + 3) #else - #define b0 (b1_0) - #define b1 (b1_1) - #define b2 (b1_2) - #define b3 (b1_3) + #define b0 (b1_0) + #define b1 (b1_1) + #define b2 (b1_2) + #define b3 (b1_3) #endif // !SDCC_PARMS_IN_BANK1 - ; parameter a comes in a, b, dph, dpl - mov a3,a ; save parameter a3 - - mov count,#32 - clr a - mov reste0,a - mov reste1,a - mov reste2,a - mov reste3,a - - ; optimization loop in lp0 until the first bit is shifted into rest - - lp0: mov a,a0 ; a <<= 1 - add a,a0 - mov a0,a - mov a,a1 - rlc a - mov a1,a - mov a,a2 - rlc a - mov a2,a - mov a,a3 - rlc a - mov a3,a - - jc in_lp - djnz count,lp0 - - sjmp exit - - loop: mov a,a0 ; a <<= 1 - add a,a0 - mov a0,a - mov a,a1 - rlc a - mov a1,a - mov a,a2 - rlc a - mov a2,a - mov a,a3 - rlc a - mov a3,a - - in_lp: mov a,reste0 ; reste <<= 1 - rlc a ; feed in carry - mov reste0,a - mov a,reste1 - rlc a - mov reste1,a - mov a,reste2 - rlc a - mov reste2,a - mov a,reste3 - rlc a - mov reste3,a - - mov a,reste0 ; reste - b - subb a,b0 ; carry is always clear here, because - ; reste <<= 1 never overflows - mov a,reste1 - subb a,b1 - mov a,reste2 - subb a,b2 - mov a,reste3 - subb a,b3 - - jc minus ; reste >= b? - - ; -> yes; reste -= b; - mov a,reste0 - subb a,b0 ; carry is always clear here (jc) - mov reste0,a - mov a,reste1 - subb a,b1 - mov reste1,a - mov a,reste2 - subb a,b2 - mov reste2,a - mov a,reste3 - subb a,b3 - mov reste3,a - - orl a0,#1 - - minus: djnz count,loop ; -> no - - exit: mov a,a3 ; prepare the return value - ret - - _endasm ; + ; parameter a comes in a, b, dph, dpl + mov a3,a ; save parameter a3 + + mov count,#32 + clr a + mov reste0,a + mov reste1,a + mov reste2,a + mov reste3,a + + ; optimization loop in lp0 until the first bit is shifted into rest + + lp0: mov a,a0 ; a <<= 1 + add a,a0 + mov a0,a + mov a,a1 + rlc a + mov a1,a + mov a,a2 + rlc a + mov a2,a + mov a,a3 + rlc a + mov a3,a + + jc in_lp + djnz count,lp0 + + sjmp exit + + loop: mov a,a0 ; a <<= 1 + add a,a0 + mov a0,a + mov a,a1 + rlc a + mov a1,a + mov a,a2 + rlc a + mov a2,a + mov a,a3 + rlc a + mov a3,a + + in_lp: mov a,reste0 ; reste <<= 1 + rlc a ; feed in carry + mov reste0,a + mov a,reste1 + rlc a + mov reste1,a + mov a,reste2 + rlc a + mov reste2,a + mov a,reste3 + rlc a + mov reste3,a + + mov a,reste0 ; reste - b + subb a,b0 ; carry is always clear here, because + ; reste <<= 1 never overflows + mov a,reste1 + subb a,b1 + mov a,reste2 + subb a,b2 + mov a,reste3 + subb a,b3 + + jc minus ; reste >= b? + + ; -> yes; reste -= b; + mov a,reste0 + subb a,b0 ; carry is always clear here (jc) + mov reste0,a + mov a,reste1 + subb a,b1 + mov reste1,a + mov a,reste2 + subb a,b2 + mov reste2,a + mov a,reste3 + subb a,b3 + mov reste3,a + + orl a0,#1 + + minus: djnz count,loop ; -> no + + exit: mov a,a3 ; prepare the return value + ret + + __endasm ; } #elif defined _DIVULONG_ASM_SMALL_AUTO @@ -185,138 +185,138 @@ _divlong_dummy (void) _naked static void _divlong_dummy (void) _naked { - _asm - - .globl __divulong - - __divulong: - - #define count r2 - - #define a0 dpl - #define a1 dph - #define a2 b - #define a3 r3 - - #define reste0 r4 - #define reste1 r5 - #define reste2 r6 - #define reste3 r7 - - .globl __divlong ; entry point for __divslong - - #define b0 r1 - - ar0 = 0 ; BUG register set is not considered - ar1 = 1 - - ; parameter a comes in a, b, dph, dpl - mov a3,a ; save parameter a3 - - mov a,sp - add a,#-2-3 ; 2 bytes return address, 3 bytes param b - mov r0,a ; r0 points to b0 - - __divlong: ; entry point for __divslong - - mov ar1,@r0 ; load b0 - inc r0 ; r0 points to b1 - - mov count,#32 - clr a - mov reste0,a - mov reste1,a - mov reste2,a - mov reste3,a - - ; optimization loop in lp0 until the first bit is shifted into rest - - lp0: mov a,a0 ; a <<= 1 - add a,a0 - mov a0,a - mov a,a1 - rlc a - mov a1,a - mov a,a2 - rlc a - mov a2,a - mov a,a3 - rlc a - mov a3,a - - jc in_lp - djnz count,lp0 - - sjmp exit - - loop: mov a,a0 ; a <<= 1 - add a,a0 - mov a0,a - mov a,a1 - rlc a - mov a1,a - mov a,a2 - rlc a - mov a2,a - mov a,a3 - rlc a - mov a3,a - - in_lp: mov a,reste0 ; reste <<= 1 - rlc a ; feed in carry - mov reste0,a - mov a,reste1 - rlc a - mov reste1,a - mov a,reste2 - rlc a - mov reste2,a - mov a,reste3 - rlc a - mov reste3,a - - mov a,reste0 ; reste - b - subb a,b0 ; carry is always clear here, because - ; reste <<= 1 never overflows - mov a,reste1 - subb a,@r0 ; b1 - mov a,reste2 - inc r0 - subb a,@r0 ; b2 - mov a,reste3 - inc r0 - subb a,@r0 ; b3 - dec r0 - dec r0 - - jc minus ; reste >= b? - - ; -> yes; reste -= b; - mov a,reste0 - subb a,b0 ; carry is always clear here (jc) - mov reste0,a - mov a,reste1 - subb a,@r0 ; b1 - mov reste1,a - mov a,reste2 - inc r0 - subb a,@r0 ; b2 - mov reste2,a - mov a,reste3 - inc r0 - subb a,@r0 ; b3 - mov reste3,a - dec r0 - dec r0 - - orl a0,#1 - - minus: djnz count,loop ; -> no - - exit: mov a,a3 ; prepare the return value - ret - - _endasm ; + __asm + + .globl __divulong + + __divulong: + + #define count r2 + + #define a0 dpl + #define a1 dph + #define a2 b + #define a3 r3 + + #define reste0 r4 + #define reste1 r5 + #define reste2 r6 + #define reste3 r7 + + .globl __divlong ; entry point for __divslong + + #define b0 r1 + + ar0 = 0 ; BUG register set is not considered + ar1 = 1 + + ; parameter a comes in a, b, dph, dpl + mov a3,a ; save parameter a3 + + mov a,sp + add a,#-2-3 ; 2 bytes return address, 3 bytes param b + mov r0,a ; r0 points to b0 + + __divlong: ; entry point for __divslong + + mov ar1,@r0 ; load b0 + inc r0 ; r0 points to b1 + + mov count,#32 + clr a + mov reste0,a + mov reste1,a + mov reste2,a + mov reste3,a + + ; optimization loop in lp0 until the first bit is shifted into rest + + lp0: mov a,a0 ; a <<= 1 + add a,a0 + mov a0,a + mov a,a1 + rlc a + mov a1,a + mov a,a2 + rlc a + mov a2,a + mov a,a3 + rlc a + mov a3,a + + jc in_lp + djnz count,lp0 + + sjmp exit + + loop: mov a,a0 ; a <<= 1 + add a,a0 + mov a0,a + mov a,a1 + rlc a + mov a1,a + mov a,a2 + rlc a + mov a2,a + mov a,a3 + rlc a + mov a3,a + + in_lp: mov a,reste0 ; reste <<= 1 + rlc a ; feed in carry + mov reste0,a + mov a,reste1 + rlc a + mov reste1,a + mov a,reste2 + rlc a + mov reste2,a + mov a,reste3 + rlc a + mov reste3,a + + mov a,reste0 ; reste - b + subb a,b0 ; carry is always clear here, because + ; reste <<= 1 never overflows + mov a,reste1 + subb a,@r0 ; b1 + mov a,reste2 + inc r0 + subb a,@r0 ; b2 + mov a,reste3 + inc r0 + subb a,@r0 ; b3 + dec r0 + dec r0 + + jc minus ; reste >= b? + + ; -> yes; reste -= b; + mov a,reste0 + subb a,b0 ; carry is always clear here (jc) + mov reste0,a + mov a,reste1 + subb a,@r0 ; b1 + mov reste1,a + mov a,reste2 + inc r0 + subb a,@r0 ; b2 + mov reste2,a + mov a,reste3 + inc r0 + subb a,@r0 ; b3 + mov reste3,a + dec r0 + dec r0 + + orl a0,#1 + + minus: djnz count,loop ; -> no + + exit: mov a,a3 ; prepare the return value + ret + + __endasm ; } #else // _DIVULONG_ASM -- 2.47.2