From d8623a41b8f5c40446d651e728c6002347621194 Mon Sep 17 00:00:00 2001 From: Bdale Garbee Date: Sat, 12 Nov 2011 01:45:48 -0700 Subject: [PATCH] add leds on power supplies and heartbeat monitor, fiddle with bit assignments --- Makefile | 48 +-- cncfpga.pcb | 102 ------ cncfpga.sch | 693 +++++++++++++++++++++++++++++--------- symbols/conn-5.sym | 59 ++++ symbols/led2.sym | 71 ++++ symbols/title-D-bdale.sym | 2 +- 6 files changed, 688 insertions(+), 287 deletions(-) create mode 100644 symbols/conn-5.sym create mode 100644 symbols/led2.sym diff --git a/Makefile b/Makefile index 886a234..35138af 100644 --- a/Makefile +++ b/Makefile @@ -1,35 +1,35 @@ # intentionally want to rebuild drc and bom on every invocation all: drc partslist partslist.csv pcb -drc: cnc4pga.sch Makefile - -gnetlist -g drc2 cnc4pga.sch -o cnc4pga.drc - -partslist: cnc4pga.sch Makefile - gnetlist -g bom -o cnc4pga.unsorted cnc4pga.sch - head -n1 cnc4pga.unsorted > partslist - tail -n+2 cnc4pga.unsorted | sort >> partslist - rm -f cnc4pga.unsorted - -partslist.csv: cnc4pga.sch Makefile - gnetlist -g partslistgag -o cnc4pga.unsorted cnc4pga.sch - head -n1 cnc4pga.unsorted > partslist.csv - tail -n+2 cnc4pga.unsorted | sort -t \, -k 8 >> partslist.csv - rm -f cnc4pga.unsorted - -pcb: cnc4pga.sch project Makefile +drc: cncfpga.sch Makefile + -gnetlist -g drc2 cncfpga.sch -o cncfpga.drc + +partslist: cncfpga.sch Makefile + gnetlist -g bom -o cncfpga.unsorted cncfpga.sch + head -n1 cncfpga.unsorted > partslist + tail -n+2 cncfpga.unsorted | sort >> partslist + rm -f cncfpga.unsorted + +partslist.csv: cncfpga.sch Makefile + gnetlist -g partslistgag -o cncfpga.unsorted cncfpga.sch + head -n1 cncfpga.unsorted > partslist.csv + tail -n+2 cncfpga.unsorted | sort -t \, -k 8 >> partslist.csv + rm -f cncfpga.unsorted + +pcb: cncfpga.sch project Makefile gsch2pcb project -cnc4pga.xy: cnc4pga.pcb - pcb -x bom cnc4pga.pcb +cncfpga.xy: cncfpga.pcb + pcb -x bom cncfpga.pcb -cnc4pga.bottom.gbr: cnc4pga.pcb - pcb -x gerber cnc4pga.pcb +cncfpga.bottom.gbr: cncfpga.pcb + pcb -x gerber cncfpga.pcb -zip: cnc4pga.bottom.gbr cnc4pga.bottommask.gbr cnc4pga.fab.gbr cnc4pga.top.gbr cnc4pga.topmask.gbr cnc4pga.toppaste.gbr cnc4pga.topsilk.gbr cnc4pga.group2.gbr cnc4pga.group3.gbr cnc4pga.plated-drill.cnc cnc4pga.xy Makefile # cnc4pga.xls - zip cnc4pga.zip cnc4pga.*.gbr cnc4pga.*.cnc cnc4pga.xy # cnc4pga.xls +zip: cncfpga.bottom.gbr cncfpga.bottommask.gbr cncfpga.fab.gbr cncfpga.top.gbr cncfpga.topmask.gbr cncfpga.toppaste.gbr cncfpga.topsilk.gbr cncfpga.group2.gbr cncfpga.group3.gbr cncfpga.plated-drill.cnc cncfpga.xy Makefile # cncfpga.xls + zip cncfpga.zip cncfpga.*.gbr cncfpga.*.cnc cncfpga.xy # cncfpga.xls clean: - rm -f *.bom *.drc *.log *~ cnc4pga.ps *.gbr *.cnc *bak* *- *.zip + rm -f *.bom *.drc *.log *~ cncfpga.ps *.gbr *.cnc *bak* *- *.zip rm -f *.net *.xy *.cmd *.png partslist partslist.csv - rm -f *.partslist *.new.pcb *.unsorted cnc4pga.xls + rm -f *.partslist *.new.pcb *.unsorted cncfpga.xls diff --git a/cncfpga.pcb b/cncfpga.pcb index 934f63b..9227811 100644 --- a/cncfpga.pcb +++ b/cncfpga.pcb @@ -836,109 +836,7 @@ Element["hidename,lock" "hole-fox-stack" "H1" "unknown" 31495 31495 -16900 -2100 ) -Element["lock" "BTE-020-02" "J2" "BTE-020" 340551 126772 12011 -10161 3 100 ""] -( - Pin[7999 36372 4000 0 4000 4000 "mnt" "0" "hole"] - Pin[7999 -36371 4000 0 4000 4000 "mnt" "0" "hole"] - Pad[10198 -29920 14099 -29920 1799 1350 2399 "pin1" "1" "square,edge2"] - Pad[-14100 -29920 -10199 -29920 1799 1350 2399 "pin2" "2" "square"] - Pad[10198 -26771 14099 -26771 1799 1350 2399 "pin3" "3" "square,edge2"] - Pad[-14100 -26771 -10199 -26771 1799 1350 2399 "pin4" "4" "square"] - Pad[10198 -23621 14099 -23621 1799 1350 2399 "pin5" "5" "square,edge2"] - Pad[-14100 -23621 -10199 -23621 1799 1350 2399 "pin6" "6" "square"] - Pad[10198 -20471 14099 -20471 1799 1350 2399 "pin7" "7" "square,edge2"] - Pad[-14100 -20471 -10199 -20471 1799 1350 2399 "pin8" "8" "square"] - Pad[10198 -17322 14099 -17322 1799 1350 2399 "pin9" "9" "square,edge2"] - Pad[-14100 -17322 -10199 -17322 1799 1350 2399 "pin10" "10" "square"] - Pad[10198 -14172 14099 -14172 1799 1350 2399 "pin11" "11" "square,edge2"] - Pad[-14100 -14172 -10199 -14172 1799 1350 2399 "pin12" "12" "square"] - Pad[10198 -11023 14099 -11023 1799 1350 2399 "pin13" "13" "square,edge2"] - Pad[-14100 -11023 -10199 -11023 1799 1350 2399 "pin14" "14" "square"] - Pad[10198 -7873 14099 -7873 1799 1350 2399 "pin15" "15" "square,edge2"] - Pad[-14100 -7873 -10199 -7873 1799 1350 2399 "pin16" "16" "square"] - Pad[10198 -4723 14099 -4723 1799 1350 2399 "pin17" "17" "square,edge2"] - Pad[-14100 -4723 -10199 -4723 1799 1350 2399 "pin18" "18" "square"] - Pad[10198 -1574 14099 -1574 1799 1350 2399 "pin19" "19" "square,edge2"] - Pad[-14100 -1574 -10199 -1574 1799 1350 2399 "pin20" "20" "square"] - Pad[10198 1575 14099 1575 1799 1350 2399 "pin21" "21" "square,edge2"] - Pad[-14100 1575 -10199 1575 1799 1350 2399 "pin22" "22" "square"] - Pad[10198 4724 14099 4724 1799 1350 2399 "pin23" "23" "square,edge2"] - Pad[-14100 4724 -10199 4724 1799 1350 2399 "pin24" "24" "square"] - Pad[10198 7874 14099 7874 1799 1350 2399 "pin25" "25" "square,edge2"] - Pad[-14100 7874 -10199 7874 1799 1350 2399 "pin26" "26" "square"] - Pad[10198 11024 14099 11024 1799 1350 2399 "pin27" "27" "square,edge2"] - Pad[-14100 11024 -10199 11024 1799 1350 2399 "pin28" "28" "square"] - Pad[10198 14173 14099 14173 1799 1350 2399 "pin29" "29" "square,edge2"] - Pad[-14100 14173 -10199 14173 1799 1350 2399 "pin30" "30" "square"] - Pad[10198 17323 14099 17323 1799 1350 2399 "pin31" "31" "square,edge2"] - Pad[-14100 17323 -10199 17323 1799 1350 2399 "pin32" "32" "square"] - Pad[10198 20472 14099 20472 1799 1350 2399 "pin33" "33" "square,edge2"] - Pad[-14100 20472 -10199 20472 1799 1350 2399 "pin34" "34" "square"] - Pad[10198 23622 14099 23622 1799 1350 2399 "pin35" "35" "square,edge2"] - Pad[-14100 23622 -10199 23622 1799 1350 2399 "pin36" "36" "square"] - Pad[10198 26772 14099 26772 1799 1350 2399 "pin37" "37" "square,edge2"] - Pad[-14100 26772 -10199 26772 1799 1350 2399 "pin38" "38" "square"] - Pad[10198 29921 14099 29921 1799 1350 2399 "pin39" "39" "square,edge2"] - Pad[-14100 29921 -10199 29921 1799 1350 2399 "pin40" "40" "square"] - ElementLine [-11752 -39369 11751 -39369 1000] - ElementLine [-11752 -39369 -11752 39370 1000] - ElementLine [-11752 39370 11751 39370 1000] - ElementLine [11751 -39369 11751 39370 1000] - ElementArc [16424 -33070 500 500 270 360 1000] - ) - -Element["onsolder,lock" "BSE-020-01" "J1" "BSE-020" 340551 126772 -12011 -10161 1 100 "auto"] -( - Pin[-10511 39620 4000 0 4000 4000 "mnt" "0" "hole"] - Pin[-10511 -39619 4000 0 4000 4000 "mnt" "0" "hole"] - Pad[-14950 -29920 -7599 -29920 1598 1551 2198 "pin2" "2" "onsolder,square"] - Pad[7600 -29920 14951 -29920 1598 1551 2198 "pin1" "1" "onsolder,square,edge2"] - Pad[-14950 -26771 -7599 -26771 1598 1551 2198 "pin4" "4" "onsolder,square"] - Pad[7600 -26771 14951 -26771 1598 1551 2198 "pin3" "3" "onsolder,square,edge2"] - Pad[-14950 -23621 -7599 -23621 1598 1551 2198 "pin6" "6" "onsolder,square"] - Pad[7600 -23621 14951 -23621 1598 1551 2198 "pin5" "5" "onsolder,square,edge2"] - Pad[-14950 -20471 -7599 -20471 1598 1551 2198 "pin8" "8" "onsolder,square"] - Pad[7600 -20471 14951 -20471 1598 1551 2198 "pin7" "7" "onsolder,square,edge2"] - Pad[-14950 -17322 -7599 -17322 1598 1551 2198 "pin10" "10" "onsolder,square"] - Pad[7600 -17322 14951 -17322 1598 1551 2198 "pin9" "9" "onsolder,square,edge2"] - Pad[-14950 -14172 -7599 -14172 1598 1551 2198 "pin12" "12" "onsolder,square"] - Pad[7600 -14172 14951 -14172 1598 1551 2198 "pin11" "11" "onsolder,square,edge2"] - Pad[-14950 -11023 -7599 -11023 1598 1551 2198 "pin14" "14" "onsolder,square"] - Pad[7600 -11023 14951 -11023 1598 1551 2198 "pin13" "13" "onsolder,square,edge2"] - Pad[-14950 -7873 -7599 -7873 1598 1551 2198 "pin16" "16" "onsolder,square"] - Pad[7600 -7873 14951 -7873 1598 1551 2198 "pin15" "15" "onsolder,square,edge2"] - Pad[-14950 -4723 -7599 -4723 1598 1551 2198 "pin18" "18" "onsolder,square"] - Pad[7600 -4723 14951 -4723 1598 1551 2198 "pin17" "17" "onsolder,square,edge2"] - Pad[-14950 -1574 -7599 -1574 1598 1551 2198 "pin20" "20" "onsolder,square"] - Pad[7600 -1574 14951 -1574 1598 1551 2198 "pin19" "19" "onsolder,square,edge2"] - Pad[-14950 1575 -7599 1575 1598 1551 2198 "pin22" "22" "onsolder,square"] - Pad[7600 1575 14951 1575 1598 1551 2198 "pin21" "21" "onsolder,square,edge2"] - Pad[-14950 4724 -7599 4724 1598 1551 2198 "pin24" "24" "onsolder,square"] - Pad[7600 4724 14951 4724 1598 1551 2198 "pin23" "23" "onsolder,square,edge2"] - Pad[-14950 7874 -7599 7874 1598 1551 2198 "pin26" "26" "onsolder,square"] - Pad[7600 7874 14951 7874 1598 1551 2198 "pin25" "25" "onsolder,square,edge2"] - Pad[-14950 11024 -7599 11024 1598 1551 2198 "pin28" "28" "onsolder,square"] - Pad[7600 11024 14951 11024 1598 1551 2198 "pin27" "27" "onsolder,square,edge2"] - Pad[-14950 14173 -7599 14173 1598 1551 2198 "pin30" "30" "onsolder,square"] - Pad[7600 14173 14951 14173 1598 1551 2198 "pin29" "29" "onsolder,square,edge2"] - Pad[-14950 17323 -7599 17323 1598 1551 2198 "pin32" "32" "onsolder,square"] - Pad[7600 17323 14951 17323 1598 1551 2198 "pin31" "31" "onsolder,square,edge2"] - Pad[-14950 20472 -7599 20472 1598 1551 2198 "pin34" "34" "onsolder,square"] - Pad[7600 20472 14951 20472 1598 1551 2198 "pin33" "33" "onsolder,square,edge2"] - Pad[-14950 23622 -7599 23622 1598 1551 2198 "pin36" "36" "onsolder,square"] - Pad[7600 23622 14951 23622 1598 1551 2198 "pin35" "35" "onsolder,square,edge2"] - Pad[-14950 26772 -7599 26772 1598 1551 2198 "pin38" "38" "onsolder,square"] - Pad[7600 26772 14951 26772 1598 1551 2198 "pin37" "37" "onsolder,square,edge2"] - Pad[-14950 29921 -7599 29921 1598 1551 2198 "pin40" "40" "onsolder,square"] - Pad[7600 29921 14951 29921 1598 1551 2198 "pin39" "39" "onsolder,square,edge2"] - ElementLine [-14251 -41869 14252 -41869 1000] - ElementLine [14252 -41869 14252 41870 1000] - ElementLine [-14251 41870 14252 41870 1000] - ElementLine [-14251 -41869 -14251 41870 1000] - ElementArc [17987 -33070 500 500 270 360 1000] - - ) Layer(1 "top") ( ) diff --git a/cncfpga.sch b/cncfpga.sch index 7bf9e9f..ee24245 100644 --- a/cncfpga.sch +++ b/cncfpga.sch @@ -85,7 +85,7 @@ C 45800 41700 1 0 0 EP1K10.sym T 39400 40100 5 10 0 0 0 0 1 device=EP1K10TC100 T 46400 60100 5 10 1 1 180 0 1 -refdes=U? +refdes=U1 } C 49400 41200 1 0 0 gnd.sym N 47900 41600 51100 41600 4 @@ -101,106 +101,101 @@ N 50700 41700 50700 41600 4 N 51100 41700 51100 41600 4 C 57600 50900 1 0 1 conn-25.sym { -T 57345 60795 5 10 1 1 0 6 1 -refdes=J? +T 57145 60795 5 10 1 1 0 6 1 +refdes=J1 } C 63000 54200 1 0 0 conn-15.sym { T 63355 60095 5 10 1 1 0 0 1 -refdes=J? +refdes=J3 T 63400 54000 5 10 1 1 0 0 1 value=X } C 65800 54200 1 0 0 conn-15.sym { T 66155 60095 5 10 1 1 0 0 1 -refdes=J? +refdes=J4 T 66200 54000 5 10 1 1 0 0 1 value=Y } C 68600 54200 1 0 0 conn-15.sym { T 68955 60095 5 10 1 1 0 0 1 -refdes=J? +refdes=J5 T 69000 54000 5 10 1 1 0 0 1 value=Z } C 71400 54200 1 0 0 conn-15.sym { T 71755 60095 5 10 1 1 0 0 1 -refdes=J? +refdes=J6 T 71800 54000 5 10 1 1 0 0 1 value=A } C 61200 43800 1 0 0 conn-9.sym { T 61555 47295 5 10 1 1 0 0 1 -refdes=J? +refdes=J7 } -C 66900 49300 1 0 0 PIC12F629.sym +C 64900 49500 1 0 0 PIC12F629.sym { -T 67300 51300 5 10 1 1 0 0 1 -refdes=U? -T 72300 48400 5 10 0 0 0 0 1 +T 65300 51500 5 10 1 1 0 0 1 +refdes=U2 +T 70300 48600 5 10 0 0 0 0 1 device=PIC12F629 -T 72300 48100 5 10 0 0 0 0 1 +T 70300 48300 5 10 0 0 0 0 1 footprint=SO8 } -C 67100 44100 1 0 0 TC2185.sym +C 65900 44200 1 0 0 TC2185.sym { -T 67395 45295 5 10 1 1 0 0 1 -refdes=U? -T 67895 45295 5 10 1 1 0 0 1 +T 66195 45395 5 10 1 1 0 0 1 +refdes=U4 +T 66695 45395 5 10 1 1 0 0 1 device=TC2185-3.3 -T 67095 44095 5 10 0 1 0 0 1 +T 65895 44195 5 10 0 1 0 0 1 footprint=SOT23-5 } -C 65600 46500 1 0 1 conn-2.sym +N 66100 47100 64400 47100 4 +C 66900 43400 1 0 0 gnd.sym +N 67000 44200 67000 43700 4 +N 67000 43800 64400 43800 4 +N 64400 43800 64400 46700 4 +N 65900 44700 65700 44700 4 +N 65700 44700 65700 47100 4 +C 65400 45100 1 90 0 capacitor.sym { -T 65295 47145 5 10 1 1 0 6 1 -refdes=J? -} -N 67300 47000 65600 47000 4 -C 68100 43300 1 0 0 gnd.sym -N 68200 44100 68200 43600 4 -N 68200 43700 65600 43700 4 -N 65600 43700 65600 46600 4 -N 67100 44600 66900 44600 4 -N 66900 44600 66900 47000 4 -C 66600 45000 1 90 0 capacitor.sym -{ -T 65900 45200 5 10 0 0 90 0 1 +T 64700 45300 5 10 0 0 90 0 1 device=CAPACITOR -T 66200 45700 5 10 1 1 180 0 1 -refdes=C? -T 65700 45200 5 10 0 0 90 0 1 +T 65000 45800 5 10 1 1 180 0 1 +refdes=C2 +T 64500 45300 5 10 0 0 90 0 1 symversion=0.1 } -C 69700 43700 1 90 0 capacitor.sym +C 68500 43800 1 90 0 capacitor.sym { -T 69000 43900 5 10 0 0 90 0 1 +T 67800 44000 5 10 0 0 90 0 1 device=CAPACITOR -T 69300 44400 5 10 1 1 180 0 1 -refdes=C? -T 68800 43900 5 10 0 0 90 0 1 +T 68100 44500 5 10 1 1 180 0 1 +refdes=C4 +T 67600 44000 5 10 0 0 90 0 1 symversion=0.1 } -C 70500 44100 1 90 0 capacitor.sym +C 69300 44200 1 90 0 capacitor.sym { -T 69800 44300 5 10 0 0 90 0 1 +T 68600 44400 5 10 0 0 90 0 1 device=CAPACITOR -T 70200 44800 5 10 1 1 180 0 1 -refdes=C? -T 69600 44300 5 10 0 0 90 0 1 +T 69000 44900 5 10 1 1 180 0 1 +refdes=C5 +T 68400 44400 5 10 0 0 90 0 1 symversion=0.1 } -N 68200 43700 70300 43700 4 -N 70300 43700 70300 44100 4 -N 69500 44600 69200 44600 4 -N 69200 45000 70300 45000 4 -N 66400 47000 66400 45900 4 -N 66400 45000 66400 43700 4 -C 70100 45000 1 0 0 3.3V-plus.sym +N 67000 43800 69100 43800 4 +N 69100 43800 69100 44200 4 +N 68300 44700 68000 44700 4 +N 68000 45100 69700 45100 4 +N 65200 47100 65200 46000 4 +N 65200 45100 65200 43800 4 +C 68900 45100 1 0 0 3.3V-plus.sym C 49100 60500 1 0 0 3.3V-plus.sym N 47100 60400 51500 60400 4 N 49300 60500 49300 60400 4 @@ -216,57 +211,49 @@ N 48700 60300 48700 60400 4 N 48300 60300 48300 60400 4 N 47900 60300 47900 60400 4 N 47500 60300 47500 60400 4 -C 67300 46400 1 0 0 volt_reg_pos.sym +C 66100 46500 1 0 0 volt_reg_pos.sym { -T 68900 47700 5 10 0 0 0 0 1 +T 67700 47800 5 10 0 0 0 0 1 device=7805 -T 67800 47400 5 10 1 1 0 6 1 -refdes=U? -T 68400 47400 5 10 1 1 0 0 1 +T 66600 47500 5 10 1 1 0 6 1 +refdes=U3 +T 67200 47500 5 10 1 1 0 0 1 value=7805 -T 67300 46400 5 10 0 0 0 0 1 +T 66100 46500 5 10 0 0 0 0 1 vendor=digikey -T 67300 46400 5 10 0 0 0 0 1 +T 66100 46500 5 10 0 0 0 0 1 vendor_part_number=497-2947-5-ND -T 67300 46400 5 10 0 0 0 0 1 +T 66100 46500 5 10 0 0 0 0 1 footprint=TC220W } -N 67100 45000 66900 45000 4 -C 68100 45800 1 0 0 gnd.sym -C 69700 47000 1 0 0 5V-plus.sym -N 69100 47000 69900 47000 4 -C 70100 46100 1 90 0 capacitor.sym +N 65900 45100 65700 45100 4 +C 66900 45900 1 0 0 gnd.sym +C 68500 47100 1 0 0 5V-plus.sym +N 67900 47100 69700 47100 4 +C 68900 46200 1 90 0 capacitor.sym { -T 69400 46300 5 10 0 0 90 0 1 +T 68200 46400 5 10 0 0 90 0 1 device=CAPACITOR -T 69800 46800 5 10 1 1 180 0 1 -refdes=C? -T 69200 46300 5 10 0 0 90 0 1 +T 68600 46900 5 10 1 1 180 0 1 +refdes=C3 +T 68000 46400 5 10 0 0 90 0 1 symversion=0.1 -} -N 68200 46100 68200 46400 4 -N 69900 46100 68200 46100 4 -C 66500 51000 1 0 0 5V-plus.sym -C 72000 50500 1 0 0 gnd.sym -N 71900 50800 72100 50800 4 -N 66900 50800 66700 50800 4 -N 66700 50800 66700 51000 4 -C 56000 48800 1 0 0 conn-3.sym -{ -T 56300 50100 5 10 1 1 0 0 1 -refdes=J? -} +T 68900 46200 5 10 0 0 0 0 1 +footprint=0402 +} +N 67000 46200 67000 46500 4 +N 68700 46200 67000 46200 4 +C 62000 51200 1 0 0 5V-plus.sym +C 70000 50700 1 0 0 gnd.sym +N 69900 51000 70100 51000 4 +N 64900 51000 62200 51000 4 +N 62200 51000 62200 51200 4 C 56100 49900 1 0 1 3.3V-plus.sym C 56000 48600 1 0 1 gnd.sym N 55900 49900 55900 49800 4 N 55900 49800 56000 49800 4 N 56000 49000 55900 49000 4 N 55900 49000 55900 48900 4 -N 56000 49400 52800 49400 4 -{ -T 53500 49500 5 10 1 1 0 0 1 -netname=nConfig -} N 45800 44600 43700 44600 4 { T 44400 44700 5 10 1 1 0 0 1 @@ -280,7 +267,7 @@ netname=led C 54700 48100 1 270 0 led.sym { T 55050 48000 5 10 1 1 0 0 1 -refdes=D? +refdes=D1 T 55300 48200 5 10 0 0 270 0 1 device=LED T 55100 47700 5 10 1 1 0 0 1 @@ -291,7 +278,7 @@ C 54900 48100 1 90 0 resistor.sym T 54500 48400 5 10 0 0 90 0 1 device=RESISTOR T 55300 48900 5 10 1 1 180 0 1 -refdes=R? +refdes=R1 } C 54700 47400 1 0 0 gnd.sym C 41900 43600 1 0 0 oscillator.sym @@ -314,7 +301,7 @@ C 41600 43600 1 90 0 capacitor.sym T 40900 43800 5 10 0 0 90 0 1 device=CAPACITOR T 41100 44300 5 10 1 1 180 0 1 -refdes=C? +refdes=C1 T 40700 43800 5 10 0 0 90 0 1 symversion=0.1 T 40700 43700 5 10 1 1 0 0 1 @@ -669,26 +656,78 @@ netname=nSTATUS } C 59100 50500 1 0 0 conn-26.sym { -T 59355 60795 5 10 1 1 0 0 1 -refdes=J? +T 59455 60795 5 10 1 1 0 0 1 +refdes=J2 } N 57600 60600 59100 60600 4 +{ +T 57800 60700 5 10 1 1 0 0 1 +netname=nWrite +} N 59100 60200 57600 60200 4 +{ +T 57800 60300 5 10 1 1 0 0 1 +netname=pport_data_0 +} N 57600 59800 59100 59800 4 +{ +T 57800 59900 5 10 1 1 0 0 1 +netname=pport_data_1 +} N 59100 59400 57600 59400 4 +{ +T 57800 59500 5 10 1 1 0 0 1 +netname=pport_data_2 +} N 57600 59000 59100 59000 4 +{ +T 57800 59100 5 10 1 1 0 0 1 +netname=pport_data_3 +} N 59100 58600 57600 58600 4 +{ +T 57800 58700 5 10 1 1 0 0 1 +netname=pport_data_4 +} N 57600 58200 59100 58200 4 +{ +T 57800 58300 5 10 1 1 0 0 1 +netname=pport_data_5 +} N 59100 57800 57600 57800 4 +{ +T 57800 57900 5 10 1 1 0 0 1 +netname=pport_data_6 +} N 57600 57400 59100 57400 4 +{ +T 57800 57500 5 10 1 1 0 0 1 +netname=pport_data_7 +} N 59100 57000 57600 57000 4 N 57600 56600 59100 56600 4 +{ +T 57800 56700 5 10 1 1 0 0 1 +netname=nWait +} N 59100 56200 57600 56200 4 N 57600 55800 59100 55800 4 N 59100 55400 57600 55400 4 +{ +T 57800 55500 5 10 1 1 0 0 1 +netname=nDataStr +} N 57600 55000 59100 55000 4 N 59100 54600 57600 54600 4 +{ +T 57800 54700 5 10 1 1 0 0 1 +netname=epp_nReset +} N 59100 54200 57600 54200 4 +{ +T 57800 54300 5 10 1 1 0 0 1 +netname=nAddrStr +} N 57600 53800 59100 53800 4 N 59100 53400 57600 53400 4 N 57600 53000 59100 53000 4 @@ -697,78 +736,412 @@ N 57600 52200 59100 52200 4 N 59100 51800 57600 51800 4 N 57600 51400 59100 51400 4 N 59100 51000 57600 51000 4 -N 61500 59900 63000 59900 4 -N 63000 59500 61500 59500 4 -N 61500 59100 63000 59100 4 -N 63000 58700 61500 58700 4 -N 61500 58300 63000 58300 4 -N 63000 57900 61500 57900 4 -N 61500 57500 63000 57500 4 -N 63000 57100 61500 57100 4 -N 61500 56700 63000 56700 4 -N 63000 56300 61500 56300 4 -N 61500 55900 63000 55900 4 -N 63000 55500 61500 55500 4 -N 61500 55100 63000 55100 4 -N 63000 54700 61500 54700 4 -N 61500 54300 63000 54300 4 -N 64300 59900 65800 59900 4 -N 65800 59500 64300 59500 4 -N 64300 59100 65800 59100 4 -N 65800 58700 64300 58700 4 -N 64300 58300 65800 58300 4 -N 65800 57900 64300 57900 4 -N 64300 57500 65800 57500 4 -N 65800 57100 64300 57100 4 -N 64300 56700 65800 56700 4 -N 65800 56300 64300 56300 4 -N 64300 55900 65800 55900 4 -N 65800 55500 64300 55500 4 -N 64300 55100 65800 55100 4 -N 65800 54700 64300 54700 4 -N 64300 54300 65800 54300 4 -N 67100 59900 68600 59900 4 -N 68600 59500 67100 59500 4 -N 67100 59100 68600 59100 4 -N 68600 58700 67100 58700 4 -N 67100 58300 68600 58300 4 -N 68600 57900 67100 57900 4 -N 67100 57500 68600 57500 4 -N 68600 57100 67100 57100 4 -N 67100 56700 68600 56700 4 -N 68600 56300 67100 56300 4 -N 67100 55900 68600 55900 4 -N 68600 55500 67100 55500 4 -N 67100 55100 68600 55100 4 -N 68600 54700 67100 54700 4 -N 67100 54300 68600 54300 4 -N 69900 59900 71400 59900 4 -N 71400 59500 69900 59500 4 -N 69900 59100 71400 59100 4 -N 71400 58700 69900 58700 4 -N 69900 58300 71400 58300 4 -N 71400 57900 69900 57900 4 -N 69900 57500 71400 57500 4 -N 71400 57100 69900 57100 4 -N 69900 56700 71400 56700 4 -N 71400 56300 69900 56300 4 -N 69900 55900 71400 55900 4 -N 71400 55500 69900 55500 4 -N 69900 55100 71400 55100 4 -N 71400 54700 69900 54700 4 -N 69900 54300 71400 54300 4 +N 64600 59900 65800 59900 4 +{ +T 64600 60000 5 10 1 1 0 0 1 +netname=up_1 +} +N 65800 59500 64600 59500 4 +{ +T 64600 59600 5 10 1 1 0 0 1 +netname=down_1 +} +N 64600 58300 65800 58300 4 +{ +T 64600 58400 5 10 1 1 0 0 1 +netname=quadA_1 +} +N 65800 57900 64600 57900 4 +{ +T 64600 58000 5 10 1 1 0 0 1 +netname=quadB_1 +} +N 64600 57500 65800 57500 4 +{ +T 64600 57600 5 10 1 1 0 0 1 +netname=quadZ_1 +} +N 65800 55100 64600 55100 4 +{ +T 64600 55200 5 10 1 1 0 0 1 +netname=din_2 +} +N 64600 54700 65800 54700 4 +{ +T 64600 54800 5 10 1 1 0 0 1 +netname=din_3 +} +N 65800 59100 64600 59100 4 +{ +T 64600 59200 5 10 1 1 0 0 1 +netname=dout_1 +} N 59700 47100 61200 47100 4 +{ +T 59700 47200 5 10 1 1 0 0 1 +netname=dout_4 +} N 61200 46700 59700 46700 4 +{ +T 59700 46800 5 10 1 1 0 0 1 +netname=dout_5 +} N 59700 46300 61200 46300 4 +{ +T 59700 46400 5 10 1 1 0 0 1 +netname=dout_6 +} N 61200 45900 59700 45900 4 -N 59700 45500 61200 45500 4 +{ +T 59700 46000 5 10 1 1 0 0 1 +netname=dout_7 +} N 61200 45100 59700 45100 4 +{ +T 59700 45200 5 10 1 1 0 0 1 +netname=pc_ok +} N 59700 44700 61200 44700 4 +{ +T 59700 44800 5 10 1 1 0 0 1 +netname=din_6 +} N 61200 44300 59700 44300 4 -N 59700 43900 61200 43900 4 -N 65400 50400 66900 50400 4 -N 66900 50000 65400 50000 4 -N 65400 49600 66900 49600 4 -N 71900 50400 73400 50400 4 -N 73400 50000 71900 50000 4 -N 71900 49600 73400 49600 4 +{ +T 59700 44400 5 10 1 1 0 0 1 +netname=din_7 +} +N 63800 50600 64900 50600 4 +{ +T 63800 50700 5 10 1 1 0 0 1 +netname=dout_9 +} +N 62900 50200 64900 50200 4 +{ +T 63800 50300 5 10 1 1 0 0 1 +netname=pc_ok +} +N 69900 50600 71700 50600 4 +{ +T 70900 50700 5 10 1 1 0 0 1 +netname=ispdat +} +N 71700 50200 69900 50200 4 +{ +T 70900 50300 5 10 1 1 0 0 1 +netname=ispclk +} +C 71700 50700 1 180 1 conn-5.sym +{ +T 72055 50905 5 10 1 1 180 6 1 +refdes=J9 +T 72000 48600 5 10 1 1 0 0 1 +value=ICSP +} +N 71700 49800 70500 49800 4 +{ +T 70900 49900 5 10 1 1 0 0 1 +netname=vpp +} +N 70500 49800 70500 49000 4 +N 70500 49000 64900 49000 4 +N 64900 49000 64900 49800 4 +C 71500 49100 1 0 0 gnd.sym +N 71600 49400 71700 49400 4 +N 71700 49000 71100 49000 4 +T 66700 51700 9 10 1 0 0 0 2 +note that relay output is moved from GP0 which +was used on the C4 board to make way for ICSP +C 58800 50300 1 0 0 gnd.sym +N 59100 50600 58900 50600 4 +N 58900 50600 58900 51000 4 +N 58900 51000 58900 51400 4 +N 58900 51400 58900 51800 4 +N 58900 51800 58900 52200 4 +N 58900 52200 58900 52600 4 +N 58900 52600 58900 53000 4 +N 58900 53000 58900 53400 4 +N 58900 53400 58900 53800 4 +C 62400 50100 1 90 0 capacitor.sym +{ +T 61700 50300 5 10 0 0 90 0 1 +device=CAPACITOR +T 62000 50900 5 10 1 1 180 0 1 +refdes=C6 +T 61500 50300 5 10 0 0 90 0 1 +symversion=0.1 +T 61600 50200 5 10 1 1 0 0 1 +value=0.1uF +} +C 62100 49800 1 0 0 gnd.sym +C 64400 46600 1 0 1 conn-2.sym +{ +T 64095 47245 5 10 1 1 0 6 1 +refdes=J8 +} +C 65600 53900 1 0 0 gnd.sym +N 65800 54300 65700 54300 4 +N 65700 54200 65700 57100 4 +N 65700 56300 65800 56300 4 +N 65700 56700 65800 56700 4 +N 65800 57100 65700 57100 4 +N 65800 55900 65700 55900 4 +C 65200 60200 1 0 0 5V-plus.sym +N 65400 55500 65400 60200 4 +N 65400 58700 65800 58700 4 +N 65400 55500 65800 55500 4 +N 61800 59900 63000 59900 4 +{ +T 61800 60000 5 10 1 1 0 0 1 +netname=up_0 +} +N 63000 59500 61800 59500 4 +{ +T 61800 59600 5 10 1 1 0 0 1 +netname=down_0 +} +N 61800 58300 63000 58300 4 +{ +T 61800 58400 5 10 1 1 0 0 1 +netname=quadA_0 +} +N 63000 57900 61800 57900 4 +{ +T 61800 58000 5 10 1 1 0 0 1 +netname=quadB_0 +} +N 61800 57500 63000 57500 4 +{ +T 61800 57600 5 10 1 1 0 0 1 +netname=quadZ_0 +} +N 63000 55100 61800 55100 4 +{ +T 61800 55200 5 10 1 1 0 0 1 +netname=din_0 +} +N 61800 54700 63000 54700 4 +{ +T 61800 54800 5 10 1 1 0 0 1 +netname=din_1 +} +N 63000 59100 61800 59100 4 +{ +T 61800 59200 5 10 1 1 0 0 1 +netname=dout_0 +} +C 62800 53900 1 0 0 gnd.sym +N 63000 54300 62900 54300 4 +N 62900 54200 62900 57100 4 +N 62900 56300 63000 56300 4 +N 62900 56700 63000 56700 4 +N 63000 57100 62900 57100 4 +N 63000 55900 62900 55900 4 +C 62400 60200 1 0 0 5V-plus.sym +N 62600 55500 62600 60200 4 +N 62600 58700 63000 58700 4 +N 62600 55500 63000 55500 4 +N 67400 59900 68600 59900 4 +{ +T 67400 60000 5 10 1 1 0 0 1 +netname=up_2 +} +N 68600 59500 67400 59500 4 +{ +T 67400 59600 5 10 1 1 0 0 1 +netname=down_2 +} +N 67400 58300 68600 58300 4 +{ +T 67400 58400 5 10 1 1 0 0 1 +netname=quadA_2 +} +N 68600 57900 67400 57900 4 +{ +T 67400 58000 5 10 1 1 0 0 1 +netname=quadB_2 +} +N 67400 57500 68600 57500 4 +{ +T 67400 57600 5 10 1 1 0 0 1 +netname=quadZ_2 +} +N 68600 55100 67400 55100 4 +{ +T 67400 55200 5 10 1 1 0 0 1 +netname=din_4 +} +N 67400 54700 68600 54700 4 +{ +T 67400 54800 5 10 1 1 0 0 1 +netname=din_5 +} +N 68600 59100 67400 59100 4 +{ +T 67400 59200 5 10 1 1 0 0 1 +netname=dout_2 +} +C 68400 53900 1 0 0 gnd.sym +N 68600 54300 68500 54300 4 +N 68500 54200 68500 57100 4 +N 68500 56300 68600 56300 4 +N 68500 56700 68600 56700 4 +N 68600 57100 68500 57100 4 +N 68600 55900 68500 55900 4 +C 68000 60200 1 0 0 5V-plus.sym +N 68200 55500 68200 60200 4 +N 68200 58700 68600 58700 4 +N 68200 55500 68600 55500 4 +N 70200 59900 71400 59900 4 +{ +T 70200 60000 5 10 1 1 0 0 1 +netname=up_3 +} +N 71400 59500 70200 59500 4 +{ +T 70200 59600 5 10 1 1 0 0 1 +netname=down_3 +} +N 70200 58300 71400 58300 4 +{ +T 70200 58400 5 10 1 1 0 0 1 +netname=quadA_3 +} +N 71400 57900 70200 57900 4 +{ +T 70200 58000 5 10 1 1 0 0 1 +netname=quadB_3 +} +N 70200 57500 71400 57500 4 +{ +T 70200 57600 5 10 1 1 0 0 1 +netname=quadZ_3 +} +N 71400 55100 70200 55100 4 +{ +T 70200 55200 5 10 1 1 0 0 1 +netname=din_6 +} +N 70200 54700 71400 54700 4 +{ +T 70200 54800 5 10 1 1 0 0 1 +netname=din_7 +} +N 71400 59100 70200 59100 4 +{ +T 70200 59200 5 10 1 1 0 0 1 +netname=dout_3 +} +C 71200 53900 1 0 0 gnd.sym +N 71400 54300 71300 54300 4 +N 71300 54200 71300 57100 4 +N 71300 56300 71400 56300 4 +N 71300 56700 71400 56700 4 +N 71400 57100 71300 57100 4 +N 71400 55900 71300 55900 4 +C 70800 60200 1 0 0 5V-plus.sym +N 71000 55500 71000 60200 4 +N 71000 58700 71400 58700 4 +N 71000 55500 71400 55500 4 +C 61100 43600 1 0 0 gnd.sym +T 62000 44800 9 10 1 0 0 0 1 +E_stop +T 72200 54700 9 10 1 0 0 0 3 +E_stop + +touch +N 61200 45500 59700 45500 4 +{ +T 59700 45600 5 10 1 1 0 0 1 +netname=dout_8 +} +N 56000 49400 52800 49400 4 +{ +T 53500 49500 5 10 1 1 0 0 1 +netname=nConfig +} +C 56000 48800 1 0 0 conn-3.sym +{ +T 56300 50100 5 10 1 1 0 0 1 +refdes=J10 +} +T 62000 45600 9 10 1 0 0 0 1 +spindle +T 62000 45200 9 10 1 0 0 0 1 +enable +T 62000 44400 9 10 1 0 0 0 1 +touch +C 70900 49000 1 0 0 5V-plus.sym +C 69600 44200 1 270 0 led.sym +{ +T 69850 44100 5 10 1 1 0 0 1 +refdes=D3 +T 70200 44300 5 10 0 0 270 0 1 +device=LED +T 69900 43700 5 10 1 1 0 0 1 +value=green +} +C 69600 46200 1 270 0 led.sym +{ +T 69850 46100 5 10 1 1 0 0 1 +refdes=D2 +T 70200 46300 5 10 0 0 270 0 1 +device=LED +T 69900 45700 5 10 1 1 0 0 1 +value=green +} +C 69800 46200 1 90 0 resistor.sym +{ +T 69400 46500 5 10 0 0 90 0 1 +device=RESISTOR +T 70100 46900 5 10 1 1 180 0 1 +refdes=R2 +T 69900 46500 5 10 1 1 0 0 1 +value=470 +} +C 69800 44200 1 90 0 resistor.sym +{ +T 69400 44500 5 10 0 0 90 0 1 +device=RESISTOR +T 70100 44900 5 10 1 1 180 0 1 +refdes=R3 +T 69900 44500 5 10 1 1 0 0 1 +value=330 +} +C 69600 45500 1 0 0 gnd.sym +C 69600 43500 1 0 0 gnd.sym +C 63100 49100 1 0 0 led2.sym +{ +T 63150 49900 5 10 1 1 0 0 1 +refdes=D4 +T 63000 49700 5 10 0 0 0 0 1 +device=LED +T 63050 49100 5 10 0 1 0 0 1 +footprint=0605 +} +C 63800 48300 1 90 0 resistor.sym +{ +T 63400 48600 5 10 0 0 90 0 1 +device=RESISTOR +T 64100 49000 5 10 1 1 180 0 1 +refdes=R5 +T 64100 48700 5 10 1 1 180 0 1 +value=1k +} +C 62800 50100 1 90 0 resistor.sym +{ +T 62400 50400 5 10 0 0 90 0 1 +device=RESISTOR +T 63100 50800 5 10 1 1 180 0 1 +refdes=R4 +T 63100 50500 5 10 1 1 180 0 1 +value=1k +} +C 63600 48000 1 0 0 gnd.sym +N 63500 49200 63700 49200 4 +N 62900 50200 62900 49200 4 +N 63100 49200 62900 49200 4 +N 63500 49600 63700 49600 4 +N 63700 49600 63700 50200 4 +N 62700 50100 62700 49600 4 +N 62700 49600 63100 49600 4 diff --git a/symbols/conn-5.sym b/symbols/conn-5.sym new file mode 100644 index 0000000..d1cb15d --- /dev/null +++ b/symbols/conn-5.sym @@ -0,0 +1,59 @@ +v 20080127 1 +P 0 1700 300 1700 1 0 0 +{ +T 0 1700 5 10 0 0 0 0 1 +pintype=unknown +T 355 1695 5 10 0 1 0 0 1 +pinlabel=unknown +T 205 1745 5 10 1 1 0 6 1 +pinnumber=1 +T 0 1700 5 10 0 0 0 0 1 +pinseq=0 +} +P 0 1300 300 1300 1 0 0 +{ +T 0 1300 5 10 0 0 0 0 1 +pintype=unknown +T 355 1295 5 10 0 1 0 0 1 +pinlabel=unknown +T 205 1345 5 10 1 1 0 6 1 +pinnumber=2 +T 0 1300 5 10 0 0 0 0 1 +pinseq=0 +} +P 0 900 300 900 1 0 0 +{ +T 0 900 5 10 0 0 0 0 1 +pintype=unknown +T 355 895 5 10 0 1 0 0 1 +pinlabel=unknown +T 205 945 5 10 1 1 0 6 1 +pinnumber=3 +T 0 900 5 10 0 0 0 0 1 +pinseq=0 +} +P 0 500 300 500 1 0 0 +{ +T 0 500 5 10 0 0 0 0 1 +pintype=unknown +T 355 495 5 10 0 1 0 0 1 +pinlabel=unknown +T 205 545 5 10 1 1 0 6 1 +pinnumber=4 +T 0 500 5 10 0 0 0 0 1 +pinseq=0 +} +P 0 100 300 100 1 0 0 +{ +T 0 100 5 10 0 0 0 0 1 +pintype=unknown +T 355 95 5 10 0 1 0 0 1 +pinlabel=unknown +T 205 145 5 10 1 1 0 6 1 +pinnumber=5 +T 0 100 5 10 0 0 0 0 1 +pinseq=0 +} +B 300 0 400 1800 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 +T 355 1895 8 10 1 1 0 0 1 +refdes=J? diff --git a/symbols/led2.sym b/symbols/led2.sym new file mode 100644 index 0000000..1959f07 --- /dev/null +++ b/symbols/led2.sym @@ -0,0 +1,71 @@ +v 20080127 1 +T -50 800 8 10 1 1 0 0 1 +refdes=D? +T -100 600 8 10 0 0 0 0 1 +device=LED +P 0 100 150 100 1 0 0 +{ +T 100 150 5 8 0 1 0 0 1 +pinnumber=2 +T 100 150 5 8 0 0 0 0 1 +pinseq=2 +T 100 150 5 8 0 1 0 0 1 +pinlabel=2 +T 100 150 5 8 0 1 0 0 1 +pintype=pas +} +P 400 100 250 100 1 0 0 +{ +T 200 150 5 8 0 1 0 0 1 +pinnumber=4 +T 200 150 5 8 0 0 0 0 1 +pinseq=4 +T 200 150 5 8 0 1 0 0 1 +pinlabel=4 +T 200 150 5 8 0 1 0 0 1 +pintype=pas +} +L 150 200 250 100 3 0 0 0 -1 -1 +L 250 100 150 0 3 0 0 0 -1 -1 +L 150 200 150 0 3 0 0 0 -1 -1 +L 250 200 250 0 3 0 0 0 -1 -1 +L 180 240 280 340 3 0 0 0 -1 -1 +L 280 340 230 310 3 0 0 0 -1 -1 +L 280 340 250 290 3 0 0 0 -1 -1 +L 250 240 350 340 3 0 0 0 -1 -1 +L 350 340 300 310 3 0 0 0 -1 -1 +L 350 340 320 290 3 0 0 0 -1 -1 +T -50 0 8 10 0 1 0 0 1 +footprint=0605 +P 0 500 150 500 1 0 0 +{ +T 100 550 5 8 0 1 0 0 1 +pinnumber=1 +T 100 550 5 8 0 0 0 0 1 +pinseq=1 +T 100 550 5 8 0 1 0 0 1 +pinlabel=1 +T 100 550 5 8 0 1 0 0 1 +pintype=pas +} +P 400 500 250 500 1 0 0 +{ +T 200 550 5 8 0 1 0 0 1 +pinnumber=3 +T 200 550 5 8 0 0 0 0 1 +pinseq=3 +T 200 550 5 8 0 1 0 0 1 +pinlabel=3 +T 200 550 5 8 0 1 0 0 1 +pintype=pas +} +L 150 600 250 500 3 0 0 0 -1 -1 +L 250 500 150 400 3 0 0 0 -1 -1 +L 150 600 150 400 3 0 0 0 -1 -1 +L 250 600 250 400 3 0 0 0 -1 -1 +L 180 640 280 740 3 0 0 0 -1 -1 +L 280 740 230 710 3 0 0 0 -1 -1 +L 280 740 250 690 3 0 0 0 -1 -1 +L 250 640 350 740 3 0 0 0 -1 -1 +L 350 740 300 710 3 0 0 0 -1 -1 +L 350 740 320 690 3 0 0 0 -1 -1 diff --git a/symbols/title-D-bdale.sym b/symbols/title-D-bdale.sym index bcfc6b2..680ae88 100644 --- a/symbols/title-D-bdale.sym +++ b/symbols/title-D-bdale.sym @@ -14,7 +14,7 @@ L 26400 600 34000 600 15 0 0 0 -1 -1 T 26500 100 15 10 1 0 0 0 1 Project URL: T 26900 800 9 10 1 0 0 0 2 - Copyright 2010 by Bdale Garbee + Copyright 2011 by Bdale Garbee Licensed under the TAPR Open Hardware License, http://www.tapr.org/OHL L 26400 1400 34000 1400 15 0 0 0 -1 -1 B 0 0 34000 22000 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 -- 2.39.5