From d4d0fc36f48fb3e5b908d4b508c8c268561d40fa Mon Sep 17 00:00:00 2001 From: kvigor Date: Thu, 9 Mar 2000 18:25:34 +0000 Subject: [PATCH] 10 bit stack mode: handle DPTR2 in ISRs git-svn-id: https://sdcc.svn.sourceforge.net/svnroot/sdcc/trunk/sdcc@182 4a8a32a2-be11-0410-ad9d-d568d2c75423 --- src/mcs51/gen.c | 31 ++++++++++++++++++++++--------- 1 file changed, 22 insertions(+), 9 deletions(-) diff --git a/src/mcs51/gen.c b/src/mcs51/gen.c index 37f9a78e..0f2a60b5 100644 --- a/src/mcs51/gen.c +++ b/src/mcs51/gen.c @@ -326,14 +326,6 @@ static asmop *aopForSym (iCode *ic,symbol *sym,bool result) * far data space. */ - if (result) - { - fprintf(stderr, - "*** Internal error: 10 bit stack var used as result.\n"); - emitcode(";", "look at me!"); - } - - if ( _G.accInUse ) emitcode("push","acc"); @@ -2051,7 +2043,19 @@ static void genFunction (iCode *ic) if (!inExcludeList("dph")) emitcode ("push","dph"); if (options.model == MODEL_FLAT24 && !inExcludeList("dpx")) - emitcode ("push", "dpx"); + { + emitcode ("push", "dpx"); + /* Make sure we're using standard DPTR */ + emitcode ("push", "dps"); + emitcode ("mov", "dps, #0x00"); + if (options.stack10bit) + { + /* This ISR could conceivably use DPTR2. Better save it. */ + emitcode ("push", "dpl1"); + emitcode ("push", "dph1"); + emitcode ("push", "dpx1"); + } + } /* if this isr has no bank i.e. is going to run with bank 0 , then we need to save more registers :-) */ @@ -2222,7 +2226,16 @@ static void genEndFunction (iCode *ic) } if (options.model == MODEL_FLAT24 && !inExcludeList("dpx")) + { + if (options.stack10bit) + { + emitcode ("pop", "dpx1"); + emitcode ("pop", "dph1"); + emitcode ("pop", "dpl1"); + } + emitcode ("pop", "dps"); emitcode ("pop", "dpx"); + } if (!inExcludeList("dph")) emitcode ("pop","dph"); if (!inExcludeList("dpl")) -- 2.47.2