From c286ac5bdda6b763ecbea13a9c9e138edd7d9cc2 Mon Sep 17 00:00:00 2001
From: sdattalo <sdattalo@4a8a32a2-be11-0410-ad9d-d568d2c75423>
Date: Wed, 11 Jun 2003 05:51:07 +0000
Subject: [PATCH] Applied patch from Vangelis Rokas <vrokas@otenet.gr> for
 pic16 multi-operand instructions (movff) and banksel assembler directives.

git-svn-id: https://sdcc.svn.sourceforge.net/svnroot/sdcc/trunk/sdcc@2689 4a8a32a2-be11-0410-ad9d-d568d2c75423
---
 ChangeLog             |  17 ++
 src/SDCCmain.c        |  12 +-
 src/pic16/device.c    |   6 +-
 src/pic16/gen.c       |  82 ++++++--
 src/pic16/main.c      |   2 +-
 src/pic16/pcode.c     | 453 ++++++++++++++++++++++++++++++++++++++----
 src/pic16/pcode.h     |  47 ++++-
 src/pic16/pcoderegs.c |  40 +++-
 src/pic16/ralloc.c    |  22 +-
 src/pic16/ralloc.h    |   6 +-
 10 files changed, 603 insertions(+), 84 deletions(-)

diff --git a/ChangeLog b/ChangeLog
index 5113d5ea..3c07f451 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,20 @@
+2003-06-10  Scott Dattalo  <scott@dattalo.com>
+
+	 Scott D. for Vangelis Rokas (vrokas@otenet.gr). I (scott) don't
+	know all the details, but essentially this set of changes enable
+	the pic16 port to generate movff instructions and generate assembler
+	directives, 
+	* src/SDCCmain.c: 
+	* src/pic16/gen.c: 
+	* src/pic16/glue.c:
+	* src/pic16/pcode.c:
+	* src/pic16/device.c:
+	* src/pic16/main.c:
+	* src/pic16/pcode.h:
+	* src/pic16/pcoderegs.c:
+	* src/pic16/ralloc.c:
+	* src/pic16/ralloc.h:
+
 2003-06-08  Jesus Calvino-Fraga <jesusc@ece.ubc.ca>
 
 	* support/Util/SDCCerr.c, src/SDCCglobl.h, src/SDCCmain.c, doc/sdccman.lyx:
diff --git a/src/SDCCmain.c b/src/SDCCmain.c
index 30275885..c306ba2f 100644
--- a/src/SDCCmain.c
+++ b/src/SDCCmain.c
@@ -222,6 +222,10 @@ optionsTable[] = {
     { 0,    OPTION_PRINT_SEARCH_DIRS, &options.printSearchDirs, "display the directories in the compiler's search path"},
     { 0,    OPTION_MSVC_ERROR_STYLE, &options.vc_err_style, "messages are compatible with Micro$oft visual studio"},
     /* End of options */
+#if 0 /* 10jun03 !OPT_DISABLE_PIC16 */
+    { 0,    "--no-movff",	    &options.no_movff, "disable generating MOVFF opcode in PIC16 port"},
+    { 0,    "--gen-banksel",	    &options.gen_banksel, "enable the generation of banksel assembler directives in PIC16 port"},
+#endif
     { 0,    NULL }
 };
 
@@ -405,9 +409,13 @@ printVersionInfo ()
 
   fprintf (stderr,
 	   "SDCC : ");
-  for (i = 0; i < NUM_PORTS; i++)
+  for (i = 0; i < NUM_PORTS; i++) {
     fprintf (stderr, "%s%s", i == 0 ? "" : "/", _ports[i]->target);
-
+#ifdef DEFAULT_PORT
+	fprintf(stderr, "%s", (&DEFAULT_PORT == _ports[i])?"*":"");
+#endif
+  }
+  
   fprintf (stderr, " " SDCC_VERSION_STR
 #ifdef SDCC_SUB_VERSION_STR
 	   "/" SDCC_SUB_VERSION_STR
diff --git a/src/pic16/device.c b/src/pic16/device.c
index f5861d81..b04f455e 100644
--- a/src/pic16/device.c
+++ b/src/pic16/device.c
@@ -496,7 +496,7 @@ static void mapRegister(regs *reg)
 
     do {
 
-      //fprintf(stdout,"mapping %s to address 0x%02x, reg size = %d\n",reg->name, (reg->address+alias+i),reg->size);
+//	fprintf(stdout,"mapping %s to address 0x%02x, reg size = %d\n",reg->name, (reg->address+alias+i),reg->size);
 
       pic16_finalMapping[reg->address + alias + i].reg = reg;
       pic16_finalMapping[reg->address + alias + i].instance = i;
@@ -548,7 +548,7 @@ static int assignRegister(regs *reg, int start_address)
     for (i=start_address; i<=pic->maxRAMaddress; i++) {
 
       if (validAddress(i,reg->size)) {
-	fprintf(stderr, "found valid address = 0x%04x\n", i);
+//	fprintf(stderr, "found valid address = 0x%04x\n", i);
 	reg->address = i;
 	mapRegister(reg);
 	return i;
@@ -590,7 +590,7 @@ void pic16_assignRelocatableRegisters(set *regset, int used)
 
     //fprintf(stdout,"assigning %s isFixed=%d, wasUsed=%d\n",reg->name,reg->isFixed,reg->wasUsed);
 
-    if((!reg->isFixed) && ( used || reg->wasUsed))
+    if((!reg->isFixed) && (used || reg->wasUsed))
       address = assignRegister(reg,address);
 
   }
diff --git a/src/pic16/gen.c b/src/pic16/gen.c
index d6f5eddf..e73f4cca 100644
--- a/src/pic16/gen.c
+++ b/src/pic16/gen.c
@@ -57,6 +57,11 @@ static int aopIdx (asmop *aop, int offset);
 static int labelOffset=0;
 extern int pic16_debug_verbose;
 static int optimized_for_speed = 0;
+/*
+  hack hack
+
+*/
+int options_no_movff = 1;
 
 /* max_key keeps track of the largest label number used in 
    a function. This is then used to adjust the label offset
@@ -209,8 +214,9 @@ void DEBUGpic16_emitcode (char *inst,char *fmt, ...)
     lineCurr->isDebug  = _G.debugLine;
 
     pic16_addpCode2pBlock(pb,pic16_newpCodeCharP(lb));
-
     va_end(ap);
+
+//	fprintf(stderr, "%s\n", lb);
 }
 
 
@@ -226,6 +232,8 @@ void pic16_emitpcode(PIC_OPCODE poc, pCodeOp *pcop)
     pic16_addpCode2pBlock(pb,pic16_newpCode(poc,pcop));
   else
     DEBUGpic16_emitcode(";","%s  ignoring NULL pcop",__FUNCTION__);
+    
+//    fprintf(stderr, "%s\n", pcop->name);
 }
 
 void pic16_emitpcodeNULLop(PIC_OPCODE poc)
@@ -281,6 +289,8 @@ static regs *getFreePtr (iCode *ic, asmop **aopp, bool result)
     bool r0iu = FALSE , r1iu = FALSE;
     bool r0ou = FALSE , r1ou = FALSE;
 
+
+	//fprintf(stderr, "%s:%d: getting free ptr from ic = %c\n", __FUNCTION__, __LINE__, ic->op);
     /* the logic: if r0 & r1 used in the instruction
     then we are in trouble otherwise */
 
@@ -440,8 +450,10 @@ static asmop *aopForSym (iCode *ic,symbol *sym,bool result)
 
     DEBUGpic16_emitcode("; ***","%s %d",__FUNCTION__,__LINE__);
     /* if already has one */
-    if (sym->aop)
+    if (sym->aop) {
+	    DEBUGpic16_emitcode("; ***", "already has sym %s %d", __FUNCTION__, __LINE__);
         return sym->aop;
+    }
 
     /* assign depending on the storage class */
     /* if it is on the stack or indirectly addressable */
@@ -763,14 +775,14 @@ void pic16_aopOp (operand *op, iCode *ic, bool result)
 
     /* if the underlying symbol has a aop */
     if (IS_SYMOP(op) && OP_SYMBOL(op)->aop) {
-      DEBUGpic16_emitcode(";","%d",__LINE__);
+      DEBUGpic16_emitcode(";","%d has symbol",__LINE__);
         op->aop = OP_SYMBOL(op)->aop;
         return;
     }
 
     /* if this is a true symbol */
     if (IS_TRUE_SYMOP(op)) {    
-      //DEBUGpic16_emitcode(";","%d - true symop",__LINE__);
+	DEBUGpic16_emitcode(";","%d - true symop",__LINE__);
       op->aop = aopForSym(ic,OP_SYMBOL(op),result);
       return ;
     }
@@ -785,7 +797,7 @@ void pic16_aopOp (operand *op, iCode *ic, bool result)
 
     sym = OP_SYMBOL(op);
 
-
+	DEBUGpic16_emitcode("; ***", "%d: symbol name = %s", __LINE__, sym->name);
     /* if the type is a conditional */
     if (sym->regType == REG_CND) {
         aop = op->aop = sym->aop = newAsmop(AOP_CRY);
@@ -1245,7 +1257,8 @@ static pCodeOp *popRegFromString(char *str, int size, int offset)
   pCodeOp *pcop = Safe_calloc(1,sizeof(pCodeOpReg) );
   pcop->type = PO_DIR;
 
-  DEBUGpic16_emitcode(";","%d",__LINE__);
+  DEBUGpic16_emitcode(";","%d %s %s",__LINE__, __FUNCTION__, str);
+//  fprintf(stderr, "%s:%d: register name = %s pos = %d/%d\n", __FUNCTION__, __LINE__, str, offset, size);
 
   if(!str)
     str = "BAD_STRING";
@@ -1259,6 +1272,7 @@ static pCodeOp *popRegFromString(char *str, int size, int offset)
   if(PCOR(pcop)->r == NULL) {
     //fprintf(stderr,"%d - couldn't find %s in allocated registers, size =%d\n",__LINE__,aop->aopu.aop_dir,aop->size);
     PCOR(pcop)->r = pic16_allocRegByName (pcop->name,size);
+	//fprintf(stderr, "allocating new register -> %s\n", str);
     DEBUGpic16_emitcode(";","%d  %s   offset=%d - had to alloc by reg name",__LINE__,pcop->name,offset);
   } else {
     DEBUGpic16_emitcode(";","%d  %s   offset=%d",__LINE__,pcop->name,offset);
@@ -1287,6 +1301,24 @@ static pCodeOp *popRegFromIdx(int rIdx)
 
   return pcop;
 }
+
+/*---------------------------------------------------------------------------------*/
+/* pic16_popGet2 - a variant of pic16_popGet to handle two memory operand commands */
+/*                 VR 030601                                                       */
+/*---------------------------------------------------------------------------------*/
+pCodeOp *pic16_popGet2(asmop *aop_src, asmop *aop_dst, int offset)
+{
+  pCodeOpReg2 *pcop2;
+  pCodeOp *temp;
+  
+	pcop2 = (pCodeOpReg2 *)pic16_popGet(aop_src, offset);
+	temp = pic16_popGet(aop_dst, offset);
+	pcop2->pcop2 = temp;
+	
+  return PCOP(pcop2);
+}
+
+
 /*-----------------------------------------------------------------*/
 /* pic16_popGet - asm operator to pcode operator conversion              */
 /*-----------------------------------------------------------------*/
@@ -1322,6 +1354,7 @@ pCodeOp *pic16_popGet (asmop *aop, int offset) //, bool bit16, bool dname)
 
     case AOP_DIR:
       return popRegFromString(aop->aopu.aop_dir, aop->size, offset);
+
 #if 0
 	pcop = Safe_calloc(1,sizeof(pCodeOpReg) );
 	pcop->type = PO_DIR;
@@ -1928,10 +1961,8 @@ static void genCpl (iCode *ic)
         pic16_aopPut(AOP(IC_RESULT(ic)),"a",offset++);
 */
 	if (pic16_sameRegs(AOP(IC_LEFT(ic)), AOP(IC_RESULT(ic))) ) {
-	      DEBUGpic16_emitcode("; ", "same registers");
 	      pic16_emitpcode(POC_COMF,  pic16_popGet(AOP(IC_LEFT(ic)), offset));
 	} else {
-		DEBUGpic16_emitcode(";",  "not sames registers!");
 		pic16_emitpcode(POC_COMFW, pic16_popGet(AOP(IC_LEFT(ic)),offset));
 		pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(IC_RESULT(ic)),offset));
 	}
@@ -5410,7 +5441,7 @@ static void genAnd (iCode *ic, iCode *ifx)
 	switch(lit & 0xff) {
 	case 0x00:
 	  /*  and'ing with 0 has clears the result */
-	  pic16_emitcode("clrf","%s",pic16_aopGet(AOP(result),offset,FALSE,FALSE));
+//	  pic16_emitcode("clrf","%s",pic16_aopGet(AOP(result),offset,FALSE,FALSE));
 	  pic16_emitpcode(POC_CLRF,pic16_popGet(AOP(result),offset));
 	  break;
 	case 0xff:
@@ -5422,7 +5453,7 @@ static void genAnd (iCode *ic, iCode *ifx)
 	    int p = my_powof2( (~lit) & 0xff );
 	    if(p>=0) {
 	      /* only one bit is set in the literal, so use a bcf instruction */
-	      pic16_emitcode("bcf","%s,%d",pic16_aopGet(AOP(left),offset,FALSE,TRUE),p);
+//	      pic16_emitcode("bcf","%s,%d",pic16_aopGet(AOP(left),offset,FALSE,TRUE),p);
 	      pic16_emitpcode(POC_BCF,pic16_newpCodeOpBit(pic16_aopGet(AOP(left),offset,FALSE,FALSE),p,0));
 
 	    } else {
@@ -9187,12 +9218,14 @@ static void genAddrOf (iCode *ic)
   size = AOP_SIZE(IC_RESULT(ic));
   offset = 0;
 
+
   while (size--) {
     pic16_emitpcode(POC_MOVLW, pic16_popGet(AOP(left),offset));
     pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),offset));
     offset++;
   }
 
+
   pic16_freeAsmop(left,NULL,ic,FALSE);
   pic16_freeAsmop(result,NULL,ic,TRUE);
 
@@ -9240,7 +9273,7 @@ static void genAssign (iCode *ic)
   right  = IC_RIGHT(ic) ;
 
   DEBUGpic16_emitcode ("; ***","%s  %d",__FUNCTION__,__LINE__);
-
+  
   /* if they are the same */
   if (operandsEqu (IC_RESULT(ic),IC_RIGHT(ic)))
     return ;
@@ -9256,7 +9289,6 @@ static void genAssign (iCode *ic)
 
   /* if the result is a bit */
   if (AOP_TYPE(result) == AOP_CRY) {
-
     /* if the right size is a literal then
        we know what the value is */
     if (AOP_TYPE(right) == AOP_LIT) {
@@ -9309,6 +9341,7 @@ static void genAssign (iCode *ic)
   if(AOP_TYPE(right) == AOP_LIT)
     lit = (unsigned long)floatFromVal(AOP(right)->aopu.aop_lit);
 
+/* VR - What is this?! */
   if( AOP_TYPE(right) == AOP_DIR  && (AOP_TYPE(result) == AOP_REG) && size==1)  {
   DEBUGpic16_emitcode ("; ***","%s  %d",__FUNCTION__,__LINE__);
     if(aopIdx(AOP(result),0) == 4) {
@@ -9342,8 +9375,27 @@ static void genAssign (iCode *ic)
       }
     } else {
   DEBUGpic16_emitcode ("; ***","%s  %d",__FUNCTION__,__LINE__);
-      pic16_emitpcode(POC_MOVFW, pic16_popGet(AOP(right),offset));
-      pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),offset));
+
+	if(!options_no_movff) {
+
+	/* This is a hack to turn MOVFW/MOVWF pairs to MOVFF command. It
+	   normally should work, but mind that thw W register live range
+	   is not checked, so if the code generator assumes that the W
+	   is already loaded after such a pair, wrong code will be generated.
+	   
+	   Checking the live range is the next step.
+	   This is experimental code yet and has not been fully tested yet.
+	   USE WITH CARE. Revert to old code by setting 0 to the condition above.
+	   Vangelis Rokas 030603 (vrokas@otenet.gr) */
+	   
+	
+		pic16_emitpcode(POC_MOVFF, pic16_popGet2(AOP(right), AOP(result), offset));
+	} else {
+	/* This is the old code, which is assumed(?!) that works fine(!?) */
+
+		pic16_emitpcode(POC_MOVFW, pic16_popGet(AOP(right),offset));
+		pic16_emitpcode(POC_MOVWF, pic16_popGet(AOP(result),offset));
+	}
     }
 	    
     offset++;
@@ -9356,7 +9408,7 @@ static void genAssign (iCode *ic)
 }   
 
 /*-----------------------------------------------------------------*/
-/* genJumpTab - genrates code for jump table                       */
+/* genJumpTab - generates code for jump table                       */
 /*-----------------------------------------------------------------*/
 static void genJumpTab (iCode *ic)
 {
diff --git a/src/pic16/main.c b/src/pic16/main.c
index 2fc39fc2..4d2fb48f 100644
--- a/src/pic16/main.c
+++ b/src/pic16/main.c
@@ -349,7 +349,7 @@ static const char *_linkCmd[] =
  */
 static const char *_asmCmd[] =
 {
-  "gpasm", "-c  -I /usr/local/share/gputils/header", "\"$1.asm\"", NULL
+  "gpasm", "-c  -I/usr/local/share/gputils/header", "\"$1.asm\"", NULL
 
 };
 
diff --git a/src/pic16/pcode.c b/src/pic16/pcode.c
index 563be44f..33e3513f 100644
--- a/src/pic16/pcode.c
+++ b/src/pic16/pcode.c
@@ -19,7 +19,6 @@
    Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
 -------------------------------------------------------------------------*/
 
-
 #include <stdio.h>
 
 #include "common.h"   // Include everything in the SDCC src directory
@@ -71,7 +70,7 @@ static int mnemonics_initialized = 0;
 static hTab *pic16MnemonicsHash = NULL;
 static hTab *pic16pCodePeepCommandsHash = NULL;
 
-
+int options_gen_banksel = 1;
 
 static pFile *the_pFile = NULL;
 static pBlock *pb_dead_pcodes = NULL;
@@ -89,11 +88,11 @@ extern void pic16_RegsUnMapLiveRanges(void);
 extern void pic16_BuildFlowTree(pBlock *pb);
 extern void pic16_pCodeRegOptimizeRegUsage(int level);
 extern int pic16_picIsInitialized(void);
-#if !OPT_DISABLE_PIC
+#if !OPT_DISABLE_PIC || !OPT_DISABLE_PIC16
 // From pic/pcode.c:
 extern void SAFE_snprintf(char **str, size_t *size, const char *format, ...);
 extern int mnem2key(char const *mnem);
-#endif // OPT_DISABLE_PIC
+#endif // OPT_DISABLE_PIC || !OPT_DISABLE_PIC16
 
 /****************************************************************/
 /*                      Forward declarations                    */
@@ -114,7 +113,7 @@ static void pCodePrintLabel(FILE *of, pCode *pc);
 static void pCodePrintFunction(FILE *of, pCode *pc);
 static void pCodeOpPrint(FILE *of, pCodeOp *pcop);
 static char *pic16_get_op_from_instruction( pCodeInstruction *pcc);
-char *pic16_get_op( pCodeOp *pcop,char *buff,size_t buf_size);
+char *pic16_get_op(pCodeOp *pcop,char *buff,size_t buf_size);
 int pCodePeepMatchLine(pCodePeep *peepBlock, pCode *pcs, pCode *pcd);
 int pic16_pCodePeepMatchRule(pCode *pc);
 static void pBlockStats(FILE *of, pBlock *pb);
@@ -148,6 +147,7 @@ pCodeInstruction pic16_pciADDWF = {
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_W | PCC_REGISTER),   // inCond
   (PCC_REGISTER | PCC_Z) // outCond
@@ -172,6 +172,7 @@ pCodeInstruction pic16_pciADDFW = {
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_W | PCC_REGISTER),   // inCond
   (PCC_W | PCC_Z) // outCond
@@ -196,6 +197,7 @@ pCodeInstruction pic16_pciADDWFC = { // mdubuc - New
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_W | PCC_REGISTER | PCC_C),   // inCond
   (PCC_REGISTER | PCC_Z) // outCond
@@ -220,6 +222,7 @@ pCodeInstruction pic16_pciADDFWC = {
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_W | PCC_REGISTER | PCC_C),   // inCond
   (PCC_W | PCC_Z) // outCond
@@ -244,6 +247,7 @@ pCodeInstruction pic16_pciADDLW = {
   1,    // literal operand
   0,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_W | PCC_LITERAL),   // inCond
   (PCC_W | PCC_Z | PCC_C | PCC_DC | PCC_OV | PCC_N) // outCond
@@ -268,6 +272,7 @@ pCodeInstruction pic16_pciANDLW = {
   1,    // literal operand
   0,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_W | PCC_LITERAL),   // inCond
   (PCC_W | PCC_Z | PCC_N) // outCond
@@ -292,6 +297,7 @@ pCodeInstruction pic16_pciANDWF = {
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_W | PCC_REGISTER),   // inCond
   (PCC_REGISTER | PCC_Z | PCC_N) // outCond
@@ -316,6 +322,7 @@ pCodeInstruction pic16_pciANDFW = {
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_W | PCC_REGISTER),   // inCond
   (PCC_W | PCC_Z) // outCond
@@ -340,6 +347,7 @@ pCodeInstruction pic16_pciBC = { // mdubuc - New
   0,    // literal operand
   0,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_REL_ADDR | PCC_C),   // inCond
   PCC_NONE    // outCond
@@ -364,6 +372,7 @@ pCodeInstruction pic16_pciBCF = {
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_BSF,
   (PCC_REGISTER | PCC_EXAMINE_PCOP),   // inCond
   PCC_REGISTER // outCond
@@ -388,6 +397,7 @@ pCodeInstruction pic16_pciBN = { // mdubuc - New
   0,    // literal operand
   0,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_REL_ADDR | PCC_N),   // inCond
   PCC_NONE    // outCond
@@ -412,6 +422,7 @@ pCodeInstruction pic16_pciBNC = { // mdubuc - New
   0,    // literal operand
   0,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_REL_ADDR | PCC_C),   // inCond
   PCC_NONE    // outCond
@@ -436,6 +447,7 @@ pCodeInstruction pic16_pciBNN = { // mdubuc - New
   0,    // literal operand
   0,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_REL_ADDR | PCC_N),   // inCond
   PCC_NONE    // outCond
@@ -460,6 +472,7 @@ pCodeInstruction pic16_pciBNOV = { // mdubuc - New
   0,    // literal operand
   0,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_REL_ADDR | PCC_OV),   // inCond
   PCC_NONE    // outCond
@@ -484,6 +497,7 @@ pCodeInstruction pic16_pciBNZ = { // mdubuc - New
   0,    // literal operand
   0,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_REL_ADDR | PCC_Z),   // inCond
   PCC_NONE    // outCond
@@ -508,6 +522,7 @@ pCodeInstruction pic16_pciBOV = { // mdubuc - New
   0,    // literal operand
   0,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_REL_ADDR | PCC_OV),   // inCond
   PCC_NONE  // outCond
@@ -532,6 +547,7 @@ pCodeInstruction pic16_pciBRA = { // mdubuc - New
   0,    // literal operand
   0,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   PCC_REL_ADDR,   // inCond
   PCC_NONE    // outCond
@@ -556,6 +572,7 @@ pCodeInstruction pic16_pciBSF = {
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_BCF,
   (PCC_REGISTER | PCC_EXAMINE_PCOP),   // inCond
   (PCC_REGISTER | PCC_EXAMINE_PCOP) // outCond
@@ -580,6 +597,7 @@ pCodeInstruction pic16_pciBTFSC = {
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_BTFSS,
   (PCC_REGISTER | PCC_EXAMINE_PCOP),   // inCond
   PCC_EXAMINE_PCOP // outCond
@@ -604,6 +622,7 @@ pCodeInstruction pic16_pciBTFSS = {
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_BTFSC,
   (PCC_REGISTER | PCC_EXAMINE_PCOP),   // inCond
   PCC_EXAMINE_PCOP // outCond
@@ -628,6 +647,7 @@ pCodeInstruction pic16_pciBTG = { // mdubuc - New
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_REGISTER | PCC_EXAMINE_PCOP),   // inCond
   (PCC_REGISTER | PCC_EXAMINE_PCOP) // outCond
@@ -652,6 +672,7 @@ pCodeInstruction pic16_pciBZ = { // mdubuc - New
   0,    // literal operand
   0,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   PCC_Z,   // inCond
   PCC_NONE // outCond
@@ -676,6 +697,7 @@ pCodeInstruction pic16_pciCALL = {
   0,    // literal operand
   0,    // RAM access bit
   1,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   PCC_NONE, // inCond
   PCC_NONE  // outCond
@@ -700,6 +722,7 @@ pCodeInstruction pic16_pciCOMF = {
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   PCC_REGISTER,  // inCond
   PCC_REGISTER   // outCond
@@ -724,6 +747,7 @@ pCodeInstruction pic16_pciCOMFW = {
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   PCC_REGISTER,  // inCond
   PCC_W   // outCond
@@ -748,6 +772,7 @@ pCodeInstruction pic16_pciCLRF = {
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   PCC_REGISTER, // inCond
   PCC_REGISTER  // outCond
@@ -772,6 +797,7 @@ pCodeInstruction pic16_pciCLRWDT = {
   0,    // literal operand
   0,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   PCC_NONE, // inCond
   PCC_NONE  // outCond
@@ -796,6 +822,7 @@ pCodeInstruction pic16_pciCPFSEQ = { // mdubuc - New
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_W | PCC_REGISTER), // inCond
   PCC_NONE  // outCond
@@ -820,6 +847,7 @@ pCodeInstruction pic16_pciCPFSGT = { // mdubuc - New
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_W | PCC_REGISTER), // inCond
   PCC_NONE  // outCond
@@ -844,6 +872,7 @@ pCodeInstruction pic16_pciCPFSLT = { // mdubuc - New
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_W | PCC_REGISTER), // inCond
   PCC_NONE  // outCond
@@ -868,6 +897,7 @@ pCodeInstruction pic16_pciDAW = {
   0,    // literal operand
   0,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   PCC_W, // inCond
   (PCC_W | PCC_C) // outCond
@@ -892,6 +922,7 @@ pCodeInstruction pic16_pciDCFSNZ = { // mdubuc - New
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   PCC_REGISTER, // inCond
   PCC_REGISTER  // outCond
@@ -916,6 +947,7 @@ pCodeInstruction pic16_pciDCFSNZW = { // mdubuc - New
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   PCC_REGISTER, // inCond
   PCC_W  // outCond
@@ -940,6 +972,7 @@ pCodeInstruction pic16_pciDECF = {
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   PCC_REGISTER,   // inCond
   PCC_REGISTER    // outCond
@@ -964,6 +997,7 @@ pCodeInstruction pic16_pciDECFW = {
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   PCC_REGISTER,   // inCond
   PCC_W    // outCond
@@ -988,6 +1022,7 @@ pCodeInstruction pic16_pciDECFSZ = {
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   PCC_REGISTER,   // inCond
   PCC_REGISTER    // outCond
@@ -1012,6 +1047,7 @@ pCodeInstruction pic16_pciDECFSZW = {
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   PCC_REGISTER,   // inCond
   PCC_W           // outCond
@@ -1036,6 +1072,7 @@ pCodeInstruction pic16_pciGOTO = {
   0,    // literal operand
   0,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   PCC_REL_ADDR,   // inCond
   PCC_NONE    // outCond
@@ -1060,6 +1097,7 @@ pCodeInstruction pic16_pciINCF = {
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   PCC_REGISTER,   // inCond
   (PCC_REGISTER | PCC_C | PCC_DC | PCC_Z | PCC_OV | PCC_N) // outCond
@@ -1084,6 +1122,7 @@ pCodeInstruction pic16_pciINCFW = {
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   PCC_REGISTER,   // inCond
   PCC_W    // outCond
@@ -1108,6 +1147,7 @@ pCodeInstruction pic16_pciINCFSZ = {
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   PCC_REGISTER,   // inCond
   PCC_REGISTER    // outCond
@@ -1132,6 +1172,7 @@ pCodeInstruction pic16_pciINCFSZW = {
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   PCC_REGISTER,   // inCond
   PCC_W           // outCond
@@ -1156,6 +1197,7 @@ pCodeInstruction pic16_pciINFSNZ = { // mdubuc - New
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   PCC_REGISTER,   // inCond
   PCC_REGISTER    // outCond
@@ -1180,6 +1222,7 @@ pCodeInstruction pic16_pciIORWF = {
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_W | PCC_REGISTER),   // inCond
   (PCC_REGISTER | PCC_Z | PCC_N) // outCond
@@ -1204,6 +1247,7 @@ pCodeInstruction pic16_pciIORFW = {
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_W | PCC_REGISTER),   // inCond
   (PCC_W | PCC_Z | PCC_N) // outCond
@@ -1228,6 +1272,7 @@ pCodeInstruction pic16_pciIORLW = {
   1,    // literal operand
   0,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_W | PCC_LITERAL),   // inCond
   (PCC_W | PCC_Z | PCC_N) // outCond
@@ -1252,6 +1297,7 @@ pCodeInstruction pic16_pciLFSR = { // mdubuc - New
   1,    // literal operand
   0,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_REGISTER | PCC_LITERAL), // mdubuc - Should we use a special syntax for
                                 // f (identifies FSRx)?
@@ -1277,6 +1323,7 @@ pCodeInstruction pic16_pciMOVF = {
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   PCC_REGISTER,   // inCond
   (PCC_Z | PCC_N) // outCond
@@ -1301,6 +1348,7 @@ pCodeInstruction pic16_pciMOVFW = {
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   PCC_REGISTER,   // inCond
   (PCC_W | PCC_Z) // outCond
@@ -1325,6 +1373,7 @@ pCodeInstruction pic16_pciMOVFF = { // mdubuc - New
   0,    // literal operand
   0,    // RAM access bit
   0,    // fast call/return mode select bit
+  1,	// second memory operand
   POC_NOP,
   PCC_REGISTER,   // inCond
   PCC_REGISTER2 // outCond
@@ -1348,6 +1397,7 @@ pCodeInstruction pic16_pciMOVLB = { // mdubuc - New
   1,    // literal operand
   0,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_NONE | PCC_LITERAL),   // inCond
   PCC_REGISTER // outCond - BSR
@@ -1371,6 +1421,7 @@ pCodeInstruction pic16_pciMOVLW = {
   1,    // literal operand
   0,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_NONE | PCC_LITERAL),   // inCond
   PCC_W // outCond
@@ -1395,6 +1446,7 @@ pCodeInstruction pic16_pciMOVWF = {
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   PCC_REGISTER,   // inCond
   PCC_W // outCond
@@ -1418,6 +1470,7 @@ pCodeInstruction pic16_pciMULLW = { // mdubuc - New
   1,    // literal operand
   0,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_W | PCC_LITERAL),   // inCond
   PCC_REGISTER // outCond - PROD
@@ -1441,6 +1494,7 @@ pCodeInstruction pic16_pciMULWF = { // mdubuc - New
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_W | PCC_REGISTER),   // inCond
   PCC_REGISTER // outCond - PROD
@@ -1464,6 +1518,7 @@ pCodeInstruction pic16_pciNEGF = { // mdubuc - New
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   PCC_REGISTER, // inCond
   (PCC_REGISTER | PCC_C | PCC_DC | PCC_OV | PCC_N) // outCond
@@ -1487,6 +1542,7 @@ pCodeInstruction pic16_pciNOP = {
   0,    // literal operand
   0,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   PCC_NONE,   // inCond
   PCC_NONE // outCond
@@ -1510,6 +1566,7 @@ pCodeInstruction pic16_pciPOP = { // mdubuc - New
   0,    // literal operand
   0,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   PCC_NONE,  // inCond
   PCC_NONE   // outCond
@@ -1533,6 +1590,7 @@ pCodeInstruction pic16_pciPUSH = {
   0,    // literal operand
   0,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   PCC_NONE,  // inCond
   PCC_NONE   // outCond
@@ -1556,6 +1614,7 @@ pCodeInstruction pic16_pciRCALL = { // mdubuc - New
   0,    // literal operand
   0,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   PCC_REL_ADDR,  // inCond
   PCC_NONE   // outCond
@@ -1580,6 +1639,7 @@ pCodeInstruction pic16_pciRETFIE = {
   0,    // literal operand
   0,    // RAM access bit
   1,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   PCC_NONE,   // inCond
   PCC_NONE    // outCond (not true... affects the GIE bit too)
@@ -1604,6 +1664,7 @@ pCodeInstruction pic16_pciRETLW = {
   1,    // literal operand
   0,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   PCC_LITERAL,   // inCond
   PCC_W // outCond
@@ -1628,6 +1689,7 @@ pCodeInstruction pic16_pciRETURN = {
   0,    // literal operand
   0,    // RAM access bit
   1,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   PCC_NONE,   // inCond
   PCC_NONE // outCond
@@ -1651,6 +1713,7 @@ pCodeInstruction pic16_pciRLCF = { // mdubuc - New
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_C | PCC_REGISTER),   // inCond
   (PCC_REGISTER | PCC_C | PCC_Z | PCC_N) // outCond
@@ -1675,6 +1738,7 @@ pCodeInstruction pic16_pciRLCFW = { // mdubuc - New
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_C | PCC_REGISTER),   // inCond
   (PCC_W | PCC_C | PCC_Z | PCC_N) // outCond
@@ -1699,6 +1763,7 @@ pCodeInstruction pic16_pciRLNCF = { // mdubuc - New
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   PCC_REGISTER,   // inCond
   (PCC_REGISTER | PCC_Z | PCC_N) // outCond
@@ -1722,6 +1787,7 @@ pCodeInstruction pic16_pciRLNCFW = { // mdubuc - New
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   PCC_REGISTER,   // inCond
   (PCC_W | PCC_Z | PCC_N) // outCond
@@ -1745,6 +1811,7 @@ pCodeInstruction pic16_pciRRCF = { // mdubuc - New
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_C | PCC_REGISTER),   // inCond
   (PCC_REGISTER | PCC_C | PCC_Z | PCC_N) // outCond
@@ -1768,6 +1835,7 @@ pCodeInstruction pic16_pciRRCFW = { // mdubuc - New
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_C | PCC_REGISTER),   // inCond
   (PCC_W | PCC_C | PCC_Z | PCC_N) // outCond
@@ -1791,6 +1859,7 @@ pCodeInstruction pic16_pciRRNCF = { // mdubuc - New
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   PCC_REGISTER,   // inCond
   (PCC_REGISTER | PCC_Z | PCC_N) // outCond
@@ -1815,6 +1884,7 @@ pCodeInstruction pic16_pciRRNCFW = { // mdubuc - New
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   PCC_REGISTER,   // inCond
   (PCC_W | PCC_Z | PCC_N) // outCond
@@ -1839,6 +1909,7 @@ pCodeInstruction pic16_pciSETF = { // mdubuc - New
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   PCC_REGISTER,  // inCond
   PCC_REGISTER   // outCond
@@ -1863,6 +1934,7 @@ pCodeInstruction pic16_pciSUBLW = {
   1,    // literal operand
   0,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_W | PCC_LITERAL),   // inCond
   (PCC_W | PCC_C | PCC_DC | PCC_Z | PCC_OV | PCC_N) // outCond
@@ -1887,6 +1959,7 @@ pCodeInstruction pic16_pciSUBFWB = {
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_W | PCC_REGISTER | PCC_C),   // inCond
   (PCC_W | PCC_C | PCC_DC | PCC_Z | PCC_OV | PCC_N) // outCond
@@ -1911,6 +1984,7 @@ pCodeInstruction pic16_pciSUBWF = {
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_W | PCC_REGISTER),   // inCond
   (PCC_REGISTER | PCC_Z) // outCond
@@ -1935,6 +2009,7 @@ pCodeInstruction pic16_pciSUBFW = {
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_W | PCC_REGISTER),   // inCond
   (PCC_W | PCC_Z | PCC_OV | PCC_N) // outCond
@@ -1959,6 +2034,7 @@ pCodeInstruction pic16_pciSUBFWB_D1 = { // mdubuc - New
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_W | PCC_REGISTER | PCC_C),   // inCond
   (PCC_REGISTER | PCC_Z | PCC_C | PCC_DC | PCC_OV | PCC_N) // outCond
@@ -1983,6 +2059,7 @@ pCodeInstruction pic16_pciSUBFWB_D0 = { // mdubuc - New
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_W | PCC_REGISTER | PCC_C),   // inCond
   (PCC_W | PCC_Z | PCC_C | PCC_DC | PCC_OV | PCC_N) // outCond
@@ -2007,6 +2084,7 @@ pCodeInstruction pic16_pciSUBWFB_D1 = { // mdubuc - New
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_W | PCC_REGISTER | PCC_C),   // inCond
   (PCC_REGISTER | PCC_Z | PCC_C | PCC_DC | PCC_OV | PCC_N) // outCond
@@ -2031,6 +2109,7 @@ pCodeInstruction pic16_pciSUBWFB_D0 = { // mdubuc - New
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_W | PCC_REGISTER | PCC_C),   // inCond
   (PCC_W | PCC_Z | PCC_C | PCC_DC | PCC_OV | PCC_N) // outCond
@@ -2055,6 +2134,7 @@ pCodeInstruction pic16_pciSWAPF = {
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_REGISTER),   // inCond
   (PCC_REGISTER) // outCond
@@ -2079,11 +2159,14 @@ pCodeInstruction pic16_pciSWAPFW = {
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_REGISTER),   // inCond
   (PCC_W) // outCond
 };
 
+
+#if 1
 // mdubuc - Remove TRIS
 
 pCodeInstruction pic16_pciTRIS = {
@@ -2103,10 +2186,12 @@ pCodeInstruction pic16_pciTRIS = {
   0,0,  // dest, bit instruction
   0,0,  // branch, skip
   0,    // literal operand
+  0,	// second memory operand
   POC_NOP,
   PCC_NONE,   // inCond
   PCC_REGISTER // outCond
 };
+#endif
 
 pCodeInstruction pic16_pciTSTFSZ = { // mdubuc - New
   {PC_OPCODE, NULL, NULL, 0, NULL, 
@@ -2127,6 +2212,7 @@ pCodeInstruction pic16_pciTSTFSZ = { // mdubuc - New
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   PCC_REGISTER,   // inCond
   PCC_NONE // outCond
@@ -2151,6 +2237,7 @@ pCodeInstruction pic16_pciXORWF = {
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_W | PCC_REGISTER),   // inCond
   (PCC_REGISTER | PCC_Z | PCC_N) // outCond
@@ -2175,6 +2262,7 @@ pCodeInstruction pic16_pciXORFW = {
   0,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_W | PCC_REGISTER),   // inCond
   (PCC_W | PCC_Z | PCC_N) // outCond
@@ -2199,6 +2287,7 @@ pCodeInstruction pic16_pciXORLW = {
   1,    // literal operand
   1,    // RAM access bit
   0,    // fast call/return mode select bit
+  0,	// second memory operand
   POC_NOP,
   (PCC_W | PCC_LITERAL),   // inCond
   (PCC_W | PCC_Z | PCC_C | PCC_DC | PCC_N) // outCond
@@ -2961,7 +3050,7 @@ pCodeFlowLink *pic16_newpCodeFlowLink(pCodeFlow *pcflow)
 }
 
 /*-----------------------------------------------------------------*/
-/* pic16_newpCodeCSource - create a new pCode Source Symbol              */
+/* pic16_newpCodeCSource - create a new pCode Source Symbol        */
 /*-----------------------------------------------------------------*/
 
 pCode *pic16_newpCodeCSource(int ln, char *f, char *l)
@@ -2992,6 +3081,48 @@ pCode *pic16_newpCodeCSource(int ln, char *f, char *l)
   return ( (pCode *)pccs);
 
 }
+
+
+/*******************************************************************/
+/* pic16_newpCodeAsmDir - create a new pCode Assembler Directive   */
+/*			added by VR 6-Jun-2003                     */
+/*******************************************************************/
+
+pCode *pic16_newpCodeAsmDir(char *asdir, char *argfmt, ...)
+{
+  pCodeAsmDir *pcad;
+  va_list ap;
+  char buffer[256];		// how long can a directive be?!
+  char *lbp=buffer;
+  
+
+	pcad = Safe_calloc(1, sizeof(pCodeAsmDir));
+	pcad->pc.type = PC_ASMDIR;
+	pcad->pc.prev = pcad->pc.next = NULL;
+	pcad->pc.pb = NULL;
+	
+	pcad->pc.destruct = genericDestruct;
+	pcad->pc.print = genericPrint;
+
+	if(asdir && *asdir) {
+		pcad->directive = Safe_strdup( asdir );
+	}
+	
+	va_start(ap, argfmt);
+	
+	if(argfmt && *argfmt)
+		vsprintf(buffer, argfmt, ap);
+	
+	va_end(ap);
+	
+	while(isspace(*lbp))lbp++;
+	
+	if(lbp && *lbp)
+		pcad->arg = Safe_strdup( lbp );
+
+  return ((pCode *)pcad);
+}
+
 /*-----------------------------------------------------------------*/
 /* pCodeLabelDestruct - free memory used by a label.               */
 /*-----------------------------------------------------------------*/
@@ -3517,6 +3648,12 @@ static void genericDestruct(pCode *pc)
     regs *reg = pic16_getRegFromInstruction(pc);
     if(reg)
       deleteSetItem (&(reg->reglives.usedpCodes),pc);
+
+	if(PCI(pc)->is2MemOp) {
+		reg = pic16_getRegFromInstruction2(pc);
+		if(reg)
+			deleteSetItem(&(reg->reglives.usedpCodes), pc);
+	}
   }
 
   /* Instead of deleting the memory used by this pCode, mark
@@ -3533,6 +3670,8 @@ static void genericDestruct(pCode *pc)
 
 }
 
+
+
 #if 0
 /*-----------------------------------------------------------------*/
 /*-----------------------------------------------------------------*/
@@ -3616,11 +3755,12 @@ char *pic16_get_op(pCodeOp *pcop,char *buffer, size_t size)
       s = buffer;
       //size = sizeof(buffer);
       if( PCOR(pcop)->instance) {
-	SAFE_snprintf(&s,&size,"(%s + %d)",
-		      pcop->name,
-		      PCOR(pcop)->instance );
+		SAFE_snprintf(&s,&size,"(%s + %d)",
+			pcop->name,
+			PCOR(pcop)->instance );
+	}
 	//fprintf(stderr,"PO_DIR %s\n",buffer);
-      } else
+       else
 	SAFE_snprintf(&s,&size,"%s",pcop->name);
       return buffer;
 
@@ -3640,6 +3780,111 @@ char *pic16_get_op(pCodeOp *pcop,char *buffer, size_t size)
 
 }
 
+
+/*-----------------------------------------------------------------*/
+/* pic16_get_op2 - variant to support two memory operand commands  */
+/*-----------------------------------------------------------------*/
+char *pic16_get_op2(pCodeOp *pcop,char *buffer, size_t size)
+{
+  regs *r;
+  static char b[50];
+  char *s;
+  int use_buffer = 1;    // copy the string to the passed buffer pointer
+
+  if(!buffer) {
+    buffer = b;
+    size = sizeof(b);
+    use_buffer = 0;     // Don't bother copying the string to the buffer.
+  } 
+
+#if 0
+	fprintf(stderr, "%s:%d second operand %s is %d\tPO_DIR(%d) PO_GPR_TEMP(%d) PO_IMMEDIATE(%d) PO_INDF0(%d) PO_FSR0(%d)\n",
+		__FUNCTION__, __LINE__, PCOR(PCOR2(pcop)->pcop2)->r->name, PCOR2(pcop)->pcop2->type,
+		PO_DIR, PO_GPR_TEMP, PO_IMMEDIATE, PO_INDF0, PO_FSR0);
+#endif
+
+  if(pcop) {
+    switch(PCOR2(pcop)->pcop2->type) {
+    case PO_INDF0:
+    case PO_FSR0:
+      if(use_buffer) {
+	SAFE_snprintf(&buffer,&size,"%s",PCOR(PCOR2(pcop)->pcop2)->r->name);
+	return buffer;
+      }
+      return PCOR(PCOR2(pcop)->pcop2)->r->name;
+      break;
+    case PO_GPR_TEMP:
+      r = pic16_regWithIdx(PCOR(PCOR2(pcop)->pcop2)->r->rIdx);
+
+      if(use_buffer) {
+	SAFE_snprintf(&buffer,&size,"%s",r->name);
+	return buffer;
+      }
+
+      return r->name;
+
+
+    case PO_IMMEDIATE:
+	break;
+#if 0
+      s = buffer;
+
+      if(PCOI(pcop)->_const) {
+
+	if( PCOI(pcop)->offset && PCOI(pcop)->offset<4) {
+	  SAFE_snprintf(&s,&size,"(((%s+%d) >> %d)&0xff)",
+			pcop->name,
+			PCOI(pcop)->index,
+			8 * PCOI(pcop)->offset );
+	} else
+	  SAFE_snprintf(&s,&size,"LOW(%s+%d)",pcop->name,PCOI(pcop)->index);
+      } else {
+      
+	if( PCOI(pcop)->index) { // && PCOI(pcc->pcop)->offset<4) {
+	  SAFE_snprintf(&s,&size,"(%s + %d)",
+			pcop->name,
+			PCOI(pcop)->index );
+	} else {
+	  if(PCOI(pcop)->offset)
+	    SAFE_snprintf(&s,&size,"(%s >> %d)&0xff",pcop->name, 8*PCOI(pcop)->offset);
+	  else
+	    SAFE_snprintf(&s,&size,"%s",pcop->name);
+	}
+      }
+
+      return buffer;
+#endif
+
+    case PO_DIR:
+      s = buffer;
+      //size = sizeof(buffer);
+      if( PCOR(PCOR2(pcop)->pcop2)->instance) {
+		SAFE_snprintf(&s,&size,"(%s + %d)",
+			PCOR(PCOR2(pcop)->pcop2)->r->name,
+			PCOR(PCOR2(pcop)->pcop2)->instance );
+	}
+	//fprintf(stderr,"PO_DIR %s\n",buffer);
+       else
+	SAFE_snprintf(&s,&size,"%s",PCOR(PCOR2(pcop)->pcop2)->r->name);
+      return buffer;
+
+    default:
+#if 0
+      if  (PCOR2(pcop)->r1->name) {
+	if(use_buffer) {
+	  SAFE_snprintf(&buffer,&size,"%s",PCOR2(pcop)->r1->name);
+	  return buffer;
+	}
+	return PCOR2(pcop)->r1->name;
+      }
+#endif
+    }
+  }
+
+  return "NO operand";
+
+}
+
 /*-----------------------------------------------------------------*/
 /*-----------------------------------------------------------------*/
 static char *pic16_get_op_from_instruction( pCodeInstruction *pcc)
@@ -3672,11 +3917,22 @@ static char *pCode2str(char *str, size_t size, pCode *pc)
   switch(pc->type) {
 
   case PC_OPCODE:
-
     SAFE_snprintf(&s,&size, "\t%s\t", PCI(pc)->mnemonic);
 
     if( (PCI(pc)->num_ops >= 1) && (PCI(pc)->pcop)) {
 
+#if 1
+	if(PCI(pc)->is2MemOp) {
+//		fprintf(stderr, "HELP !\n");
+#if 1
+		SAFE_snprintf(&s,&size, "%s,%s", 
+		pic16_get_op(PCOP(PCI(pc)->pcop), NULL, 0),
+		pic16_get_op2(PCOP(PCI(pc)->pcop), NULL, 0));
+		break;
+#endif
+	}
+#endif
+
       if(PCI(pc)->isBitInst) {
 	if(PCI(pc)->pcop->type == PO_GPR_BIT) {
 	  if( (((pCodeOpRegBit *)(PCI(pc)->pcop))->inBitSpace) )
@@ -3735,6 +3991,9 @@ static char *pCode2str(char *str, size_t size, pCode *pc)
   case PC_CSOURCE:
     SAFE_snprintf(&s,&size,";#CSRC\t%s %d\n; %s\n", PCCS(pc)->file_name, PCCS(pc)->line_number, PCCS(pc)->line);
     break;
+  case PC_ASMDIR:
+  	SAFE_snprintf(&s,&size,"\t%s\t%s\n", PCAD(pc)->directive, PCAD(pc)->arg?PCAD(pc)->arg:"");
+  	break;
 
   case PC_BAD:
     SAFE_snprintf(&s,&size,";A bad pCode is being used\n");
@@ -3785,11 +4044,14 @@ static void genericPrint(FILE *of, pCode *pc)
 
       /* Debug */
       if(pic16_debug_verbose) {
-	fprintf(of, "\t;key=%03x",pc->seq);
+	fprintf(of, "\t;key=%03x %d",pc->seq, __LINE__);
 	if(PCI(pc)->pcflow)
 	  fprintf(of,",flow seq=%03x",PCI(pc)->pcflow->pc.seq);
       }
     }
+    fprintf(of, "\n");
+    break;
+      
 #if 0
     {
       pBranch *dpb = pc->to;   // debug
@@ -3815,8 +4077,8 @@ static void genericPrint(FILE *of, pCode *pc)
       }
     }
 #endif
-    fprintf(of,"\n");
-    break;
+//    fprintf(of,"\n");		// these are moved prior to #if 0
+//    break;
 
   case PC_WILD:
     fprintf(of,";\tWild opcode: id=%d\n",PCW(pc)->id);
@@ -3842,6 +4104,10 @@ static void genericPrint(FILE *of, pCode *pc)
   case PC_CSOURCE:
     fprintf(of,";#CSRC\t%s %d\n;  %s\n", PCCS(pc)->file_name, PCCS(pc)->line_number, PCCS(pc)->line);
     break;
+  case PC_ASMDIR:
+  	fprintf(of, "\t%s\t%s\n", PCAD(pc)->directive, PCAD(pc)->arg?PCAD(pc)->arg:"");
+  	break;
+  	
   case PC_LABEL:
   default:
     fprintf(of,"unknown pCode type %d\n",pc->type);
@@ -4349,6 +4615,73 @@ regs * pic16_getRegFromInstruction(pCode *pc)
 
 }
 
+/*-------------------------------------------------------------------------------*/
+/* pic16_getRegFromInstruction2 - variant to support two memory operand commands */
+/*-------------------------------------------------------------------------------*/
+regs * pic16_getRegFromInstruction2(pCode *pc)
+{
+
+  if(!pc                   || 
+     !isPCI(pc)            ||
+     !PCI(pc)->pcop        ||
+     PCI(pc)->num_ops == 0 ||
+     (PCI(pc)->num_ops == 1))		// accept only 2 operand commands
+    return NULL;
+
+
+/*
+ * operands supported in MOVFF:
+ *  PO_INF0/PO_FSR0
+ *  PO_GPR_TEMP
+ *  PO_IMMEDIATE
+ *  PO_DIR
+ *
+ */
+  switch(PCI(pc)->pcop->type) {
+  case PO_INDF0:
+  case PO_FSR0:
+    return PCOR(PCOR2(PCI(pc)->pcop)->pcop2)->r;
+
+    //    return typeRegWithIdx (PCOR(PCI(pc)->pcop)->rIdx, REG_SFR, 0);
+
+//  case PO_BIT:
+  case PO_GPR_TEMP:
+    //fprintf(stderr, "pic16_getRegFromInstruction - bit or temp\n");
+    return PCOR(PCOR2(PCI(pc)->pcop)->pcop2)->r;
+
+  case PO_IMMEDIATE:
+	break;
+#if 0
+    if(PCOI(PCI(pc)->pcop)->r)
+      return (PCOI(PCI(pc)->pcop)->r);
+
+    //fprintf(stderr, "pic16_getRegFromInstruction - immediate\n");
+    return pic16_dirregWithName(PCI(pc)->pcop->name);
+    //return NULL; // PCOR(PCI(pc)->pcop)->r;
+#endif
+
+  case PO_GPR_BIT:
+	break;
+//    return PCOR2(PCI(pc)->pcop)->r;
+
+  case PO_DIR:
+    //fprintf(stderr, "pic16_getRegFromInstruction - dir\n");
+    return PCOR(PCOR2(PCI(pc)->pcop)->pcop2)->r;
+
+  case PO_LITERAL:
+	break;
+    //fprintf(stderr, "pic16_getRegFromInstruction - literal\n");
+
+  default:
+    //fprintf(stderr, "pic16_getRegFromInstruction - unknown reg type %d\n",PCI(pc)->pcop->type);
+    //genericPrint(stderr, pc);
+    break;
+  }
+
+  return NULL;
+
+}
+
 /*-----------------------------------------------------------------*/
 /*-----------------------------------------------------------------*/
 
@@ -4907,15 +5240,43 @@ static void BanksUsedFlow(pBlock *pb)
 
 
 /*-----------------------------------------------------------------*/
+/* insertBankSwitch - inserts a bank switch statement in the assembly listing */
 /*-----------------------------------------------------------------*/
 static void insertBankSwitch(int position, pCode *pc, int bsr)
 {
   pCode *new_pc;
+  regs *reg;
 
   if(!pc)
     return;
 
-  new_pc = pic16_newpCode(POC_MOVLB, pic16_newpCodeOpLit(bsr));
+
+/*
+ * if bsr == -1 then do not insert a MOVLB instruction, but rather
+ * insert a BANKSEL assembler directive for the symbol used by
+ * the pCode. This will allow the linker to setup the correct
+ * bank at linking time
+ */
+
+	if(!options_gen_banksel || bsr != -1) {
+		new_pc = pic16_newpCode(POC_MOVLB, pic16_newpCodeOpLit(bsr));
+	} else {
+		/* emit the BANKSEL [symbol] */
+
+		/* IMPORTANT: The following code does not check if a symbol is
+		 * split in multiple banks. This should be corrected. - VR 6/6/2003 */
+
+		reg = pic16_getRegFromInstruction(pc);
+		if(!reg)return;
+		new_pc = pic16_newpCodeAsmDir("BANKSEL", "%s", reg->name);
+		
+		position = 0;		// position is always before (sanity check!)
+	}
+
+#if 0
+	fprintf(stderr, "%s:%d: inserting bank switch\tbank = %d\n", __FUNCTION__, __LINE__, bsr);
+	pc->print(stderr, pc);
+#endif
 
   if(position) {
     /* insert the bank switch after this pc instruction */
@@ -4956,9 +5317,10 @@ static void FixRegisterBankingInFlow(pCodeFlow *pcfl, int cur_bank)
   while(pic16_isPCinFlow(pc,PCODE(pcfl))) {
 
     reg = pic16_getRegFromInstruction(pc);
-#if 0
+
+#if 1
     if(reg) {
-      fprintf(stderr, "  %s  ",reg->name);
+      fprintf(stderr, "%s:%d  %s  ",__FUNCTION__, __LINE__, reg->name);
       fprintf(stderr, "addr = 0x%03x, bank = %d\n",reg->address,REG_BANK(reg));
 
     }
@@ -4972,7 +5334,7 @@ static void FixRegisterBankingInFlow(pCodeFlow *pcfl, int cur_bank)
        * not a skip type instruction */
       pcprev = findPrevpCode(pc->prev, PC_OPCODE);
 
-      if(!pcprev || (pcprev && !isPCI_SKIP(pcprev))) {
+      if(!pcprev || (pcprev && !isPCI_SKIP(pcprev) /* && !isBankInstruction(pcprev)*/)) {
 	int reg_bank;
 
 	reg_bank =  (reg) ? REG_BANK(reg) : 0;
@@ -5079,7 +5441,7 @@ static void FixBankFlow(pBlock *pb)
     entry and exit.
   */
 
-  //fprintf(stderr, "FixBankFlow - Phase 1\n");
+//	fprintf(stderr, "FixBankFlow - Phase 1\n");
 
   for( pcflow = pic16_findNextpCode(pb->pcHead, PC_FLOW); 
        pcflow != NULL;
@@ -5103,7 +5465,7 @@ static void FixBankFlow(pBlock *pb)
     }
   }
 
-  //fprintf(stderr, "FixBankFlow - Phase 2\n");
+//	fprintf(stderr, "FixBankFlow - Phase 2\n");
 
   for( pcflow = pic16_findNextpCode(pb->pcHead, PC_FLOW); 
        pcflow != NULL;
@@ -5565,7 +5927,7 @@ int InstructionRegBank(pCode *pc)
 
 /*-----------------------------------------------------------------*/
 /*-----------------------------------------------------------------*/
-static void FixRegisterBanking(pBlock *pb)
+static void pic16_FixRegisterBanking(pBlock *pb)
 {
   pCode *pc=NULL;
   pCode *pcprev=NULL;
@@ -5582,7 +5944,8 @@ static void FixRegisterBanking(pBlock *pb)
     return;
   /* loop through all of the flow blocks with in one pblock */
 
-  //fprintf(stderr,"Register banking\n");
+//	fprintf(stderr,"%s:%d: Register banking\n", __FUNCTION__, __LINE__);
+
   cur_bank = 0;
   do {
     /* at this point, pc should point to a PC_FLOW object */
@@ -5592,37 +5955,42 @@ static void FixRegisterBanking(pBlock *pb)
        requirements */
 
     //    do {
-      if(isPCI(pc)) {
-	//genericPrint(stderr, pc);
+      if(isPCI(pc) && !PCI(pc)->is2MemOp) {
+//		genericPrint(stderr, pc);
 
 	reg = pic16_getRegFromInstruction(pc);
 #if 0
 	if(reg) {
-	  fprintf(stderr, "  %s  ",reg->name);
-	  fprintf(stderr, "addr = 0x%03x, bank = %d, bit=%d\n",
-		  reg->address,REG_BANK(reg),reg->isBitField);
+	  fprintf(stderr, "%s:%d:  %s  %d\n",__FUNCTION__, __LINE__, reg->name, reg->rIdx);
+	  fprintf(stderr, "addr = 0x%03x, bank = %d, bit=%d\tmapped = %d sfr=%d fix=%d\n",
+		  reg->address,REG_BANK(reg),reg->isBitField, reg->isMapped,
+		  	pic16_finalMapping[ reg->rIdx ].isSFR, reg->isFixed);
 
 	}
 #endif
 
-	if( ( (reg && !isACCESS_BANK(reg) && REG_BANK(reg)!=cur_bank) || 
-	      ((PCI(pc)->op == POC_CALL) && (cur_bank != 0) ) ) &&
-	    (!isPCI_LIT(pc)) ){
+	/* the !(reg->rIdx==-1) is a temporary hack. It should be changed - VR 6-Jun-2003 */
+	if( ( (reg && !(reg->rIdx==-1) && !isACCESS_BANK(reg) /*&& REG_BANK(reg)!=cur_bank*/ && !isBankInstruction(pc)) || 
+	      ((PCI(pc)->op != POC_CALL) /*&& (cur_bank != 0)*/ ) ) &&
+	    (!isPCI_LIT(pc)) ) {
 
 
 	  /* Examine the instruction before this one to make sure it is
 	   * not a skip type instruction */
 	  pcprev = findPrevpCode(pc->prev, PC_OPCODE);
 
-	  if(!pcprev || (pcprev && !isPCI_SKIP(pcprev))) {
+	  if(!pcprev || (pcprev && !isPCI_SKIP(pcprev) /*&& !isBankInstruction(pcprev)*/)) {
 	    int reg_bank;
 
-	    reg_bank =  (reg) ? REG_BANK(reg) : 0;
-	  
-            if (cur_bank != reg_bank) {
-	      cur_bank = reg_bank;
-	      insertBankSwitch(0, pc, cur_bank);
-	    }
+		reg_bank =  (reg) ? REG_BANK(reg) : 0;
+
+//		fprintf(stderr, "%s:%d add bank = %d\n", __FUNCTION__, __LINE__, reg_bank);
+//		pc->print(stderr, pc);
+
+//		if (cur_bank != reg_bank) {
+			cur_bank = reg_bank;
+			insertBankSwitch(0, pc, (options_gen_banksel)?-1:cur_bank);	//cur_bank);
+//		}
 
 	  }else {
 	    //fprintf(stderr, "Bummer can't switch banks\n");
@@ -5798,8 +6166,10 @@ static void AnalyzeFlow(int level)
    * and register banking is fixed.
    */
 
-  //for(pb = the_pFile->pbHead; pb; pb = pb->next)
-  //FixRegisterBanking(pb);
+#if 0
+	for(pb = the_pFile->pbHead; pb; pb = pb->next)
+		pic16_FixRegisterBanking(pb);
+#endif
 
   /* Phase 2 - Flow Analysis
    *
@@ -5911,8 +6281,9 @@ void pic16_AnalyzeBanking(void)
 
   for(pb = the_pFile->pbHead; pb; pb = pb->next)
     BanksUsedFlow(pb);
+
   for(pb = the_pFile->pbHead; pb; pb = pb->next)
-    FixRegisterBanking(pb);
+    pic16_FixRegisterBanking(pb);
 
 }
 
@@ -6112,7 +6483,9 @@ static void MarkUsedRegisters(set *regset)
   regs *r1,*r2;
 
   for(r1=setFirstItem(regset); r1; r1=setNextItem(regset)) {
+//	fprintf(stderr, "marking register = %s\t", r1->name);
     r2 = pic16_regWithIdx(r1->rIdx);
+//	fprintf(stderr, "to register = %s\n", r2->name);
     r2->isFree = 0;
     r2->wasUsed = 1;
   }
diff --git a/src/pic16/pcode.h b/src/pic16/pcode.h
index c8c24529..54f76e14 100644
--- a/src/pic16/pcode.h
+++ b/src/pic16/pcode.h
@@ -264,7 +264,7 @@ typedef enum
   POC_SUBFWB_D1,
   POC_SWAPF,
   POC_SWAPFW,
-  POC_TRIS, // To be removed
+  POC_TRIS , // To be removed
   POC_TSTFSZ,
   POC_XORLW,
   POC_XORWF,
@@ -287,6 +287,7 @@ typedef enum
   PC_WILD,        /* wildcard - an opcode place holder used 
 		   * in the pCode peep hole optimizer */
   PC_CSOURCE,     /* C-Source Line  */
+  PC_ASMDIR,	  /* Assembler directive */
   PC_BAD          /* Mark the pCode object as being bad */
 } PC_TYPE;
 
@@ -343,6 +344,7 @@ typedef struct pCodeOp
   char *name;
   
 } pCodeOp;
+
 #if 0
 typedef struct pCodeOpBit
 {
@@ -385,6 +387,22 @@ typedef struct pCodeOpReg
   struct pBlock *pb;
 } pCodeOpReg;
 
+typedef struct pCodeOpReg2
+{
+  pCodeOp pcop;		// used by default to all references
+  int rIdx;
+  struct regs *r;
+  int instance;		// assume same instance for both operands
+  struct pBlock *pb;
+
+  pCodeOp *pcop2;	// second memory operand
+/*
+  int rIdx1;
+  struct regs *r1;
+*/
+  
+} pCodeOpReg2;
+
 typedef struct pCodeOpRegBit
 {
   pCodeOpReg  pcor;       // The Register containing this bit
@@ -456,8 +474,9 @@ typedef struct pCodeComment
 
 } pCodeComment;
 
+
 /*************************************************
-    pCodeComment
+    pCodeCSource
 **************************************************/
 
 typedef struct pCodeCSource
@@ -472,6 +491,19 @@ typedef struct pCodeCSource
 } pCodeCSource;
 
 
+/*************************************************
+    pCodeAsmDir
+**************************************************/
+
+typedef struct pCodeAsmDir
+{
+  pCode pc;
+  
+  char *directive;
+  char *arg;
+} pCodeAsmDir;
+
+
 /*************************************************
     pCodeFlow
 
@@ -571,6 +603,7 @@ typedef struct pCodeInstruction
   unsigned int isLit:     1;   /* True if this instruction has an literal operand */
   unsigned int isAccess:   1;   /* True if this instruction has an access RAM operand */
   unsigned int isFastCall: 1;   /* True if this instruction has a fast call/return mode select operand */
+  unsigned int is2MemOp: 1;	/* True is second operand is a memory operand VR - support for MOVFF */
 
   PIC_OPCODE inverted_op;      /* Opcode of instruction that's the opposite of this one */
   unsigned int inCond;   // Input conditions for this instruction
@@ -790,6 +823,7 @@ typedef struct peepCommand {
 #define PCFLINK(x)((pCodeFlowLink *)(x))
 #define PCW(x)    ((pCodeWild *)(x))
 #define PCCS(x)   ((pCodeCSource *)(x))
+#define PCAD(x)	  ((pCodeAsmDir *)(x))
 
 #define PCOP(x)   ((pCodeOp *)(x))
 //#define PCOB(x)   ((pCodeOpBit *)(x))
@@ -797,6 +831,7 @@ typedef struct peepCommand {
 #define PCOI(x)   ((pCodeOpImmd *)(x))
 #define PCOLAB(x) ((pCodeOpLabel *)(x))
 #define PCOR(x)   ((pCodeOpReg *)(x))
+#define PCOR2(x)  ((pCodeOpReg2 *)(x))
 #define PCORB(x)  ((pCodeOpRegBit *)(x))
 #define PCOW(x)   ((pCodeOpWild *)(x))
 
@@ -818,6 +853,7 @@ typedef struct peepCommand {
 #define isPCL(x)        ((PCODE(x)->type == PC_LABEL))
 #define isPCW(x)        ((PCODE(x)->type == PC_WILD))
 #define isPCCS(x)       ((PCODE(x)->type == PC_CSOURCE))
+#define isASMDIR(x)	((PCODE(x)->type == PC_ASMDIR))
 
 #define isCALL(x)       ((isPCI(x)) && (PCI(x)->op == POC_CALL))
 #define isSTATUS_REG(r) ((r)->pc_type == PO_STATUS)
@@ -826,7 +862,13 @@ typedef struct peepCommand {
 #define isACCESS_LOW(r) ((pic16_finalMapping[REG_ADDR(r)].bank == \
                           PIC_BANK_FIRST) && (REG_ADDR(r) < 0x80))
 #define isACCESS_HI(r)  (pic16_finalMapping[REG_ADDR(r)].bank == PIC_BANK_LAST)
+
+/*
 #define isACCESS_BANK(r)(isACCESS_LOW(r) || isACCESS_HI(r))
+*/
+#define isACCESS_BANK(r)	(pic16_finalMapping[(r)->rIdx].isSFR \
+				|| (pic16_finalMapping[(r)->rIdx].reg && pic16_finalMapping[(r)->rIdx].reg->isFixed))
+
 
 #define isPCOLAB(x)     ((PCOP(x)->type) == PO_LABEL)
 
@@ -863,6 +905,7 @@ pCode * pic16_findNextInstruction(pCode *pci);
 pCode * pic16_findNextpCode(pCode *pc, PC_TYPE pct);
 int pic16_isPCinFlow(pCode *pc, pCode *pcflow);
 struct regs * pic16_getRegFromInstruction(pCode *pc);
+struct regs * pic16_getRegFromInstruction2(pCode *pc);
 
 extern void pic16_pcode_test(void);
 
diff --git a/src/pic16/pcoderegs.c b/src/pic16/pcoderegs.c
index 78f419bd..3bf620b3 100644
--- a/src/pic16/pcoderegs.c
+++ b/src/pic16/pcoderegs.c
@@ -168,11 +168,14 @@ static void pCodeRegMapLiveRangesInFlow(pCodeFlow *pcfl)
     reg = pic16_getRegFromInstruction(pc);
 
     if(reg) {
-/*
+
+#if 0
       fprintf(stderr, "flow seq %d, inst seq %d  %s  ",PCODE(pcfl)->seq,pc->seq,reg->name);
-      fprintf(stderr, "addr = 0x%03x, type = %d  rIdx=0x%03x\n",
-	      reg->address,reg->type,reg->rIdx);
-*/
+      fprintf(stderr, "addr = 0x%03x, type = %d  rIdx=0x%03x",
+      	      reg->address,reg->type,reg->rIdx);
+      fprintf(stderr, "command = %s\n", PCI(pc)->mnemonic);
+      	      
+#endif
 
       addSetIfnotP(& (PCFL(pcfl)->registers), reg);
 
@@ -181,8 +184,22 @@ static void pCodeRegMapLiveRangesInFlow(pCodeFlow *pcfl)
 
       if(PCC_REGISTER & PCI(pc)->outCond)
 	addSetIfnotP(& (reg->reglives.assignedpFlows), pcfl);
-
+	
       addSetIfnotP(& (reg->reglives.usedpCodes), pc);
+
+#if 1
+	/* check to see if this pCode has 2 memory operands,
+	   and set up the second operand too */
+	if(PCI(pc)->is2MemOp) {
+			reg = pic16_getRegFromInstruction2(pc);
+
+//			fprintf(stderr, "trying to get second operand from pCode reg= %s\n", reg->name);
+			addSetIfnotP(& (PCFL(pcfl)->registers), reg);
+			addSetIfnotP(& (reg->reglives.usedpCodes), pc);
+
+	}
+#endif
+
     }
 
 
@@ -244,10 +261,12 @@ static void Remove1pcode(pCode *pc, regs *reg)
     return;
 
   deleteSetItem (&(reg->reglives.usedpCodes),pc);
-/*
+
+#if 0
   fprintf(stderr,"removing instruction:\n");
   pc->print(stderr,pc);
-*/
+#endif
+
   if(PCI(pc)->label) {
     pcn = pic16_findNextInstruction(pc->next);
 
@@ -290,9 +309,9 @@ static void  RemoveRegsFromSet(set *regset)
 
     if(used <= 1) {
 
-      //fprintf(stderr," reg %s isfree=%d, wasused=%d\n",reg->name,reg->isFree,reg->wasUsed);
+//	fprintf(stderr," reg %s isfree=%d, wasused=%d\n",reg->name,reg->isFree,reg->wasUsed);
       if(used == 0) {
-	//fprintf(stderr," getting rid of reg %s\n",reg->name);
+//		fprintf(stderr,"%s:%d: getting rid of reg %s\n",__FILE__, __LINE__, reg->name);
 	reg->isFree = 1;
 	reg->wasUsed = 0;
       } else {
@@ -328,7 +347,7 @@ static void  RemoveRegsFromSet(set *regset)
 	    pc->print(stderr,pc);
 	    fprintf(stderr,"reg %s, type =%d\n",r->name, r->type);
 	  }
-	  //fprintf(stderr," removing reg %s because it is used only once\n",reg->name);
+//		fprintf(stderr,"%s:%d: removing reg %s because it is used only once\n",__FILE__, __LINE__, reg->name);
 	  Remove1pcode(pc, reg);
 	  /*
 	    pic16_unlinkpCode(pc);
@@ -650,6 +669,7 @@ static void OptimizeRegUsage(set *fregs, int optimize_multi_uses, int optimize_l
     pcfl_assigned = setFirstItem(reg->reglives.assignedpFlows);
 
     used = elementsInSet(reg->reglives.usedpCodes);
+//	fprintf(stderr, "%s:%d register %s used %d times in pCode\n", __FILE__, __LINE__, reg->name, used);
     if(used == 2) { 
 
       /*
diff --git a/src/pic16/ralloc.c b/src/pic16/ralloc.c
index 78ca883f..ca082ec7 100644
--- a/src/pic16/ralloc.c
+++ b/src/pic16/ralloc.c
@@ -584,6 +584,8 @@ pic16_dirregWithName (char *name)
 
   hkey = regname2key(name);
 
+//	fprintf(stderr, "%s:%d: name = %s\thash = %d\n", __FUNCTION__, __LINE__, name, hkey);
+
   reg = hTabFirstItemWK(dynDirectRegNames, hkey);
 
   while(reg) {
@@ -655,16 +657,17 @@ pic16_allocDirReg (operand *op )
   /* First, search the hash table to see if there is a register with this name */
   if (SPEC_ABSA ( OP_SYM_ETYPE(op)) && !(IS_BITVAR (OP_SYM_ETYPE(op))) ) {
     reg = regWithIdx (pic16_dynProcessorRegs, SPEC_ADDR ( OP_SYM_ETYPE(op)), 1);
-/*
+
+#if 0
     if(!reg) 
-      fprintf(stderr,"ralloc %s is at fixed address but not a processor reg, addr=0x%x\n",
-	      name, SPEC_ADDR ( OP_SYM_ETYPE(op)));
+      fprintf(stderr,"%s:%d: ralloc %s is at fixed address but not a processor reg, addr=0x%x\n",
+      		__FUNCTION__, __LINE__, name, SPEC_ADDR ( OP_SYM_ETYPE(op)));
     else
-      fprintf(stderr,"ralloc %s at fixed address has already been declared, addr=0x%x\n",
-	      name, SPEC_ADDR ( OP_SYM_ETYPE(op)));
-*/
+      fprintf(stderr,"%s:%d: ralloc %s at fixed address has already been declared, addr=0x%x\n",
+		__FUNCTION__, __LINE__, name, SPEC_ADDR ( OP_SYM_ETYPE(op)));
+#endif
   } else {
-    //fprintf(stderr,"ralloc:%d %s \n", __LINE__,name);
+//  	fprintf(stderr,"ralloc:%d %s \n", __LINE__,name);
     
     reg = pic16_dirregWithName(name);
   }
@@ -1087,14 +1090,17 @@ void pic16_writeUsedRegs(FILE *of)
   pic16_assignRelocatableRegisters(pic16_dynStackRegs,0);
   pic16_assignRelocatableRegisters(pic16_dynDirectRegs,0);
 
-  //pic16_dump_map();
+	//pic16_dump_map();
 
   pic16_dump_cblock(of);
+
+#if 0
   bitEQUs(of,pic16_dynDirectBitRegs);
   aliasEQUs(of,pic16_dynAllocRegs,0);
   aliasEQUs(of,pic16_dynDirectRegs,0);
   aliasEQUs(of,pic16_dynStackRegs,0);
   aliasEQUs(of,pic16_dynProcessorRegs,1);
+#endif
 
 }
 
diff --git a/src/pic16/ralloc.h b/src/pic16/ralloc.h
index cf91c043..6801ce37 100644
--- a/src/pic16/ralloc.h
+++ b/src/pic16/ralloc.h
@@ -2,9 +2,9 @@
 
   SDCCralloc.h - header file register allocation
 
-                Written By -  Sandeep Dutta . sandeep.dutta@usa.net (1998)
-		PIC port   - T. Scott Dattalo scott@dattalo.com (2000)
-		PIC16 port   - Martin Dubuc m.dubuc@rogers.com (2002)
+	Written By -  Sandeep Dutta . sandeep.dutta@usa.net (1998)
+	PIC port   - T. Scott Dattalo scott@dattalo.com (2000)
+	PIC16 port   - Martin Dubuc m.dubuc@rogers.com (2002)
 
    This program is free software; you can redistribute it and/or modify it
    under the terms of the GNU General Public License as published by the
-- 
2.47.2