From add3285b5de9f9a2d845e81c6d54d4553453eec7 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Lari=20Lehtom=C3=A4ki?= Date: Mon, 8 Sep 2014 18:49:11 +0300 Subject: [PATCH] Adds support for STM32F334 MCU --- src/stlink-common.c | 34 ++++++++++++++++++++++++++-------- src/stlink-common.h | 14 +++++++++++++- 2 files changed, 39 insertions(+), 9 deletions(-) diff --git a/src/stlink-common.c b/src/stlink-common.c index cd7979b..22f3655 100644 --- a/src/stlink-common.c +++ b/src/stlink-common.c @@ -1127,7 +1127,8 @@ int stlink_erase_flash_page(stlink_t *sl, stm32_addr_t flashaddr) } else if (sl->core_id == STM32VL_CORE_ID || sl->core_id == STM32F0_CORE_ID || sl->chip_id == STM32_CHIPID_F3 - || sl->chip_id == STM32_CHIPID_F37x) { + || sl->chip_id == STM32_CHIPID_F37x + || sl->chip_id == STM32_CHIPID_F334) { /* wait for ongoing op to finish */ wait_flash_busy(sl); @@ -1358,7 +1359,8 @@ int write_loader_to_sram(stlink_t *sl, stm32_addr_t* addr, size_t* size) { || sl->chip_id == STM32_CHIPID_L1_HIGH || sl->chip_id == STM32_CHIPID_L152_RE) { /* stm32l */ loader_code = loader_code_stm32l; loader_size = sizeof(loader_code_stm32l); - } else if (sl->core_id == STM32VL_CORE_ID || sl->chip_id == STM32_CHIPID_F3 || sl->chip_id == STM32_CHIPID_F37x) { + } else if (sl->core_id == STM32VL_CORE_ID || sl->chip_id == STM32_CHIPID_F3 || + sl->chip_id == STM32_CHIPID_F37x || sl->chip_id == STM32_CHIPID_F334) { loader_code = loader_code_stm32vl; loader_size = sizeof(loader_code_stm32vl); } else if (sl->chip_id == STM32_CHIPID_F2 || sl->chip_id == STM32_CHIPID_F4 || (sl->chip_id == STM32_CHIPID_F4_DE) || @@ -1540,8 +1542,12 @@ int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, uint32_t ILOG("Finished erasing %d pages of %d (%#x) bytes\n", page_count, sl->flash_pgsz, sl->flash_pgsz); - if ((sl->chip_id == STM32_CHIPID_F2) || (sl->chip_id == STM32_CHIPID_F4) || (sl->chip_id == STM32_CHIPID_F4_DE) || - (sl->chip_id == STM32_CHIPID_F4_LP) || (sl->chip_id == STM32_CHIPID_F4_HD) || (sl->chip_id == STM32_CHIPID_F411RE)) { + if ((sl->chip_id == STM32_CHIPID_F2) || + (sl->chip_id == STM32_CHIPID_F4) || + (sl->chip_id == STM32_CHIPID_F4_DE) || + (sl->chip_id == STM32_CHIPID_F4_LP) || + (sl->chip_id == STM32_CHIPID_F4_HD) || + (sl->chip_id == STM32_CHIPID_F411RE)) { /* todo: check write operation */ ILOG("Starting Flash write for F2/F4\n"); @@ -1655,8 +1661,12 @@ int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, uint32_t val = stlink_read_debug32(sl, flash_regs_base + FLASH_PECR_OFF) | (1 << 0) | (1 << 1) | (1 << 2); stlink_write_debug32(sl, flash_regs_base + FLASH_PECR_OFF, val); - } else if (sl->core_id == STM32VL_CORE_ID || sl->core_id == STM32F0_CORE_ID || sl->chip_id == STM32_CHIPID_F3 || sl->chip_id == STM32_CHIPID_F37x) { - ILOG("Starting Flash write for VL/F0 core id\n"); + } else if (sl->core_id == STM32VL_CORE_ID || + sl->core_id == STM32F0_CORE_ID || + sl->chip_id == STM32_CHIPID_F3 || + sl->chip_id == STM32_CHIPID_F334 || + sl->chip_id == STM32_CHIPID_F37x) { + ILOG("Starting Flash write for VL/F0/F3 core id\n"); /* flash loader initialization */ if (init_flash_loader(sl, &fl) == -1) { ELOG("init_flash_loader() == -1\n"); @@ -1759,7 +1769,11 @@ int run_flash_loader(stlink_t *sl, flash_loader_t* fl, stm32_addr_t target, cons stlink_write_reg(sl, count, 2); /* count (32 bits words) */ stlink_write_reg(sl, fl->loader_addr, 15); /* pc register */ - } else if (sl->core_id == STM32VL_CORE_ID || sl->core_id == STM32F0_CORE_ID || sl->chip_id == STM32_CHIPID_F3 || sl->chip_id == STM32_CHIPID_F37x) { + } else if (sl->core_id == STM32VL_CORE_ID || + sl->core_id == STM32F0_CORE_ID || + sl->chip_id == STM32_CHIPID_F3 || + sl->chip_id == STM32_CHIPID_F37x || + sl->chip_id == STM32_CHIPID_F334) { size_t count = size / sizeof(uint16_t); if (size % sizeof(uint16_t)) ++count; @@ -1818,7 +1832,11 @@ int run_flash_loader(stlink_t *sl, flash_loader_t* fl, stm32_addr_t target, cons return -1; } - } else if (sl->core_id == STM32VL_CORE_ID || sl->core_id == STM32F0_CORE_ID || sl->chip_id == STM32_CHIPID_F3 || sl->chip_id == STM32_CHIPID_F37x) { + } else if (sl->core_id == STM32VL_CORE_ID || + sl->core_id == STM32F0_CORE_ID || + sl->chip_id == STM32_CHIPID_F3 || + sl->chip_id == STM32_CHIPID_F37x || + sl->chip_id == STM32_CHIPID_F334) { stlink_read_reg(sl, 2, &rr); if (rr.r[2] != 0) { diff --git a/src/stlink-common.h b/src/stlink-common.h index 532f7d9..9f8b9cd 100644 --- a/src/stlink-common.h +++ b/src/stlink-common.h @@ -125,7 +125,7 @@ extern "C" { #define STM32_CHIPID_L1_HIGH 0x436 #define STM32_CHIPID_L152_RE 0x437 - +#define STM32_CHIPID_F334 0x438 #define STM32_CHIPID_F3_SMALL 0x439 #define STM32_CHIPID_F0 0x440 @@ -399,6 +399,18 @@ extern "C" { .bootrom_base = 0x1ff0000, .bootrom_size = 0x1000 }, + { + // STM32F334 + // RM0364 document was used to find these parameters + .chip_id = STM32_CHIPID_F334, + .description = "F334 device", + .flash_size_reg = 0x1ffff7cc, + .flash_pagesize = 0x800, + .sram_size = 0x3000, + .bootrom_base = 0x1fffd800, + .bootrom_size = 0x2000 + }, + }; -- 2.47.2