From ab3078bbb99996dff7f14d640d903339e8f2a9e0 Mon Sep 17 00:00:00 2001 From: jesusc Date: Tue, 2 Aug 2005 07:13:10 +0000 Subject: [PATCH] no message git-svn-id: https://sdcc.svn.sourceforge.net/svnroot/sdcc/trunk/sdcc@3819 4a8a32a2-be11-0410-ad9d-d568d2c75423 --- device/include/mcs51/8052.h | 2 +- device/include/mcs51/msm8xc154s.h | 1 - 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/device/include/mcs51/8052.h b/device/include/mcs51/8052.h index ddb505a3..9783d84b 100755 --- a/device/include/mcs51/8052.h +++ b/device/include/mcs51/8052.h @@ -46,7 +46,7 @@ __sfr __at (0xCD) TH2 ; __sbit __at (0xAD) ET2 ; /* Enable timer2 interrupt */ /* IP */ -__sbit __at 0xBD PT2 ; /* T2 interrupt priority bit */ +__sbit __at (0xBD) PT2 ; /* T2 interrupt priority bit */ /* T2CON bits */ __sbit __at (0xC8) T2CON_0 ; diff --git a/device/include/mcs51/msm8xc154s.h b/device/include/mcs51/msm8xc154s.h index 0cde0bb9..04ba1f25 100644 --- a/device/include/mcs51/msm8xc154s.h +++ b/device/include/mcs51/msm8xc154s.h @@ -44,7 +44,6 @@ __sbit __at (0xfd) SERR; /* Serial port reception flag */ __sbit __at (0xfe) T32; /* interconnect T0 and T1 to 32bit timer/counter */ /* Bits in IP (0xb8) */ -__sbit __at (0xbd) PT2; /* Interrupt priority bit for timer interrupt 2 */ __sbit __at (0xbf) PCT; /* Priority interrupt circuit control bit */ /* Bits in PCON (0x87) */ -- 2.47.2