From 8c3c8e255b4fb71b0d69cdb12f680ec26fe2eda1 Mon Sep 17 00:00:00 2001
From: maartenbrock <maartenbrock@4a8a32a2-be11-0410-ad9d-d568d2c75423>
Date: Thu, 10 Feb 2005 14:37:00 +0000
Subject: [PATCH] * support/regression/tests/bitvars.c, *
 support/regression/tests/bitwise.c, * support/regression/tests/rotate.c:
 "fixed" problems on Alpha

git-svn-id: https://sdcc.svn.sourceforge.net/svnroot/sdcc/trunk/sdcc@3676 4a8a32a2-be11-0410-ad9d-d568d2c75423
---
 ChangeLog                          |  6 ++++++
 support/regression/tests/bitvars.c |  8 +++++++-
 support/regression/tests/bitwise.c |  7 ++++++-
 support/regression/tests/rotate.c  | 25 +++++++++++++++----------
 4 files changed, 34 insertions(+), 12 deletions(-)

diff --git a/ChangeLog b/ChangeLog
index cb622841..7a5b3fa4 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,9 @@
+2005-02-10 Maarten Brock <sourceforge.brock AT dse.nl>
+
+	* support/regression/tests/bitvars.c,
+	* support/regression/tests/bitwise.c,
+	* support/regression/tests/rotate.c: "fixed" problems on Alpha
+
 2005-02-10 Raphael Neider <rneider AT web.de>
 
 	* src/pic16/pcode.c (assignToSameBank) : fixed cast to pointer of
diff --git a/support/regression/tests/bitvars.c b/support/regression/tests/bitvars.c
index fe48a04d..727c603e 100644
--- a/support/regression/tests/bitvars.c
+++ b/support/regression/tests/bitvars.c
@@ -14,6 +14,12 @@
 #define NO_BITS
 #endif
 
+#if defined __GNUC__
+  #if (__GNUC__ < 3)
+  //since this fails on GCC 2.95.4 on alpha and I don't know how to detect alpha...
+  #define NO_BITS
+#endif
+
 #ifndef NO_BITS
 
 #define TYPE_{type}
@@ -38,7 +44,7 @@ testBits(void)
 #ifndef NO_BITS
   bool x = 2;
   ASSERT (foo(x,3,4) == 6);
-  
+
   ASSERT (complement (~_0, 1));
   ASSERT (complement (~_1, 1));
 
diff --git a/support/regression/tests/bitwise.c b/support/regression/tests/bitwise.c
index 3805822f..6f489659 100644
--- a/support/regression/tests/bitwise.c
+++ b/support/regression/tests/bitwise.c
@@ -1,5 +1,5 @@
 /** Test the bitwise operators.
-    
+
     type: char, short, long
     attr: volatile,
     storage: static,
@@ -29,5 +29,10 @@ testTwoOpBitwise(void)
     ASSERT(({type})(left ^ 0xc1ec) == ({type})0xFC1B);
     ASSERT(({type})(0x3df7 ^ right) == ({type})0xFC1B);
 
+#if defined (__GNUC__) && (__GNUC__ < 3)
+    // long is 64 bits on GCC 2.95.4 on alpha and I don't know how to detect alpha...
+    ASSERT(({type})(~left) == ({type})0xFFFFFFFFFFFFC208);
+#else
     ASSERT(({type})(~left) == ({type})0xFFFFC208);
+#endif
 }
diff --git a/support/regression/tests/rotate.c b/support/regression/tests/rotate.c
index c1fae86b..9e83bc89 100644
--- a/support/regression/tests/rotate.c
+++ b/support/regression/tests/rotate.c
@@ -26,7 +26,12 @@
 #endif
 
 #if SIZE == 32
-#  define TYPE unsigned long
+// long is 64 bits on GCC 2.95.4 on alpha and I don't know how to detect alpha...
+#  if defined (__GNUC__) && (__GNUC__ < 3)
+#    define TYPE unsigned int
+#  else
+#    define TYPE unsigned long
+#  endif
 #  if MSB
 #    define TEST_VECT 0xa8c5a5c6
 #  else
@@ -43,7 +48,7 @@ TYPE rol5(TYPE s){ return (s<<5) | (s>>(SIZE-5)); }
 TYPE rol6(TYPE s){ return (s<<6) | (s>>(SIZE-6)); }
 TYPE rol7(TYPE s){ return (s<<7) | (s>>(SIZE-7)); }
 #endif
-                                              
+
 #if SIZE >=16 && !defined __ds390
 TYPE rol8 (TYPE s){ return (s<<8 ) | (s>>(SIZE-8 )); }
 TYPE rol9 (TYPE s){ return (s<<9 ) | (s>>(SIZE-9 )); }
@@ -72,9 +77,9 @@ testRol(void)
 {
     volatile TYPE t = TEST_VECT;
     TYPE u;
-    
+
     u = t;
-#if !defined __ds390    
+#if !defined __ds390
     ASSERT( rol1(u) == (TYPE)((TEST_VECT<<1) | (TEST_VECT>>(SIZE-1))) );
     ASSERT( rol2(u) == (TYPE)((TEST_VECT<<2) | (TEST_VECT>>(SIZE-2))) );
     ASSERT( rol3(u) == (TYPE)((TEST_VECT<<3) | (TEST_VECT>>(SIZE-3))) );
@@ -82,9 +87,9 @@ testRol(void)
     ASSERT( rol5(u) == (TYPE)((TEST_VECT<<5) | (TEST_VECT>>(SIZE-5))) );
     ASSERT( rol6(u) == (TYPE)((TEST_VECT<<6) | (TEST_VECT>>(SIZE-6))) );
     ASSERT( rol7(u) == (TYPE)((TEST_VECT<<7) | (TEST_VECT>>(SIZE-7))) );
-#endif    
-    
-#if SIZE >=16 && !defined __ds390 
+#endif
+
+#if SIZE >=16 && !defined __ds390
     ASSERT( rol8 (u) == (TYPE)((TEST_VECT<<8 ) | (TEST_VECT>>(SIZE-8 ))) );
     ASSERT( rol9 (u) == (TYPE)((TEST_VECT<<9 ) | (TEST_VECT>>(SIZE-9 ))) );
     ASSERT( rol10(u) == (TYPE)((TEST_VECT<<10) | (TEST_VECT>>(SIZE-10))) );
@@ -97,12 +102,12 @@ testRol(void)
 
 #if SIZE >=32
     ASSERT( rol16(u) == (TYPE)((TEST_VECT<<16) | (TEST_VECT>>(SIZE-16))) );
-    ASSERT( rol17(u) == (TYPE)((TEST_VECT<<17) | (TEST_VECT>>(SIZE-17))) );    
-    
+    ASSERT( rol17(u) == (TYPE)((TEST_VECT<<17) | (TEST_VECT>>(SIZE-17))) );
+
     ASSERT( rol23(u) == (TYPE)((TEST_VECT<<23) | (TEST_VECT>>(SIZE-23))) );
     ASSERT( rol24(u) == (TYPE)((TEST_VECT<<24) | (TEST_VECT>>(SIZE-24))) );
     ASSERT( rol25(u) == (TYPE)((TEST_VECT<<25) | (TEST_VECT>>(SIZE-25))) );
-    
+
     ASSERT( rol30(u) == (TYPE)((TEST_VECT<<30) | (TEST_VECT>>(SIZE-30))) );
     ASSERT( rol31(u) == (TYPE)((TEST_VECT<<31) | (TEST_VECT>>(SIZE-31))) );
 #endif
-- 
2.30.2