From 81142f760ed8feb6634a7bc8ef3d5e3c14368c82 Mon Sep 17 00:00:00 2001
From: epetrich <epetrich@4a8a32a2-be11-0410-ad9d-d568d2c75423>
Date: Thu, 18 Mar 2004 15:19:30 +0000
Subject: [PATCH] * doc/sdccman.lyx, * device/lib/mcs51/crtpagesfr.asm, *
 device/lib/mcs51/crtxinit.asm, * device/lib/mcs51/crtxstack.asm: Changed name
 of _PAGESFR to _XPAGE to avoid confusion with Si Lab's SFRPAGE register.

git-svn-id: https://sdcc.svn.sourceforge.net/svnroot/sdcc/trunk/sdcc@3268 4a8a32a2-be11-0410-ad9d-d568d2c75423
---
 ChangeLog                       |  9 +++++++++
 device/lib/mcs51/crtpagesfr.asm |  2 +-
 device/lib/mcs51/crtxinit.asm   |  8 +++++---
 device/lib/mcs51/crtxstack.asm  |  6 +++---
 doc/sdccman.lyx                 | 10 +++++-----
 5 files changed, 23 insertions(+), 12 deletions(-)

diff --git a/ChangeLog b/ChangeLog
index 89eb7ed3..5b20d32a 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,12 @@
+2004-03-18 Erik Petrich <epetrich AT ivorytower.norman.ok.us>
+
+	* doc/sdccman.lyx,
+	* device/lib/mcs51/crtpagesfr.asm,
+	* device/lib/mcs51/crtxinit.asm,
+	* device/lib/mcs51/crtxstack.asm: Changed name of _PAGESFR to _XPAGE
+	to avoid confusion with Si Lab's SFRPAGE register.
+
+
 2004-03-17 Erik Petrich <epetrich AT ivorytower.norman.ok.us>
 
 	* src/SDCCglue.c (emitMaps): allow public sfr variables
diff --git a/device/lib/mcs51/crtpagesfr.asm b/device/lib/mcs51/crtpagesfr.asm
index ae799a54..dd3ba08e 100644
--- a/device/lib/mcs51/crtpagesfr.asm
+++ b/device/lib/mcs51/crtpagesfr.asm
@@ -21,4 +21,4 @@
 ;    what you give them.   Help stamp out software-hoarding!  
 ; -------------------------------------------------------------------------*/
 
-__PAGESFR == 0xa0	; 0xa0 is P2 on the original 8051
+__XPAGE == 0xa0	; 0xa0 is P2 on the original 8051
diff --git a/device/lib/mcs51/crtxinit.asm b/device/lib/mcs51/crtxinit.asm
index b1e2f2fe..84126fa7 100644
--- a/device/lib/mcs51/crtxinit.asm
+++ b/device/lib/mcs51/crtxinit.asm
@@ -30,6 +30,8 @@
 	.area GSINIT5 (CODE)
 	.area GSINIT  (CODE)
 	.area GSFINAL (CODE)
+
+	.globl __XPAGE
 	
 	.area GSINIT3 (CODE)
   
@@ -41,16 +43,16 @@ __mcs51_genXINIT::
 	mov	r2,#((l_XINIT+255) >> 8)
 	mov	dptr,#s_XINIT
 	mov	r0,#s_XISEG
-	mov	__PAGESFR,#(s_XISEG >> 8)
+	mov	__XPAGE,#(s_XISEG >> 8)
 00001$:	clr	a
 	movc	a,@a+dptr
 	movx	@r0,a
 	inc	dptr
 	inc	r0
 	cjne	r0,#0,00002$
-	inc	__PAGESFR
+	inc	__XPAGE
 00002$:	djnz	r1,00001$
 	djnz	r2,00001$
-	mov	__PAGESFR,#0xFF
+	mov	__XPAGE,#0xFF
 00003$:
  
\ No newline at end of file
diff --git a/device/lib/mcs51/crtxstack.asm b/device/lib/mcs51/crtxstack.asm
index 83790f7a..38e6d135 100644
--- a/device/lib/mcs51/crtxstack.asm
+++ b/device/lib/mcs51/crtxstack.asm
@@ -32,7 +32,7 @@
 	.area GSFINAL (CODE)
 
 	.globl __start__xstack
-	.globl __PAGESFR
+	.globl __XPAGE
 
 	.area GSINIT1 (CODE)
 
@@ -41,7 +41,7 @@ __sdcc_init_xstack::
 ; Need to initialize in GSINIT1 in case the user's __sdcc_external_startup
 ; uses the xstack.
 	
-	mov	__PAGESFR,#(__start__xstack >> 8)
+	mov	__XPAGE,#(__start__xstack >> 8)
 	mov	_spx,#__start__xstack
 
 	.area GSINIT5 (CODE)
@@ -49,5 +49,5 @@ __sdcc_init_xstack::
 ; Need to initialize in GSINIT5 because __mcs51_genXINIT modifies __PAGESFR
 ; and __mcs51_genRAMCLEAR modifies _spx.
 	
-	mov	__PAGESFR,#(__start__xstack >> 8)
+	mov	__XPAGE,#(__start__xstack >> 8)
 	mov	_spx,#__start__xstack
diff --git a/doc/sdccman.lyx b/doc/sdccman.lyx
index 21b011f5..6a0af25e 100644
--- a/doc/sdccman.lyx
+++ b/doc/sdccman.lyx
@@ -14275,24 +14275,24 @@ sfr
  is where the chip designers decided to put it.
  Needless to say that they didn't agree on a common name either.
  So that the startup code can correctly initialize xdata variables, you
- should define an sfr with the name _PAGESFR at the appropriate location
- if the default, port P2, is not used for this.
+ should define an sfr with the name _XPAGE at the appropriate location if
+ the default, port P2, is not used for this.
  Some examples are:
 \layout Verse
 
 
 \family typewriter 
-sfr at 0x92 _PAGESFR; /* Cypress EZ-USB family */
+sfr at 0x92 _XPAGE; /* Cypress EZ-USB family */
 \layout Verse
 
 
 \family typewriter 
-sfr at 0xaf _PAGESFR; /* some Silicon Labs (Cygnal) chips */
+sfr at 0xaf _XPAGE; /* some Silicon Labs (Cygnal) chips */
 \layout Verse
 
 
 \family typewriter 
-sfr at 0xaa _PAGESFR; /* some Silicon Labs (Cygnal) chips */
+sfr at 0xaa _XPAGE; /* some Silicon Labs (Cygnal) chips */
 \layout Standard
 
 For more exotic implementations further customizations may be needed.
-- 
2.30.2