From 67ef4a56378ca7fe6415a0612c39d63d030f9a41 Mon Sep 17 00:00:00 2001 From: kbongers Date: Fri, 1 Feb 2002 05:37:46 +0000 Subject: [PATCH] *** empty log message *** git-svn-id: https://sdcc.svn.sourceforge.net/svnroot/sdcc/trunk/sdcc@1886 4a8a32a2-be11-0410-ad9d-d568d2c75423 --- sim/ucsim/xa.src/glob.cc | 16 ++++-- sim/ucsim/xa.src/glob.h | 14 +++-- sim/ucsim/xa.src/inst.cc | 108 ++++++++++++++++++++++++++++++++++++-- sim/ucsim/xa.src/regsxa.h | 9 ++-- sim/ucsim/xa.src/xa.cc | 41 +++++++++++++-- 5 files changed, 169 insertions(+), 19 deletions(-) diff --git a/sim/ucsim/xa.src/glob.cc b/sim/ucsim/xa.src/glob.cc index 685cc272..517f644b 100644 --- a/sim/ucsim/xa.src/glob.cc +++ b/sim/ucsim/xa.src/glob.cc @@ -1,12 +1,12 @@ /* * Simulator of microcontrollers (glob.cc) * - * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. - * - * Written by Karl Bongers karl@turbobit.com + * Copyright (C) 1999,2002 Drotos Daniel, Talker Bt. * * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu - * + * Other contributors include: + * Karl Bongers karl@turbobit.com, + * Johan Knol */ /* This file is part of microcontroller simulator: ucsim. @@ -226,7 +226,13 @@ struct xa_dis_entry disass_xa[]= { {0xc500,0xff00,' ',3,CALL, REL16 }, // CALL rel16 1 1 0 0 0 1 0 1 rel16 {0xc600,0xfff8,' ',2,CALL, IREG_ALONE }, // CALL [Rs] 1 1 0 0 0 1 1 0 0 0 0 0 0 s s s -/* CJNE(5), JNE */ + + {0xe200,0xf708,' ',4,CJNE, REG_DIRECT_REL8}, // CJNE Rd, direct, rel8 1 1 1 0 S 0 1 0 d d d d 0 x x x + {0xe300,0xff0f,' ',4,CJNE, REG_DATA8_REL8}, // CJNE Rd, data8, rel8 1 1 1 0 0 0 1 1 d d d d 0 0 0 0 + {0xeb00,0xff0f,' ',5,CJNE, REG_DATA16_REL8}, // CJNE Rd, data16, rel8 1 1 1 0 1 0 1 1 d d d d 0 0 0 0 + {0xe308,0xff8f,' ',4,CJNE, IREG_DATA8_REL8}, // CJNE [Rd], data8, rel8 1 1 1 0 0 0 1 1 0 d d d 1 0 0 0 + {0xeb08,0xff8f,' ',5,CJNE, IREG_DATA16_REL8},// CJNE [Rd], data16, rel8 1 1 1 0 1 0 1 1 0 d d d 1 0 0 0 + {0x0800,0xfffc,' ',3,CLR, BIT_ALONE }, // CLR bit 0 0 0 0 1 0 0 0 0 0 0 0 0 0 b b {0x4100,0xf700,' ',2,CMP, REG_REG }, // CMP Rd, Rs 0 1 0 0 S 0 0 1 d d d d s s s s {0x4200,0xf708,' ',2,CMP, REG_IREG }, // CMP Rd, [Rs] 0 1 0 0 S 0 1 0 d d d d 0 s s s diff --git a/sim/ucsim/xa.src/glob.h b/sim/ucsim/xa.src/glob.h index 7a63c42c..49bb834c 100644 --- a/sim/ucsim/xa.src/glob.h +++ b/sim/ucsim/xa.src/glob.h @@ -3,9 +3,10 @@ * * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. * - * Written by Karl Bongers karl@turbobit.com - * * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * Other contributors include: + * Karl Bongers karl@turbobit.com, + * Johan Knol * */ @@ -165,7 +166,14 @@ enum op_operands { DIRECT_REL8, REL8, - REL16 + REL16, + + REG_DIRECT_REL8, + REG_DATA8_REL8, + REG_DATA16_REL8, + IREG_DATA8_REL8, + IREG_DATA16_REL8 + }; // table of dissassembled instructions diff --git a/sim/ucsim/xa.src/inst.cc b/sim/ucsim/xa.src/inst.cc index e5385835..183deef7 100644 --- a/sim/ucsim/xa.src/inst.cc +++ b/sim/ucsim/xa.src/inst.cc @@ -1,11 +1,12 @@ /* * Simulator of microcontrollers (inst.cc) * - * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * Copyright (C) 1999,2002 Drotos Daniel, Talker Bt. * - * Written by Karl Bongers karl@turbobit.com - * * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * Other contributors include: + * Karl Bongers karl@turbobit.com, + * Johan Knol * */ @@ -453,6 +454,10 @@ cl_xa::inst_Bcc(uint code, int operands) int cl_xa::inst_JB(uint code, int operands) { + short saddr = (fetch1() * 2); + if (get_psw() & BIT_Z) { + PC += saddr; + } return(resGO); } int @@ -463,16 +468,112 @@ cl_xa::inst_JNB(uint code, int operands) int cl_xa::inst_CJNE(uint code, int operands) { + switch(operands) { + case REG_DIRECT_REL8: + { + // update C,N,Z + if (code & 0x800) { // word op + int result; + int src = get_word_direct( ((code & 0x7)<<4) | fetch1()); + int addr = (fetch1() * 2); + int dst = reg2(RI_F0); + unsigned char flags; + flags = get_psw(); + flags &= ~BIT_ALL; /* clear these bits */ + result = dst - src; + if (result == 0) flags |= BIT_Z; + if (result > 0xffff) flags |= BIT_C; + if (dst < src) flags |= BIT_N; + set_psw(flags); + if (flags & BIT_Z) + PC += addr; + } else { + int result; + int src = get_byte_direct( ((code & 0x7)<<4) | fetch1()); + int addr = (fetch1() * 2); + int dst = reg1(RI_F0); + unsigned char flags; + flags = get_psw(); + flags &= ~BIT_ALL; /* clear these bits */ + result = dst - src; + if (result == 0) flags |= BIT_Z; + if (result > 0xff) flags |= BIT_C; + if (dst < src) flags |= BIT_N; + set_psw(flags); + if (flags & BIT_Z) + PC += addr; + } + } + break; + + case DIRECT_REL8: + { + int daddr = ((code & 0x7) << 8) | fetch(); + int addr = fetch() * 2; + + if (code & 0x800) { // word op + unsigned short tmp = get_word_direct(daddr)-1; + set_word_direct(daddr, tmp); + if (tmp != 0) + PC += addr; + } else { + unsigned char tmp = get_word_direct(daddr)-1; + set_byte_direct(daddr, tmp); + if (tmp != 0) + PC += addr; + } + } + break; + } return(resGO); } int cl_xa::inst_DJNZ(uint code, int operands) { + switch(operands) { + case REG_REL8: + { + int addr = (fetch1() * 2); + if (code & 0x800) { // word op + unsigned short tmp = mov2(0, reg2(RI_F0)-1); + set_reg2(RI_F0, tmp); + if (tmp != 0) + PC += addr; + } else { + unsigned char tmp = mov1(0, reg1(RI_F0)-1); + set_reg1(RI_F0, tmp); + if (tmp != 0) + PC += addr; + } + } + break; + + case DIRECT_REL8: + { + int daddr = ((code & 0x7) << 8) | fetch(); + int addr = fetch() * 2; + + if (code & 0x800) { // word op + unsigned short tmp = get_word_direct(daddr)-1; + set_word_direct(daddr, tmp); + if (tmp != 0) + PC += addr; + } else { + unsigned char tmp = get_word_direct(daddr)-1; + set_byte_direct(daddr, tmp); + if (tmp != 0) + PC += addr; + } + } + break; + } + return(resGO); } int cl_xa::inst_JZ(uint code, int operands) { + /* reg1(8) = R4.b, is ACC for MCS51 compatiblility */ short saddr = (fetch1() * 2); if (reg1(8)==0) { PC += saddr; @@ -483,6 +584,7 @@ int cl_xa::inst_JNZ(uint code, int operands) { short saddr = (fetch1() * 2); + /* reg1(8) = R4.b, is ACC for MCS51 compatiblility */ if (reg1(8)!=0) { PC = (PC + saddr) & 0xfffffe; } diff --git a/sim/ucsim/xa.src/regsxa.h b/sim/ucsim/xa.src/regsxa.h index a5bb55fe..8644882d 100644 --- a/sim/ucsim/xa.src/regsxa.h +++ b/sim/ucsim/xa.src/regsxa.h @@ -1,11 +1,12 @@ /* * Simulator of microcontrollers (regsxa.h) * - * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * Copyright (C) 1999,2002 Drotos Daniel, Talker Bt. * - * Written by Karl Bongers karl@turbobit.com - * * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu + * Other contributors include: + * Karl Bongers karl@turbobit.com, + * Johan Knol * */ @@ -128,7 +129,7 @@ a: R5h,R5l 8: R4h,R4l below are the banked registers which mirror(B0..B3) depending on PSW.(RS0,RS1) -6: R3h,R3l +6: R3h,R3l  4: R2h,R2l 2: R1h,R1l 0: R0h,R0l diff --git a/sim/ucsim/xa.src/xa.cc b/sim/ucsim/xa.src/xa.cc index 578f0d2c..9e65740f 100644 --- a/sim/ucsim/xa.src/xa.cc +++ b/sim/ucsim/xa.src/xa.cc @@ -1,12 +1,12 @@ /* * Simulator of microcontrollers (xa.cc) * - * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. + * Copyright (C) 1999,2002 Drotos Daniel, Talker Bt. * - * Written by Karl Bongers karl@turbobit.com - * * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu - * + * Other contributors include: + * Karl Bongers karl@turbobit.com, + * Johan Knol */ /* This file is part of microcontroller simulator: ucsim. @@ -489,6 +489,39 @@ cl_xa::disass(t_addr addr, char *sep) strcpy(parm_str, "RLIST"); break; + case REG_DIRECT_REL8 : + sprintf(parm_str, "%s,0x%02x,0x%02x", + reg_strs[((code >> 4) & 0xf)], + ((code & 0x7) << 8) + get_mem(MEM_ROM, addr+immed_offset), + (get_mem(MEM_ROM, addr+immed_offset+1) * 2) & 0xfffe ); + break; + case REG_DATA8_REL8 : + sprintf(parm_str, "%s,#0x%04x,0x%02x", + reg_strs[((code >> 4) & 0xf)], + get_mem(MEM_ROM, addr+immed_offset), + (get_mem(MEM_ROM, addr+immed_offset+1) * 2) & 0xfffe ); + break; + case REG_DATA16_REL8 : + sprintf(parm_str, "%s,#0x%02x,0x%02x", + w_reg_strs[((code >> 4) & 0x7)*2], + get_mem(MEM_ROM, addr+immed_offset+1) + + (get_mem(MEM_ROM, addr+immed_offset+0)<<8), + (get_mem(MEM_ROM, addr+immed_offset+2) * 2) & 0xfffe ); + break; + case IREG_DATA8_REL8 : + sprintf(parm_str, "[%s],#0x%04x,0x%02x", + reg_strs[((code >> 4) & 0x7)], + get_mem(MEM_ROM, addr+immed_offset), + (get_mem(MEM_ROM, addr+immed_offset+1) * 2) & 0xfffe ); + break; + case IREG_DATA16_REL8 : + sprintf(parm_str, "[%s],#0x%02x,0x%02x", + w_reg_strs[((code >> 4) & 0x7)*2], + get_mem(MEM_ROM, addr+immed_offset+1) + + (get_mem(MEM_ROM, addr+immed_offset+0)<<8), + (get_mem(MEM_ROM, addr+immed_offset+2) * 2) & 0xfffe ); + break; + default: strcpy(parm_str, "???"); break; -- 2.30.2