From 308ae592147577da8f50d0442041527a96daed0d Mon Sep 17 00:00:00 2001
From: Keith Packard <keithp@keithp.com>
Date: Wed, 30 Dec 2015 21:16:36 -0800
Subject: [PATCH] Switch to new build system

This required switching all of the symbols to our stock names; they
were using things like resistor-1.sym instead of just resistor.sym.

Signed-off-by: Keith Packard <keithp@keithp.com>
---
 Makefile     |  66 ++++-----------------------
 telemini.sch | 126 +++++++++++++++++++++++++--------------------------
 2 files changed, 71 insertions(+), 121 deletions(-)

diff --git a/Makefile b/Makefile
index df1cc82..f6f50bf 100644
--- a/Makefile
+++ b/Makefile
@@ -1,63 +1,13 @@
+# name of project, also used for PCB file
 PROJECT=telemini
-AM=../altusmetrum
-SCHEME=$(AM)/scheme
 
-# intentionally want to rebuild drc and bom on every invocation
-all:	drc partslist partslist.csv pcb
+# list of schematic files that make up this design
+SCHEMATICS=telemini.sch
 
-drc:	telemini.sch Makefile
-	-gnetlist -g drc2 telemini.sch -o telemini.drc
+# number of PCB layers
+LAYERS=2
 
-partslist:	telemini.sch Makefile
-	gnetlist -g bom -o telemini.unsorted telemini.sch
-	head -n1 telemini.unsorted > partslist
-	tail -n+2 telemini.unsorted | sort >> partslist
-	rm -f telemini.unsorted
+# sides with silkscreen, can be none|top|bottom|both
+SILK=both
 
-partslist.csv:	telemini.sch Makefile
-	gnetlist -L $(SCHEME) -g partslistgag -o $(PROJECT).csvtmp $(PROJECT).sch
-	(head -n1 $(PROJECT).csvtmp; tail -n+2 $(PROJECT).csvtmp | sort -t \, -k 8) > $@ && rm -f $(PROJECT).csvtmp
-
-partslist.dk: $(PROJECT).sch Makefile $(SCHEME)/gnet-partslist-bom.scm
-	gnetlist -L $(SCHEME) -g partslist-bom -Ovendor=digikey -o $@ $(PROJECT).sch
-
-partslist.mouser: $(PROJECT).sch Makefile $(SCHEME)/gnet-partslist-bom.scm
-	gnetlist -L $(SCHEME) -g partslist-bom -Ovendor=mouser -o $@ $(PROJECT).sch
-
-pcb:	telemini.sch project Makefile
-	gsch2pcb project
-
-# note that 'gschlas -e foo.sch' will embed all symbols in the schematic, this
-# might be a really good idea for publishing designs to the web that others
-# might review?  Like this example from DJ:
-#
-#web :
-#        for i in channel.sch ethernet.sch power.sch mcu.sch; do \
-#          cp $$i tmp.sch ; \
-#          gschlas -e tmp.sch ; \
-#          mv tmp.sch ${WEB}/$$i; \
-#        done
-
-# this shoves local work out to the git.gag.com repository
-push:	
-	git push --mirror
-
-telemini.xy:	telemini.pcb
-	pcb -x bom telemini.pcb
-
-telemini.bottom.gbr:	telemini.pcb
-	pcb -x gerber telemini.pcb
-
-zip:	telemini.bottom.gbr telemini.bottommask.gbr telemini.fab.gbr telemini.top.gbr telemini.topmask.gbr telemini.toppaste.gbr telemini.plated-drill.cnc telemini.xy  Makefile # telemini.xls
-	zip telemini.zip telemini.*.gbr telemini.*.cnc telemini.xy # telemini.xls
-	zip -d telemini.zip telemini.topsilk.gbr
-
-clean:
-	rm -f *.bom *.drc *.log *~ telemini.ps *.gbr *.cnc *bak* *- *.zip 
-	rm -f *.net *.xy *.cmd *.png partslist partslist.csv
-	rm -f *.partslist *.new.pcb *.unsorted telemini.xls muffin-5267.pdf
-
-muffins: partslist.csv $(AM)/glabels/muffin-5267.glabels
-	glabels-3-batch $(AM)/glabels/muffin-5267.glabels \
-		-i partslist.csv -o muffin-5267.ps >/dev/null && \
-		ps2pdf muffin-5267.ps && rm muffin-5267.ps
+include ../altusmetrum/pcb.mk
diff --git a/telemini.sch b/telemini.sch
index effcf49..a638e43 100644
--- a/telemini.sch
+++ b/telemini.sch
@@ -23,9 +23,9 @@ FILE:
 T 43200 41100 5 10 0 0 0 0 1
 graphical=1
 ]
-C 44900 54500 1 0 0 gnd-1.sym
+C 44900 54500 1 0 0 gnd.sym
 N 40900 54800 47300 54800 4
-C 43400 54900 1 90 0 capacitor-1.sym
+C 43400 54900 1 90 0 capacitor.sym
 {
 T 42700 55100 5 10 0 0 90 0 1
 device=CAPACITOR
@@ -45,7 +45,7 @@ T 43400 54900 5 10 0 1 0 0 1
 loadstatus=smt
 }
 N 43200 56300 43200 55800 4
-C 40700 55800 1 270 0 battery-1.sym
+C 40700 55800 1 270 0 battery.sym
 {
 T 41600 55500 5 10 0 1 270 0 1
 device=CONNECTOR
@@ -94,7 +94,7 @@ N 55200 55200 55600 55200 4
 N 50300 55300 49900 55300 4
 N 50300 54900 49900 54900 4
 N 50300 54500 49900 54500 4
-C 48600 53500 1 0 0 capacitor-1.sym
+C 48600 53500 1 0 0 capacitor.sym
 {
 T 48800 54200 5 10 0 0 0 0 1
 device=CAPACITOR
@@ -113,7 +113,7 @@ vendor=digikey
 T 48600 53500 5 10 0 1 0 0 1
 loadstatus=smt
 }
-C 48600 54300 1 0 0 capacitor-1.sym
+C 48600 54300 1 0 0 capacitor.sym
 {
 T 48800 55000 5 10 0 0 0 0 1
 device=CAPACITOR
@@ -132,7 +132,7 @@ vendor=digikey
 T 48600 54300 5 10 0 1 0 0 1
 loadstatus=smt
 }
-C 48600 55100 1 0 0 capacitor-1.sym
+C 48600 55100 1 0 0 capacitor.sym
 {
 T 48800 55800 5 10 0 0 0 0 1
 device=CAPACITOR
@@ -158,8 +158,8 @@ N 48600 55300 48400 55300 4
 N 48400 55300 48400 53700 4
 N 48600 53700 48400 53700 4
 N 48600 54500 48400 54500 4
-C 48300 53400 1 0 0 gnd-1.sym
-C 55400 54000 1 270 0 capacitor-1.sym
+C 48300 53400 1 0 0 gnd.sym
+C 55400 54000 1 270 0 capacitor.sym
 {
 T 56100 53800 5 10 0 0 270 0 1
 device=CAPACITOR
@@ -178,7 +178,7 @@ vendor=digikey
 T 55400 54000 5 10 0 1 0 0 1
 loadstatus=smt
 }
-C 57800 54800 1 270 0 capacitor-1.sym
+C 57800 54800 1 270 0 capacitor.sym
 {
 T 58500 54600 5 10 0 0 270 0 1
 device=CAPACITOR
@@ -197,7 +197,7 @@ vendor=digikey
 T 57800 54800 5 10 0 1 0 0 1
 loadstatus=smt
 }
-C 58800 55200 1 270 0 capacitor-1.sym
+C 58800 55200 1 270 0 capacitor.sym
 {
 T 59500 55000 5 10 0 0 270 0 1
 device=CAPACITOR
@@ -219,10 +219,10 @@ loadstatus=smt
 N 55200 54000 55600 54000 4
 N 55600 54800 58000 54800 4
 N 59000 55200 55600 55200 4
-C 58900 54000 1 0 0 gnd-1.sym
-C 57900 53600 1 0 0 gnd-1.sym
-C 55500 52800 1 0 0 gnd-1.sym
-C 55200 50800 1 270 0 capacitor-1.sym
+C 58900 54000 1 0 0 gnd.sym
+C 57900 53600 1 0 0 gnd.sym
+C 55500 52800 1 0 0 gnd.sym
+C 55200 50800 1 270 0 capacitor.sym
 {
 T 55900 50600 5 10 0 0 270 0 1
 device=CAPACITOR
@@ -241,7 +241,7 @@ vendor=digikey
 T 55200 50800 5 10 0 1 0 0 1
 loadstatus=smt
 }
-C 56200 50700 1 0 0 inductor-1.sym
+C 56200 50700 1 0 0 inductor.sym
 {
 T 56400 51200 5 10 0 0 0 0 1
 device=INDUCTOR
@@ -260,7 +260,7 @@ vendor=digikey
 T 56200 50700 5 10 0 1 0 0 1
 loadstatus=smt
 }
-C 57400 51500 1 0 0 inductor-1.sym
+C 57400 51500 1 0 0 inductor.sym
 {
 T 57600 52000 5 10 0 0 0 0 1
 device=INDUCTOR
@@ -279,7 +279,7 @@ vendor=digikey
 T 57400 51500 5 10 0 1 0 0 1
 loadstatus=smt
 }
-C 55300 52500 1 270 0 inductor-1.sym
+C 55300 52500 1 270 0 inductor.sym
 {
 T 55800 52300 5 10 0 0 270 0 1
 device=INDUCTOR
@@ -298,7 +298,7 @@ vendor=digikey
 T 55300 52500 5 10 0 1 0 0 1
 loadstatus=smt
 }
-C 56200 52300 1 0 0 capacitor-1.sym
+C 56200 52300 1 0 0 capacitor.sym
 {
 T 56400 53000 5 10 0 0 0 0 1
 device=CAPACITOR
@@ -317,10 +317,10 @@ vendor=digikey
 T 56200 52300 5 10 0 1 0 0 1
 loadstatus=smt
 }
-C 57000 52200 1 0 0 gnd-1.sym
+C 57000 52200 1 0 0 gnd.sym
 N 56200 52500 55400 52500 4
 N 55200 51600 56200 51600 4
-C 56200 51400 1 0 0 capacitor-1.sym
+C 56200 51400 1 0 0 capacitor.sym
 {
 T 56400 52100 5 10 0 0 0 0 1
 device=CAPACITOR
@@ -343,8 +343,8 @@ N 57100 51600 57400 51600 4
 N 57100 50800 57300 50800 4
 N 57300 50800 57300 51600 4
 N 56200 50800 55200 50800 4
-C 55300 49600 1 0 0 gnd-1.sym
-C 59600 51400 1 0 0 capacitor-1.sym
+C 55300 49600 1 0 0 gnd.sym
+C 59600 51400 1 0 0 capacitor.sym
 {
 T 59800 52100 5 10 0 0 0 0 1
 device=CAPACITOR
@@ -363,7 +363,7 @@ vendor=digikey
 T 59600 51400 5 10 0 1 0 0 1
 loadstatus=smt
 }
-C 58200 51200 1 270 0 capacitor-1.sym
+C 58200 51200 1 270 0 capacitor.sym
 {
 T 58900 51000 5 10 0 0 270 0 1
 device=CAPACITOR
@@ -383,8 +383,8 @@ T 58200 51200 5 10 0 1 0 0 1
 loadstatus=smt
 }
 N 58400 51200 58400 51600 4
-C 58300 50000 1 0 0 gnd-1.sym
-C 59300 51200 1 270 0 capacitor-1.sym
+C 58300 50000 1 0 0 gnd.sym
+C 59300 51200 1 270 0 capacitor.sym
 {
 T 59700 50900 5 10 1 1 0 0 1
 refdes=C24
@@ -403,8 +403,8 @@ vendor=digikey
 T 59300 51200 5 10 0 1 0 0 1
 loadstatus=smt
 }
-C 59400 50000 1 0 0 gnd-1.sym
-C 58500 51500 1 0 0 inductor-1.sym
+C 59400 50000 1 0 0 gnd.sym
+C 58500 51500 1 0 0 inductor.sym
 {
 T 58700 52000 5 10 0 0 0 0 1
 device=INDUCTOR
@@ -445,12 +445,12 @@ vendor=digikey
 T 60500 51100 5 10 0 1 0 0 1
 device=CONNECTOR
 }
-C 60400 50800 1 0 0 gnd-1.sym
+C 60400 50800 1 0 0 gnd.sym
 N 60500 51200 60500 51100 4
-C 55300 43300 1 0 0 gnd-1.sym
+C 55300 43300 1 0 0 gnd.sym
 N 55200 44000 55400 44000 4
 N 55400 44000 55400 43600 4
-C 55900 44600 1 270 0 resistor-1.sym
+C 55900 44600 1 270 0 resistor.sym
 {
 T 56300 44300 5 10 0 0 270 0 1
 device=RESISTOR
@@ -473,7 +473,7 @@ N 56000 44800 55200 44800 4
 N 55200 45600 57500 45600 4
 N 55200 46000 58500 46000 4
 N 58500 45600 58200 45600 4
-C 58300 44600 1 270 0 capacitor-1.sym
+C 58300 44600 1 270 0 capacitor.sym
 {
 T 59000 44400 5 10 0 0 270 0 1
 device=CAPACITOR
@@ -492,7 +492,7 @@ vendor=digikey
 T 58300 44600 5 10 0 1 0 0 1
 loadstatus=smt
 }
-C 57000 44600 1 270 0 capacitor-1.sym
+C 57000 44600 1 270 0 capacitor.sym
 {
 T 57700 44400 5 10 0 0 270 0 1
 device=CAPACITOR
@@ -511,8 +511,8 @@ vendor=digikey
 T 57000 44600 5 10 0 1 0 0 1
 loadstatus=smt
 }
-C 58400 43400 1 0 0 gnd-1.sym
-C 57100 43400 1 0 0 gnd-1.sym
+C 58400 43400 1 0 0 gnd.sym
+C 57100 43400 1 0 0 gnd.sym
 N 57200 44600 57200 45600 4
 N 58500 44600 58500 46000 4
 T 60300 50400 9 10 1 0 0 0 1
@@ -537,10 +537,10 @@ value=MP3H6115A
 T 41200 52400 5 10 0 1 0 0 1
 loadstatus=smt
 }
-C 40800 53400 1 0 0 3.3V-plus-1.sym
+C 40800 53400 1 0 0 3.3V-plus.sym
 N 41000 53400 41000 53000 4
 N 41000 53000 41200 53000 4
-C 42100 51800 1 0 0 gnd-1.sym
+C 42100 51800 1 0 0 gnd.sym
 C 41200 52100 1 90 0 capacitor.sym
 {
 T 40500 52300 5 10 0 0 90 0 1
@@ -586,7 +586,7 @@ N 44500 53000 43400 53000 4
 T 44100 53100 5 10 1 1 0 0 1
 netname=pres
 }
-C 43500 51800 1 0 0 gnd-1.sym
+C 43500 51800 1 0 0 gnd.sym
 T 13300 -8600 8 10 0 1 0 0 1
 vendor_part_number=MMA7260QT-ND
 T 13300 -8600 8 10 0 1 0 0 1
@@ -598,7 +598,7 @@ netname=v_lipo
 }
 N 40900 55800 40900 56300 4
 N 40900 55100 40900 54800 4
-C 43700 41900 1 90 0 resistor-1.sym
+C 43700 41900 1 90 0 resistor.sym
 {
 T 43300 42200 5 10 0 0 90 0 1
 device=RESISTOR
@@ -615,7 +615,7 @@ vendor=digikey
 T 43700 41900 5 10 0 1 0 0 1
 loadstatus=smt
 }
-C 43700 40800 1 90 0 resistor-1.sym
+C 43700 40800 1 90 0 resistor.sym
 {
 T 43300 41100 5 10 0 0 90 0 1
 device=RESISTOR
@@ -643,13 +643,13 @@ N 43600 42800 42900 42800 4
 T 42900 42900 5 10 1 1 0 0 1
 netname=v_lipo
 }
-C 43500 40500 1 0 0 gnd-1.sym
+C 43500 40500 1 0 0 gnd.sym
 T 41000 41700 9 10 1 0 0 0 2
 Make it possible to sample 
 LiPo battery voltage with ADC
 N 43900 55900 43800 55900 4
 N 43800 55900 43800 56300 4
-C 46100 53000 1 0 1 gnd-1.sym
+C 46100 53000 1 0 1 gnd.sym
 N 45800 52900 47800 52900 4
 {
 T 47800 53000 5 10 1 1 0 6 1
@@ -665,7 +665,7 @@ N 45800 52100 50300 52100 4
 T 47800 52200 5 10 1 1 0 6 1
 netname=debug_clock
 }
-C 47800 51300 1 270 0 resistor-1.sym
+C 47800 51300 1 270 0 resistor.sym
 {
 T 48200 51000 5 10 0 0 270 0 1
 device=RESISTOR
@@ -682,7 +682,7 @@ vendor=digikey
 T 47800 51300 5 10 0 1 0 0 1
 loadstatus=smt
 }
-C 47800 49300 1 0 0 gnd-1.sym
+C 47800 49300 1 0 0 gnd.sym
 N 50300 51300 47900 51300 4
 {
 T 49000 51400 5 10 1 1 0 0 1
@@ -725,8 +725,8 @@ vendor_part_number=MMA7260QT-ND
 T 13300 -8600 8 10 0 1 0 0 1
 vendor_part_number=MCP9700-E/TO-ND
 N 45800 53300 46000 53300 4
-C 48500 56300 1 0 0 3.3V-plus-1.sym
-C 55900 43300 1 0 0 gnd-1.sym
+C 48500 56300 1 0 0 3.3V-plus.sym
+C 55900 43300 1 0 0 gnd.sym
 C 57500 45200 1 0 0 ABM8.sym
 {
 T 57700 45700 5 10 0 0 0 0 1
@@ -746,8 +746,8 @@ vendor=digikey
 T 57500 45200 5 10 0 1 0 0 1
 loadstatus=smt
 }
-C 58100 44900 1 0 0 gnd-1.sym
-C 57400 44900 1 0 0 gnd-1.sym
+C 58100 44900 1 0 0 gnd.sym
+C 57400 44900 1 0 0 gnd.sym
 N 49800 43700 50300 43700 4
 C 45800 52000 1 0 1 conn-4.sym
 {
@@ -786,8 +786,8 @@ loadstatus=smt
 T 59800 49700 9 10 1 0 0 0 2
   SMA is optional
 default is wire whip
-C 49600 44700 1 0 0 3.3V-plus-1.sym
-C 50000 42700 1 90 0 capacitor-1.sym
+C 49600 44700 1 0 0 3.3V-plus.sym
+C 50000 42700 1 90 0 capacitor.sym
 {
 T 49300 42900 5 10 0 0 90 0 1
 device=CAPACITOR
@@ -806,9 +806,9 @@ vendor=digikey
 T 50000 42700 5 10 0 1 0 0 1
 loadstatus=smt
 }
-C 49700 42400 1 0 0 gnd-1.sym
+C 49700 42400 1 0 0 gnd.sym
 N 49800 43600 49800 43800 4
-C 46600 55400 1 90 0 capacitor-1.sym
+C 46600 55400 1 90 0 capacitor.sym
 {
 T 45900 55600 5 10 0 0 90 0 1
 device=CAPACITOR
@@ -846,7 +846,7 @@ T 43900 55400 5 10 0 0 0 0 1
 loadstatus=smt
 }
 N 46400 55400 46400 54800 4
-C 48200 50900 1 270 0 resistor-1.sym
+C 48200 50900 1 270 0 resistor.sym
 {
 T 48600 50600 5 10 0 0 270 0 1
 device=RESISTOR
@@ -886,7 +886,7 @@ T 48400 50000 5 10 0 1 0 0 1
 loadstatus=smt
 }
 N 47900 50400 47900 50000 4
-C 48200 49300 1 0 0 gnd-1.sym
+C 48200 49300 1 0 0 gnd.sym
 C 60500 44700 1 0 0 hole_plated.sym
 {
 T 60600 46400 5 10 0 0 0 0 1
@@ -909,11 +909,11 @@ footprint=hole-M2.5
 T 60500 43900 5 10 0 1 0 0 1
 loadstatus=noload
 }
-C 61000 43800 1 0 0 gnd-1.sym
+C 61000 43800 1 0 0 gnd.sym
 N 61100 44900 61100 44100 4
 N 43200 48300 46200 48300 4
-C 43500 46600 1 0 0 gnd-1.sym
-C 43500 44000 1 0 0 gnd-1.sym
+C 43500 46600 1 0 0 gnd.sym
+C 43500 44000 1 0 0 gnd.sym
 N 44100 46300 47000 46300 4
 {
 T 44100 46400 5 10 1 1 0 0 1
@@ -1000,10 +1000,10 @@ vendor=digikey
 T 41300 43600 5 10 0 1 0 0 1
 loadstatus=smt
 }
-C 41100 45900 1 0 0 gnd-1.sym
-C 41100 43300 1 0 0 gnd-1.sym
+C 41100 45900 1 0 0 gnd.sym
+C 41100 43300 1 0 0 gnd.sym
 N 43200 45700 46200 45700 4
-C 41300 47000 1 0 0 resistor-1.sym
+C 41300 47000 1 0 0 resistor.sym
 {
 T 41600 47400 5 10 0 0 0 0 1
 device=RESISTOR
@@ -1020,7 +1020,7 @@ vendor=digikey
 T 41300 47000 5 10 0 1 0 0 1
 loadstatus=smt
 }
-C 41300 44400 1 0 0 resistor-1.sym
+C 41300 44400 1 0 0 resistor.sym
 {
 T 41600 44800 5 10 0 0 0 0 1
 device=RESISTOR
@@ -1073,8 +1073,8 @@ vendor=digikey
 T 45300 46900 5 10 0 1 0 0 1
 loadstatus=smt
 }
-C 45100 46600 1 0 0 gnd-1.sym
-C 45100 44000 1 0 0 gnd-1.sym
+C 45100 46600 1 0 0 gnd.sym
+C 45100 44000 1 0 0 gnd.sym
 C 45300 44300 1 90 0 resistor.sym
 {
 T 44900 44600 5 10 0 0 90 0 1
@@ -1219,7 +1219,7 @@ T 42400 56300 5 10 1 1 0 0 1
 device=CONNECTOR
 }
 N 41900 56300 40900 56300 4
-C 47500 55400 1 90 0 capacitor-1.sym
+C 47500 55400 1 90 0 capacitor.sym
 {
 T 46800 55600 5 10 0 0 90 0 1
 device=CAPACITOR
-- 
2.47.2