From 1e1c6a588fe0a45598443b59686c6f6cd0f84cca Mon Sep 17 00:00:00 2001 From: tecodev Date: Sun, 7 Aug 2005 20:09:11 +0000 Subject: [PATCH] * src/pic16/gen.c (genrshTwo): fixed sign extension * src/pic16/device.c: added pic18f2320, 4220 and 4320 * device/include/pic16/pic18f2220.h: changed some bit definitions, added T0CONbits * device/include/pic16/pic18f4220.h: NEW, header for pic18f4220 and pic18f4320 * device/include/pic16/pic18fregs.h: added new devices, embraced Nop(), ClrWdt(), Sleep() and Reset() with do {} while(0) * device/include/pic16/signal.h: resolved name clashes on bit definitions, added DEF_HANDLER2(sig1,sig2,handler) to also allow testing for interrupt enable bits, added comments on how to use the macros * device/lib/pic16/libdev/pic18f2220.c: added T0CONbits * device/lib/pic16/libdev/pic18f{2320,4220,4320}.c: NEW, register definitions for the devices * device/lib/pic16/pics.all: added new devices * device/lib/pic16/libc/stdlib/calloc.c: fixed zeroing allocated memory * device/lib/pic16/libc/stdlib/memfree: do not count the block header as free memory * device/lib/pic16/libc/stdlib/memmisc.c (_initHeap): simplified and added missing end-of-blocklist-marker (reported by Peter Onion, fixes #1252814) * (_mergeHeapBlock): fixed loop condition * device/lib/pic16/libc/stdlib/realloc.c: return NULL for len==0, restructured code * device/lib/pic16/libc/stdlib/{malloc,memfreemax}.c: cleaned up a bit, reduced bitfield accesses, prevent endless loops in case of heap corruption * device/lib/pic16/libc/stdlib/x_ftoa.c: disabled "unreferenced arguments/must return a value" warnings * device/lib/pic16/libio/usart/ubaud.c (usart_baud): replaced BAUDREG with SPBRG * device/lib/pic16/libsdcc/lregs/{lrrest.c,lrst.c}, device/lib/pic16/debug/gstack/gstack.c: replaced _naked, _asm, _endasm with __naked, __asm, __endasm git-svn-id: https://sdcc.svn.sourceforge.net/svnroot/sdcc/trunk/sdcc@3835 4a8a32a2-be11-0410-ad9d-d568d2c75423 --- ChangeLog | 39 + device/include/pic16/pic18f2220.h | 50 +- device/include/pic16/pic18f4220.h | 1190 +++++++++++++++++++++ device/include/pic16/pic18fregs.h | 16 +- device/include/pic16/signal.h | 285 +++-- device/lib/pic16/debug/gstack/gstack.c | 18 +- device/lib/pic16/libc/stdlib/calloc.c | 11 +- device/lib/pic16/libc/stdlib/malloc.c | 3 +- device/lib/pic16/libc/stdlib/memfree.c | 7 +- device/lib/pic16/libc/stdlib/memfreemax.c | 15 +- device/lib/pic16/libc/stdlib/memmisc.c | 21 +- device/lib/pic16/libc/stdlib/realloc.c | 68 +- device/lib/pic16/libc/stdlib/x_ftoa.c | 10 +- device/lib/pic16/libdev/pic18f2220.c | 2 + device/lib/pic16/libdev/pic18f2320.c | 201 ++++ device/lib/pic16/libdev/pic18f4220.c | 222 ++++ device/lib/pic16/libdev/pic18f4320.c | 222 ++++ device/lib/pic16/libio/usart/ubaud.c | 2 +- device/lib/pic16/libsdcc/lregs/lrrest.c | 6 +- device/lib/pic16/libsdcc/lregs/lrst.c | 6 +- device/lib/pic16/pics.all | 3 + src/pic16/device.c | 66 ++ src/pic16/gen.c | 7 +- 23 files changed, 2303 insertions(+), 167 deletions(-) create mode 100644 device/include/pic16/pic18f4220.h create mode 100644 device/lib/pic16/libdev/pic18f2320.c create mode 100644 device/lib/pic16/libdev/pic18f4220.c create mode 100644 device/lib/pic16/libdev/pic18f4320.c diff --git a/ChangeLog b/ChangeLog index 43c7a4fa..abd4d0ad 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,42 @@ +2005-08-07 Raphael Neider + + * src/pic16/gen.c (genrshTwo): fixed sign extension + * src/pic16/device.c: added pic18f2320, 4220 and 4320 + * device/include/pic16/pic18f2220.h: changed some bit definitions, + added T0CONbits + * device/include/pic16/pic18f4220.h: NEW, header for + pic18f4220 and pic18f4320 + * device/include/pic16/pic18fregs.h: added new devices, + embraced Nop(), ClrWdt(), Sleep() and Reset() with do {} while(0) + * device/include/pic16/signal.h: resolved name clashes + on bit definitions, added DEF_HANDLER2(sig1,sig2,handler) + to also allow testing for interrupt enable bits, added + comments on how to use the macros + * device/lib/pic16/libdev/pic18f2220.c: added T0CONbits + * device/lib/pic16/libdev/pic18f{2320,4220,4320}.c: NEW, + register definitions for the devices + * device/lib/pic16/pics.all: added new devices + * device/lib/pic16/libc/stdlib/calloc.c: fixed zeroing + allocated memory + * device/lib/pic16/libc/stdlib/memfree: do not count + the block header as free memory + * device/lib/pic16/libc/stdlib/memmisc.c (_initHeap): + simplified and added missing end-of-blocklist-marker + (reported by Peter Onion, fixes #1252814) + * (_mergeHeapBlock): fixed loop condition + * device/lib/pic16/libc/stdlib/realloc.c: return NULL for + len==0, restructured code + * device/lib/pic16/libc/stdlib/{malloc,memfreemax}.c: cleaned + up a bit, reduced bitfield accesses, prevent endless loops + in case of heap corruption + * device/lib/pic16/libc/stdlib/x_ftoa.c: disabled + "unreferenced arguments/must return a value" warnings + * device/lib/pic16/libio/usart/ubaud.c (usart_baud): + replaced BAUDREG with SPBRG + * device/lib/pic16/libsdcc/lregs/{lrrest.c,lrst.c}, + device/lib/pic16/debug/gstack/gstack.c: replaced + _naked, _asm, _endasm with __naked, __asm, __endasm + 2005-08-05 Raphael Neider * src/pic16/gen.c (pic16_aopGet): fixed handling of offsets in diff --git a/device/include/pic16/pic18f2220.h b/device/include/pic16/pic18f2220.h index 22eb00cb..60f16b9f 100644 --- a/device/include/pic16/pic18f2220.h +++ b/device/include/pic16/pic18f2220.h @@ -25,7 +25,7 @@ typedef union { unsigned RA4:1; unsigned RA5:1; unsigned RA6:1; - unsigned :1; + unsigned RA7:1; }; struct { @@ -81,12 +81,23 @@ typedef union { unsigned INT0:1; unsigned INT1:1; unsigned INT2:1; - unsigned INT3:1; + unsigned CCP2:1; unsigned :1; unsigned :1; unsigned :1; unsigned :1; }; + + struct { + unsigned AN12:1; + unsigned AN10:1; + unsigned AN8:1; + unsigned AN9:1; + unsigned AN11:1; + unsigned KBI1:1; + unsigned KBI2:1; + unsigned KBI3:1; + }; } __PORTBbits_t; extern volatile __PORTBbits_t __at (0xf81) PORTBbits; @@ -453,6 +464,16 @@ typedef union { unsigned :1; unsigned :1; }; + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned DC2B0:1; + unsigned DC2B1:1; + unsigned :1; + unsigned :1; + }; } __CCP2CONbits_t; extern volatile __CCP2CONbits_t __at (0xfba) CCP2CONbits; @@ -471,6 +492,16 @@ typedef union { unsigned :1; unsigned :1; }; + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned DC1B0:1; + unsigned DC1B1:1; + unsigned :1; + unsigned :1; + }; } __CCP1CONbits_t; extern volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits; @@ -700,6 +731,21 @@ typedef union { extern volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; extern __sfr __at (0xfd5) T0CON; +typedef union { + struct { + unsigned T0PS0:1; + unsigned T0PS1:1; + unsigned T0PS2:1; + unsigned PSA:1; + unsigned T0SE:1; + unsigned T0CS:1; + unsigned T08BIT:1; + unsigned TMR0ON:1; + }; +} __T0CONbits_t; + +extern volatile __T0CONbits_t __at (0xfd5) T0CONbits; + extern __sfr __at (0xfd6) TMR0L; extern __sfr __at (0xfd7) TMR0H; extern __sfr __at (0xfd8) STATUS; diff --git a/device/include/pic16/pic18f4220.h b/device/include/pic16/pic18f4220.h new file mode 100644 index 00000000..b01b2176 --- /dev/null +++ b/device/include/pic16/pic18f4220.h @@ -0,0 +1,1190 @@ + +/* + * pic18f4220.h - PIC18F4220 Device Library Header + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id$ + * + */ + +#ifndef __PIC18F4220_H__ +#define __PIC18F4220_H__ + +extern __sfr __at (0xf80) PORTA; +typedef union { + struct { + unsigned RA0:1; + unsigned RA1:1; + unsigned RA2:1; + unsigned RA3:1; + unsigned RA4:1; + unsigned RA5:1; + unsigned RA6:1; + unsigned RA7:1; + }; + + struct { + unsigned AN0:1; + unsigned AN1:1; + unsigned AN2:1; + unsigned AN3:1; + unsigned :1; + unsigned AN4:1; + unsigned OSC2:1; + unsigned :1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned VREFM:1; + unsigned VREFP:1; + unsigned T0CKI:1; + unsigned SS:1; + unsigned CLK0:1; + unsigned :1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned LVDIN:1; + unsigned :1; + unsigned :1; + }; +} __PORTAbits_t; + +extern volatile __PORTAbits_t __at (0xf80) PORTAbits; + +extern __sfr __at (0xf81) PORTB; +typedef union { + struct { + unsigned RB0:1; + unsigned RB1:1; + unsigned RB2:1; + unsigned RB3:1; + unsigned RB4:1; + unsigned RB5:1; + unsigned RB6:1; + unsigned RB7:1; + }; + + struct { + unsigned INT0:1; + unsigned INT1:1; + unsigned INT2:1; + unsigned CCP2:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned AN12:1; + unsigned AN10:1; + unsigned AN8:1; + unsigned AN9:1; + unsigned AN11:1; + unsigned KBI1:1; + unsigned KBI2:1; + unsigned KBI3:1; + }; +} __PORTBbits_t; + +extern volatile __PORTBbits_t __at (0xf81) PORTBbits; + +extern __sfr __at (0xf82) PORTC; +typedef union { + struct { + unsigned RC0:1; + unsigned RC1:1; + unsigned RC2:1; + unsigned RC3:1; + unsigned RC4:1; + unsigned RC5:1; + unsigned RC6:1; + unsigned RC7:1; + }; + + struct { + unsigned T1OSO:1; + unsigned T1OSI:1; + unsigned :1; + unsigned SCK:1; + unsigned SDI:1; + unsigned SDO:1; + unsigned TX:1; + unsigned RX:1; + }; + + struct { + unsigned T1CKI:1; + unsigned CCP2:1; + unsigned CCP1:1; + unsigned SCL:1; + unsigned SDA:1; + unsigned :1; + unsigned CK:1; + unsigned DT:1; + }; +} __PORTCbits_t; + +extern volatile __PORTCbits_t __at (0xf82) PORTCbits; + +extern __sfr __at (0xf83) PORTD; +typedef union { + struct { + unsigned RD0:1; + unsigned RD1:1; + unsigned RD2:1; + unsigned RD3:1; + unsigned RD4:1; + unsigned RD5:1; + unsigned RD6:1; + unsigned RD7:1; + }; + + struct { + unsigned PSP0:1; + unsigned PSP1:1; + unsigned PSP2:1; + unsigned PSP3:1; + unsigned PSP4:1; + unsigned PSP5:1; + unsigned PSP6:1; + unsigned PSP7:1; + }; + + struct { + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned P1B:1; + unsigned P1C:1; + unsigned P1D:1; + }; + +} __PORTDbits_t; + +extern volatile __PORTDbits_t __at (0xf83) PORTDbits; + +extern __sfr __at (0xf84) PORTE; +typedef union { + struct { + unsigned RE0:1; + unsigned RE1:1; + unsigned RE2:1; + unsigned RE3:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned AN5:1; + unsigned AN6:1; + unsigned AN7:1; + unsigned MCLR:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned RD:1; + unsigned WR:1; + unsigned CS:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; + +} __PORTEbits_t; + +extern volatile __PORTEbits_t __at (0xf84) PORTEbits; + +extern __sfr __at (0xf89) LATA; +typedef union { + struct { + unsigned LATA0:1; + unsigned LATA1:1; + unsigned LATA2:1; + unsigned LATA3:1; + unsigned LATA4:1; + unsigned LATA5:1; + unsigned LATA6:1; + unsigned :1; + }; +} __LATAbits_t; + +extern volatile __LATAbits_t __at (0xf89) LATAbits; + +extern __sfr __at (0xf8a) LATB; +typedef union { + struct { + unsigned LATB0:1; + unsigned LATB1:1; + unsigned LATB2:1; + unsigned LATB3:1; + unsigned LATB4:1; + unsigned LATB5:1; + unsigned LATB6:1; + unsigned LATB7:1; + }; +} __LATBbits_t; + +extern volatile __LATBbits_t __at (0xf8a) LATBbits; + +extern __sfr __at (0xf8b) LATC; +typedef union { + struct { + unsigned LATC0:1; + unsigned LATC1:1; + unsigned LATC2:1; + unsigned LATC3:1; + unsigned LATC4:1; + unsigned LATC5:1; + unsigned LATC6:1; + unsigned LATC7:1; + }; +} __LATCbits_t; + +extern volatile __LATCbits_t __at (0xf8b) LATCbits; + +extern __sfr __at (0xf8c) LATD; +typedef union { + struct { + unsigned LATD0:1; + unsigned LATD1:1; + unsigned LATD2:1; + unsigned LATD3:1; + unsigned LATD4:1; + unsigned LATD5:1; + unsigned LATD6:1; + unsigned LATD7:1; + }; +} __LATDbits_t; + +extern volatile __LATDbits_t __at (0xf8c) LATDbits; + +extern __sfr __at (0xf8d) LATE; +typedef union { + struct { + unsigned LATE0:1; + unsigned LATE1:1; + unsigned LATE2:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __LATEbits_t; + +extern volatile __LATEbits_t __at (0xf8d) LATEbits; + +extern __sfr __at (0xf92) TRISA; +typedef union { + struct { + unsigned TRISA0:1; + unsigned TRISA1:1; + unsigned TRISA2:1; + unsigned TRISA3:1; + unsigned TRISA4:1; + unsigned TRISA5:1; + unsigned TRISA6:1; + unsigned :1; + }; +} __TRISAbits_t; + +extern volatile __TRISAbits_t __at (0xf92) TRISAbits; + +extern __sfr __at (0xf93) TRISB; +typedef union { + struct { + unsigned TRISB0:1; + unsigned TRISB1:1; + unsigned TRISB2:1; + unsigned TRISB3:1; + unsigned TRISB4:1; + unsigned TRISB5:1; + unsigned TRISB6:1; + unsigned TRISB7:1; + }; +} __TRISBbits_t; + +extern volatile __TRISBbits_t __at (0xf93) TRISBbits; + +extern __sfr __at (0xf94) TRISC; +typedef union { + struct { + unsigned TRISC0:1; + unsigned TRISC1:1; + unsigned TRISC2:1; + unsigned TRISC3:1; + unsigned TRISC4:1; + unsigned TRISC5:1; + unsigned TRISC6:1; + unsigned TRISC7:1; + }; +} __TRISCbits_t; + +extern volatile __TRISCbits_t __at (0xf94) TRISCbits; + +extern __sfr __at (0xf95) TRISD; +typedef union { + struct { + unsigned TRISD0:1; + unsigned TRISD1:1; + unsigned TRISD2:1; + unsigned TRISD3:1; + unsigned TRISD4:1; + unsigned TRISD5:1; + unsigned TRISD6:1; + unsigned TRISD7:1; + }; +} __TRISDbits_t; + +extern volatile __TRISDbits_t __at (0xf95) TRISDbits; + +extern __sfr __at (0xf96) TRISE; +typedef union { + struct { + unsigned TRISE0:1; + unsigned TRISE1:1; + unsigned TRISE2:1; + unsigned :1; + unsigned PSPMODE:1; + unsigned IBOV:1; + unsigned OBF:1; + unsigned IBF:1; + }; +} __TRISEbits_t; + +extern volatile __TRISEbits_t __at (0xf96) TRISEbits; + +extern __sfr __at (0xf9b) OSCTUNE; +typedef union { + struct { + unsigned TUN0:1; + unsigned TUN1:1; + unsigned TUN2:1; + unsigned TUN3:1; + unsigned TUN4:1; + unsigned TUN5:1; + unsigned :1; + unsigned :1; + }; +} __OSCTUNEbits_t; + +extern volatile __OSCTUNEbits_t __at (0xf9b) OSCTUNEbits; + +extern __sfr __at (0xf9d) PIE1; +typedef union { + struct { + unsigned TMR1IE:1; + unsigned TMR2IE:1; + unsigned CCP1IE:1; + unsigned SSPIE:1; + unsigned TXIE:1; + unsigned RCIE:1; + unsigned ADIE:1; + unsigned PSPIE:1; + }; +} __PIE1bits_t; + +extern volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +extern __sfr __at (0xf9e) PIR1; +typedef union { + struct { + unsigned TMR1IF:1; + unsigned TMR2IF:1; + unsigned CCP1IF:1; + unsigned SSPIF:1; + unsigned TXIF:1; + unsigned RCIF:1; + unsigned ADIF:1; + unsigned PSPIF:1; + }; +} __PIR1bits_t; + +extern volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +extern __sfr __at (0xf9f) IPR1; +typedef union { + struct { + unsigned TMR1IP:1; + unsigned TMR2IP:1; + unsigned CCP1IP:1; + unsigned SSPIP:1; + unsigned TXIP:1; + unsigned RCIP:1; + unsigned ADIP:1; + unsigned PSPIP:1; + }; +} __IPR1bits_t; + +extern volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +extern __sfr __at (0xfa0) PIE2; +typedef union { + struct { + unsigned CCP2IE:1; + unsigned TMR3IE:1; + unsigned LVDIE:1; + unsigned BCLIE:1; + unsigned EEIE:1; + unsigned :1; + unsigned CMIE:1; + unsigned OSCFIE:1; + }; +} __PIE2bits_t; + +extern volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +extern __sfr __at (0xfa1) PIR2; +typedef union { + struct { + unsigned CCP2IF:1; + unsigned TMR3IF:1; + unsigned LVDIF:1; + unsigned BCLIF:1; + unsigned EEIF:1; + unsigned :1; + unsigned CMIF:1; + unsigned OSCFIF:1; + }; +} __PIR2bits_t; + +extern volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +extern __sfr __at (0xfa2) IPR2; +typedef union { + struct { + unsigned CCP2IP:1; + unsigned TMR3IP:1; + unsigned LVDIP:1; + unsigned BCLIP:1; + unsigned EEIP:1; + unsigned :1; + unsigned CMIP:1; + unsigned OSCFIP:1; + }; +} __IPR2bits_t; + +extern volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +extern __sfr __at (0xfa6) EECON1; +typedef union { + struct { + unsigned RD:1; + unsigned WR:1; + unsigned WREN:1; + unsigned WRERR:1; + unsigned FREE:1; + unsigned :1; + unsigned CFGS:1; + unsigned EEPGD:1; + }; +} __EECON1bits_t; + +extern volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +extern __sfr __at (0xfa7) EECON2; +extern __sfr __at (0xfa8) EEDATA; +extern __sfr __at (0xfa9) EEADR; +extern __sfr __at (0xfab) RCSTA; +typedef union { + struct { + unsigned RX9D:1; + unsigned OERR:1; + unsigned FERR:1; + unsigned ADDEN:1; + unsigned CREN:1; + unsigned SREN:1; + unsigned RX9:1; + unsigned SPEN:1; + }; +} __RCSTAbits_t; + +extern volatile __RCSTAbits_t __at (0xfab) RCSTAbits; + +extern __sfr __at (0xfac) TXSTA; +typedef union { + struct { + unsigned TX9D:1; + unsigned TRMT:1; + unsigned BRGH:1; + unsigned :1; + unsigned SYNC:1; + unsigned TXEN:1; + unsigned TX9:1; + unsigned CSRC:1; + }; +} __TXSTAbits_t; + +extern volatile __TXSTAbits_t __at (0xfac) TXSTAbits; + +extern __sfr __at (0xfad) TXREG; +extern __sfr __at (0xfae) RCREG; +extern __sfr __at (0xfaf) SPBRG; +extern __sfr __at (0xfb1) T3CON; +typedef union { + struct { + unsigned TMR3ON:1; + unsigned TMR3CS:1; + unsigned T3SYNC:1; + unsigned T3CCP1:1; + unsigned T3CKPS0:1; + unsigned T3CKPS1:1; + unsigned T3CCP2:1; + unsigned RD16:1; + }; +} __T3CONbits_t; + +extern volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +extern __sfr __at (0xfb2) TMR3L; +extern __sfr __at (0xfb3) TMR3H; +extern __sfr __at (0xfb4) CMCON; +typedef union { + struct { + unsigned CM0:1; + unsigned CM1:1; + unsigned CM2:1; + unsigned CIS:1; + unsigned C1INV:1; + unsigned C2INV:1; + unsigned C1OUT:1; + unsigned C2OUT:1; + }; +} __CMCONbits_t; + +extern volatile __CMCONbits_t __at (0xfb4) CMCONbits; + +extern __sfr __at (0xfb5) CVRCON; +typedef union { + struct { + unsigned CVR0:1; + unsigned CVR1:1; + unsigned CVR2:1; + unsigned CVR3:1; + unsigned CVREF:1; + unsigned CVRR:1; + unsigned CVROE:1; + unsigned CVREN:1; + }; +} __CVRCONbits_t; + +extern volatile __CVRCONbits_t __at (0xfb5) CVRCONbits; + +extern __sfr __at (0xfba) CCP2CON; +typedef union { + struct { + unsigned CCP2M0:1; + unsigned CCP2M1:1; + unsigned CCP2M2:1; + unsigned CCP2M3:1; + unsigned DCCP2Y:1; + unsigned DCCP2X:1; + unsigned :1; + unsigned :1; + }; +} __CCP2CONbits_t; + +extern volatile __CCP2CONbits_t __at (0xfba) CCP2CONbits; + +extern __sfr __at (0xfbb) CCPR2L; +extern __sfr __at (0xfbc) CCPR2H; +extern __sfr __at (0xfbd) CCP1CON; +typedef union { + struct { + unsigned CCP1M0:1; + unsigned CCP1M1:1; + unsigned CCP1M2:1; + unsigned CCP1M3:1; + unsigned DC1B0:1; + unsigned DC1B1:1; + unsigned P1M0:1; + unsigned P1M1:1; + }; +} __CCP1CONbits_t; + +extern volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits; + +extern __sfr __at (0xfb7) PWM1CON; +typedef union { + struct { + unsigned PDC0:1; + unsigned PDC1:1; + unsigned PDC2:1; + unsigned PDC3:1; + unsigned PDC4:1; + unsigned PDC5:1; + unsigned PDC6:1; + unsigned PRSEN:1; + }; +} __PWM1CONbits_t; + +extern volatile __PWM1CONbits_t __at (0xfb7) PWM1CONbits; + +extern __sfr __at (0xfb6) ECCPAS; +typedef union { + struct { + unsigned PSSBD0:1; + unsigned PSSBD1:1; + unsigned PSSAC0:1; + unsigned PSSAC1:1; + unsigned ECCPAS0:1; + unsigned ECCPAS1:1; + unsigned ECCPAS2:1; + unsigned ECCPASE:1; + }; +} __ECCPASbits_t; + +extern volatile __ECCPASbits_t __at (0xfb6) ECCPASbits; + +extern __sfr __at (0xfbe) CCPR1L; +extern __sfr __at (0xfbf) CCPR1H; +extern __sfr __at (0xfc0) ADCON2; +typedef union { + struct { + unsigned ADCS0:1; + unsigned ADCS1:1; + unsigned ADCS2:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned ADFM:1; + }; +} __ADCON2bits_t; + +extern volatile __ADCON2bits_t __at (0xfc0) ADCON2bits; + +extern __sfr __at (0xfc1) ADCON1; +typedef union { + struct { + unsigned PCFG0:1; + unsigned PCFG1:1; + unsigned PCFG2:1; + unsigned PCFG3:1; + unsigned VCFG0:1; + unsigned VCFG1:1; + unsigned :1; + unsigned :1; + }; +} __ADCON1bits_t; + +extern volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +extern __sfr __at (0xfc2) ADCON0; +typedef union { + struct { + unsigned ADON:1; + unsigned GO:1; + unsigned CHS0:1; + unsigned CHS1:1; + unsigned CHS2:1; + unsigned CHS3:1; + unsigned :1; + unsigned :1; + }; +} __ADCON0bits_t; + +extern volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +extern __sfr __at (0xfc3) ADRESL; +extern __sfr __at (0xfc4) ADRESH; +extern __sfr __at (0xfc5) SSPCON2; +typedef union { + struct { + unsigned SEN:1; + unsigned RSEN:1; + unsigned PEN:1; + unsigned RCEN:1; + unsigned ACKEN:1; + unsigned ACKDT:1; + unsigned ACKSTAT:1; + unsigned GCEN:1; + }; +} __SSPCON2bits_t; + +extern volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits; + +extern __sfr __at (0xfc6) SSPCON1; +typedef union { + struct { + unsigned SSPM0:1; + unsigned SSPM1:1; + unsigned SSPM2:1; + unsigned SSPM3:1; + unsigned CKP:1; + unsigned SSPEN:1; + unsigned SSPOV:1; + unsigned WCOL:1; + }; +} __SSPCON1bits_t; + +extern volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits; + +extern __sfr __at (0xfc7) SSPSTAT; +typedef union { + struct { + unsigned BF:1; + unsigned UA:1; + unsigned R_W:1; + unsigned S:1; + unsigned P:1; + unsigned D_A:1; + unsigned CKE:1; + unsigned SMP:1; + }; +} __SSPSTATbits_t; + +extern volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits; + +extern __sfr __at (0xfc8) SSPADD; +extern __sfr __at (0xfc9) SSPBUF; +extern __sfr __at (0xfca) T2CON; +typedef union { + struct { + unsigned T2CKPS0:1; + unsigned T2CKPS1:1; + unsigned TMR2ON:1; + unsigned TOUTPS0:1; + unsigned TOUTPS1:1; + unsigned TOUTPS2:1; + unsigned TOUTPS3:1; + unsigned :1; + }; +} __T2CONbits_t; + +extern volatile __T2CONbits_t __at (0xfca) T2CONbits; + +extern __sfr __at (0xfcb) PR2; +extern __sfr __at (0xfcc) TMR2; +extern __sfr __at (0xfcd) T1CON; +typedef union { + struct { + unsigned TMR1ON:1; + unsigned TMR1CS:1; + unsigned NOT_T1SYNC:1; + unsigned T1OSCEN:1; + unsigned T1CKPS0:1; + unsigned T1CKPS1:1; + unsigned :1; + unsigned RD16:1; + }; +} __T1CONbits_t; + +extern volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +extern __sfr __at (0xfce) TMR1L; +extern __sfr __at (0xfcf) TMR1H; +extern __sfr __at (0xfd0) RCON; +typedef union { + struct { + unsigned BOR:1; + unsigned POR:1; + unsigned PD:1; + unsigned TO:1; + unsigned RI:1; + unsigned :1; + unsigned :1; + unsigned IPEN:1; + }; +} __RCONbits_t; + +extern volatile __RCONbits_t __at (0xfd0) RCONbits; + +extern __sfr __at (0xfd1) WDTCON; +typedef union { + struct { + unsigned SWDTEN:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned SWDTE:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __WDTCONbits_t; + +extern volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +extern __sfr __at (0xfd2) LVDCON; +typedef union { + struct { + unsigned LVDL0:1; + unsigned LVDL1:1; + unsigned LVDL2:1; + unsigned LVDL3:1; + unsigned LVDEN:1; + unsigned VRST:1; + unsigned :1; + unsigned :1; + }; + + struct { + unsigned LVV0:1; + unsigned LVV1:1; + unsigned LVV2:1; + unsigned LVV3:1; + unsigned :1; + unsigned BGST:1; + unsigned :1; + unsigned :1; + }; +} __LVDCONbits_t; + +extern volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +extern __sfr __at (0xfd3) OSCCON; +typedef union { + struct { + unsigned SCS:1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __OSCCONbits_t; + +extern volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +extern __sfr __at (0xfd5) T0CON; +typedef union { + struct { + unsigned T0PS0:1; + unsigned T0PS1:1; + unsigned T0PS2:1; + unsigned PSA:1; + unsigned T0SE:1; + unsigned T0CS:1; + unsigned T08BIT:1; + unsigned TMR0ON:1; + }; +} __T0CONbits_t; + +extern volatile __T0CONbits_t __at (0xfd5) T0CONbits; + +extern __sfr __at (0xfd6) TMR0L; +extern __sfr __at (0xfd7) TMR0H; +extern __sfr __at (0xfd8) STATUS; +typedef union { + struct { + unsigned C:1; + unsigned DC:1; + unsigned Z:1; + unsigned OV:1; + unsigned N:1; + unsigned :1; + unsigned :1; + unsigned :1; + }; +} __STATUSbits_t; + +extern volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +extern __sfr __at (0xfd9) FSR2L; +extern __sfr __at (0xfda) FSR2H; +extern __sfr __at (0xfdb) PLUSW2; +extern __sfr __at (0xfdc) PREINC2; +extern __sfr __at (0xfdd) POSTDEC2; +extern __sfr __at (0xfde) POSTINC2; +extern __sfr __at (0xfdf) INDF2; +extern __sfr __at (0xfe0) BSR; +extern __sfr __at (0xfe1) FSR1L; +extern __sfr __at (0xfe2) FSR1H; +extern __sfr __at (0xfe3) PLUSW1; +extern __sfr __at (0xfe4) PREINC1; +extern __sfr __at (0xfe5) POSTDEC1; +extern __sfr __at (0xfe6) POSTINC1; +extern __sfr __at (0xfe7) INDF1; +extern __sfr __at (0xfe8) WREG; +extern __sfr __at (0xfe9) FSR0L; +extern __sfr __at (0xfea) FSR0H; +extern __sfr __at (0xfeb) PLUSW0; +extern __sfr __at (0xfec) PREINC0; +extern __sfr __at (0xfed) POSTDEC0; +extern __sfr __at (0xfee) POSTINC0; +extern __sfr __at (0xfef) INDF0; +extern __sfr __at (0xff0) INTCON3; +typedef union { + struct { + unsigned INT1F:1; + unsigned INT2F:1; + unsigned :1; + unsigned INT1E:1; + unsigned INT2E:1; + unsigned :1; + unsigned INT1P:1; + unsigned INT2P:1; + }; + + struct { + unsigned INT1IF:1; + unsigned INT2IF:1; + unsigned :1; + unsigned INT1IE:1; + unsigned INT2IE:1; + unsigned :1; + unsigned INT1IP:1; + unsigned INT2IP:1; + }; +} __INTCON3bits_t; + +extern volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +extern __sfr __at (0xff1) INTCON2; +typedef union { + struct { + unsigned RBIP:1; + unsigned :1; + unsigned T0IP:1; + unsigned :1; + unsigned INTEDG2:1; + unsigned INTEDG1:1; + unsigned INTEDG0:1; + unsigned RBPU:1; + }; +} __INTCON2bits_t; + +extern volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +extern __sfr __at (0xff2) INTCON; +typedef union { + struct { + unsigned RBIF:1; + unsigned INT0F:1; + unsigned T0IF:1; + unsigned RBIE:1; + unsigned INT0E:1; + unsigned T0IE:1; + unsigned PEIE:1; + unsigned GIE:1; + }; +} __INTCONbits_t; + +extern volatile __INTCONbits_t __at (0xff2) INTCONbits; + +extern __sfr __at (0xff3) PRODL; +extern __sfr __at (0xff4) PRODH; +extern __sfr __at (0xff5) TABLAT; +extern __sfr __at (0xff6) TBLPTRL; +extern __sfr __at (0xff7) TBLPTRH; +extern __sfr __at (0xff8) TBLPTRU; +extern __sfr __at (0xff9) PCL; +extern __sfr __at (0xffa) PCLATH; +extern __sfr __at (0xffb) PCLATU; +extern __sfr __at (0xffc) STKPTR; +typedef union { + struct { + unsigned STKPTR0:1; + unsigned STKPTR1:1; + unsigned STKPTR2:1; + unsigned STKPTR3:1; + unsigned STKPTR4:1; + unsigned :1; + unsigned STKUNF:1; + unsigned STKFUL:1; + }; +} __STKPTRbits_t; + +extern volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +extern __sfr __at (0xffd) TOSL; +extern __sfr __at (0xffe) TOSH; +extern __sfr __at (0xfff) TOSU; + + +/* Configuration registers locations */ +#define __CONFIG1H 0x300001 +#define __CONFIG2L 0x300002 +#define __CONFIG2H 0x300003 +#define __CONFIG3H 0x300005 +#define __CONFIG4L 0x300006 +#define __CONFIG5L 0x300008 +#define __CONFIG5H 0x300009 +#define __CONFIG6L 0x30000A +#define __CONFIG6H 0x30000B +#define __CONFIG7L 0x30000C +#define __CONFIG7H 0x30000D + + + +/* Oscillator 1H options */ +#define _OSC_11XX_1H 0xFC /* 11XX EXT RC-CLKOUT on RA6 */ +#define _OSC_101X_1H 0xFA /* 101X EXT RC-CLKOUT on RA6 */ +#define _OSC_INT_CLKOUT_on_RA6_Port_on_RA7_1H 0xF9 /* INT RC-CLKOUT_on_RA6_Port_on_RA7 */ +#define _OSC_INT_Port_on_RA6_Port_on_RA7_1H 0xF8 /* INT RC-Port_on_RA6_Port_on_RA7 */ +#define _OSC_EXT_Port_on_RA6_1H 0xF7 /* EXT RC-Port_on_RA6 */ +#define _OSC_HS_PLL_1H 0xF6 /* HS-PLL enabled freq=4xFosc1 */ +#define _OSC_EC_PORT_1H 0xF5 /* EC-Port on RA6 */ +#define _OSC_EC_CLKOUT_1H 0xF4 /* EC-CLKOUT on RA6 */ +#define _OSC_EXT_CLKOUT_on_RA6_1H 0xF3 /* EXT RC-CLKOUT_on_RA6 */ +#define _OSC_HS_1H 0xF2 /* HS */ +#define _OSC_XT_1H 0xF1 /* XT */ +#define _OSC_LP_1H 0xF0 /* LP */ + +/* Fail Safe Clock Monitor Enable 1H options */ +#define _FCMEN_OFF_1H 0xBF /* Disabled */ +#define _FCMEN_ON_1H 0xFF /* Enabled */ + +/* Internal External Switch Over 1H options */ +#define _IESO_OFF_1H 0x7F /* Disabled */ +#define _IESO_ON_1H 0xFF /* Enabled */ + +/* Power Up Timer 2L options */ +#define _PUT_OFF_2L 0xFF /* Disabled */ +#define _PUT_ON_2L 0xFE /* Enabled */ + +/* Brown Out Detect 2L options */ +#define _BODEN_ON_2L 0xFF /* Enabled */ +#define _BODEN_OFF_2L 0xFD /* Disabled */ + +/* Brown Out Voltage 2L options */ +#define _BODENV_2_0V_2L 0xFF /* 2.0V */ +#define _BODENV_2_7V_2L 0xFB /* 2.7V */ +#define _BODENV_4_2V_2L 0xF7 /* 4.2V */ +#define _BODENV_4_5V_2L 0xF3 /* 4.5V */ + +/* Watchdog Timer 2H options */ +#define _WDT_ON_2H 0xFF /* Enabled */ +#define _WDT_DISABLED_CONTROLLED_2H 0xFE /* Disabled-Controlled by SWDTEN bit */ + +/* Watchdog Postscaler 2H options */ +#define _WDTPS_1_32768_2H 0xFF /* 1:32768 */ +#define _WDTPS_1_16384_2H 0xFD /* 1:16384 */ +#define _WDTPS_1_8192_2H 0xFB /* 1:8192 */ +#define _WDTPS_1_4096_2H 0xF9 /* 1:4096 */ +#define _WDTPS_1_2048_2H 0xF7 /* 1:2048 */ +#define _WDTPS_1_1024_2H 0xF5 /* 1:1024 */ +#define _WDTPS_1_512_2H 0xF3 /* 1:512 */ +#define _WDTPS_1_256_2H 0xF1 /* 1:256 */ +#define _WDTPS_1_128_2H 0xEF /* 1:128 */ +#define _WDTPS_1_64_2H 0xED /* 1:64 */ +#define _WDTPS_1_32_2H 0xEB /* 1:32 */ +#define _WDTPS_1_16_2H 0xE9 /* 1:16 */ +#define _WDTPS_1_8_2H 0xE7 /* 1:8 */ +#define _WDTPS_1_4_2H 0xE5 /* 1:4 */ +#define _WDTPS_1_2_2H 0xE3 /* 1:2 */ +#define _WDTPS_1_1_2H 0xE1 /* 1:1 */ + +/* CCP2 Mux 3H options */ +#define _CCP2MUX_RC1_3H 0xFF /* RC1 */ +#define _CCP2MUX_RB3_3H 0xFE /* RB3 */ + +/* PortB A/D Enable 3H options */ +#define _PBADEN_PORTB_4_0__analog_inputs_on_RSET_3H 0xFF /* PORTB<4:0> configured as analog_inputs_on_RESET */ +#define _PBADEN_PORTB_4_0__digital_I_O_on_REST_3H 0xFD /* PORTB<4:0> configured as digital_I_O_on_RESET */ + +/* MCLR enable 3H options */ +#define _MCLRE_MCLR_Enabled_RE3_Disabled_3H 0xFF /* MCLR Enabled_RE3_Disabled */ +#define _MCLRE_MCLR_Disabled_RE3_Enabled_3H 0x7F /* MCLR Disabled__RE3_Enabled */ + +/* Stack Overflow Reset 4L options */ +#define _STVR_ON_4L 0xFF /* Enabled */ +#define _STVR_OFF_4L 0xFE /* Disabled */ + +/* Low Voltage Program 4L options */ +#define _LVP_ON_4L 0xFF /* Enabled */ +#define _LVP_OFF_4L 0xFB /* Disabled */ + +/* Background Debug 4L options */ +#define _BACKBUG_OFF_4L 0xFF /* Disabled */ +#define _BACKBUG_ON_4L 0x7F /* Enabled */ + +/* Code Protect 000200-0007FF 5L options */ +#define _CP_0_OFF_5L 0xFF /* Disabled */ +#define _CP_0_ON_5L 0xFE /* Enabled */ + +/* Code Protect 000800-000FFF 5L options */ +#define _CP_1_OFF_5L 0xFF /* Disabled */ +#define _CP_1_ON_5L 0xFD /* Enabled */ + +/* Data EE Read Protect 5H options */ +#define _CPD_OFF_5H 0xFF /* Disabled */ +#define _CPD_ON_5H 0x7F /* Enabled */ + +/* Code Protect Boot 5H options */ +#define _CPB_OFF_5H 0xFF /* Disabled */ +#define _CPB_ON_5H 0xBF /* Enabled */ + +/* Table Write Protect 00200-007FF 6L options */ +#define _WRT_0_OFF_6L 0xFF /* Disabled */ +#define _WRT_0_ON_6L 0xFE /* Enabled */ + +/* Table Write Protect 00800-00FFF 6L options */ +#define _WRT_1_OFF_6L 0xFF /* Disabled */ +#define _WRT_1_ON_6L 0xFD /* Enabled */ + +/* Data EE Write Protect 6H options */ +#define _WRTD_OFF_6H 0xFF /* Disabled */ +#define _WRTD_ON_6H 0x7F /* Enabled */ + +/* Table Write Protect Boot 6H options */ +#define _WRTB_OFF_6H 0xFF /* Disabled */ +#define _WRTB_ON_6H 0xBF /* Enabled */ + +/* Config. Write Protect 6H options */ +#define _WRTC_OFF_6H 0xFF /* Disabled */ +#define _WRTC_ON_6H 0xDF /* Enabled */ + +/* Table Read Protect 00200-007FF 7L options */ +#define _EBTR_0_OFF_7L 0xFF /* Disabled */ +#define _EBTR_0_ON_7L 0xFE /* Enabled */ + +/* Table Read Protect 00800-00FFF 7L options */ +#define _EBTR_1_OFF_7L 0xFF /* Disabled */ +#define _EBTR_1_ON_7L 0xFD /* Enabled */ + +/* Table Read Protect Boot 7H options */ +#define _EBTRB_OFF_7H 0xFF /* Disabled */ +#define _EBTRB_ON_7H 0xBF /* Enabled */ + + +/* Device ID locations */ +#define __IDLOC0 0x200000 +#define __IDLOC1 0x200001 +#define __IDLOC2 0x200002 +#define __IDLOC3 0x200003 +#define __IDLOC4 0x200004 +#define __IDLOC5 0x200005 +#define __IDLOC6 0x200006 +#define __IDLOC7 0x200007 + + +#endif diff --git a/device/include/pic16/pic18fregs.h b/device/include/pic16/pic18fregs.h index 9c7cd17c..1365741c 100644 --- a/device/include/pic16/pic18fregs.h +++ b/device/include/pic16/pic18fregs.h @@ -45,6 +45,8 @@ #elif defined(pic18f2220) # include +#elif defined(pic18f2320) +# include /* Yes, it's 2220.h */ #elif defined(pic18f2455) # include @@ -52,6 +54,12 @@ #elif defined(pic18f2550) # include +#elif defined(pic18f4220) +# include + +#elif defined(pic18f4320) +# include /* Yes, it's 4220.h */ + #elif defined(pic18f4331) # include @@ -91,10 +99,10 @@ #endif -#define Nop() { _asm nop _endasm; } -#define ClrWdt() { _asm clrwdt _endasm; } -#define Sleep() { _asm sleep _endasm; } -#define Reset() { _asm reset _endasm; } +#define Nop() do { _asm nop _endasm; } while(0) +#define ClrWdt() do { _asm clrwdt _endasm; } while(0) +#define Sleep() do { _asm sleep _endasm; } while(0) +#define Reset() do { _asm reset _endasm; } while(0) #endif /* __PIC18FREGS_H__ */ diff --git a/device/include/pic16/signal.h b/device/include/pic16/signal.h index cd5771b7..5e67f12b 100644 --- a/device/include/pic16/signal.h +++ b/device/include/pic16/signal.h @@ -1,4 +1,3 @@ - /* * Signal handler header * @@ -25,85 +24,239 @@ #ifndef __SIGNAL_H__ #define __SIGNAL_H__ -#define RBIF 0x0 -#define INT0IF 0x1 -#define TMR0IF 0x2 - -#define INT1IF 0x0 -#define INT2IF 0x1 - -#define TMR1IF 0x0 -#define TMR2IF 0x1 -#define CCP1IF 0x2 -#define SSPIF 0x3 -#define TXIF 0x4 -#define RCIF 0x5 -#define ADIF 0x6 -#define PSPIF 0x7 - -#define CCP2IF 0x0 -#define TMR3IF 0x1 -#define LVDIF 0x2 -#define BCLIF 0x3 -#define EEIF 0x4 -#define USBIF 0x5 - /* interrupt testing arguments */ -#define SIG_RB _INTCON, RBIF -#define SIG_INT0 _INTCON, INT0IF -#define SIG_INT1 _INTCON3, INT1IF -#define SIG_INT2 _INTCON3, INT2IF -#define SIG_CCP1 _PIR1, CCP1IF -#define SIG_CCP2 _PIR2, CCP2IF -#define SIG_TMR0 _INTCON, TMR0IF -#define SIG_TMR1 _PIR1, TMR1IF -#define SIG_TMR2 _PIR1, TMR2IF -#define SIG_TMR3 _PIR2, TMR3IF -#define SIG_EE _PIR2, EEIF -#define SIG_BCOL _PIR2, BCLIF -#define SIG_LVD _PIR2, LVDIF -#define SIG_PSP _PIR1, PSPIF -#define SIG_AD _PIR1, ADIF -#define SIG_RC _PIR1, RCIF -#define SIG_TX _PIR1, TXIF -#define SIG_MSSP _PIR1, SSPIF -#define SIG_USB _PIR2, USBIF - - -#define DEF_ABSVECTOR(vecno, name) \ +#define SIG_RB SIG_RBIF +#define SIG_INT0 SIG_INT0IF +#define SIG_INT1 SIG_INT1IF +#define SIG_INT2 SIG_INT2IF +#define SIG_CCP1 SIG_CCP1IF +#define SIG_CCP2 SIG_CCP2IF +#define SIG_TMR0 SIG_TMR0IF +#define SIG_TMR1 SIG_TMR1IF +#define SIG_TMR2 SIG_TMR2IF +#define SIG_TMR3 SIG_TMR3IF +#define SIG_EE SIG_EEIF +#define SIG_BCOL SIG_BCOLIF +#define SIG_LVD SIG_LVDIF +#define SIG_PSP SIG_PSPIF +#define SIG_AD SIG_ADIF +#define SIG_RC SIG_RCIF +#define SIG_TX SIG_TXIF +#define SIG_SSP SIG_SSPIF +#define SIG_MSSP SIG_SSPIF /* just an alias */ +#define SIG_USB SIG_USBIF + +/* define name to be the interrupt handler for interrupt #vecno */ +#define DEF_ABSVECTOR(vecno, name) \ void __ivt_ ## name(void) __interrupt vecno __naked \ -{\ - __asm \n\ - goto _ ## name \n\ - __endasm; \ +{ \ + __asm \n\ + goto _ ## name \n\ + __endasm; \ } -#define DEF_INTHIGH(name) \ +/* Define name to be the handler for high priority interrupts, + * use like this: + * DEF_INTHIGH(high_handler) + * DEF_HANDLER(SIG_TMR0, timer0_handler) + * DEF_HANDLER2(SIG_TMR1, SIG_TMR1IE, timer1_handler) + * ... + * END_DEF + * + * SIGHANDLER(timer0_handler) + * { + * // code to handle timer0 interrupts + * } + * SIGHANDLER(timer1_handler) + * { + * // code to handle timer1 interrupts + * } + */ +#define DEF_INTHIGH(name) \ DEF_ABSVECTOR(1, name) \ -void name(void) __naked __interrupt \ -{\ - __asm \n +void name(void) __naked __interrupt \ +{ \ + __asm - -#define DEF_INTLOW(name) \ +/* Define name to be the handler for high priority interrupts, + * use like this: + * DEF_INTLOW(low_handler) + * DEF_HANDLER(SIG_RB, portb_handler) + * DEF_HANDLER2(SIG_LVD, SIG_LVDIE, lowvolt_handler) + * ... + * END_DEF + * + * SIGHANDLER(portb_handler) + * { + * // code to handle PORTB change interrupts + * } + * SIGHANDLER(lowvolt_handler) + * { + * // code to handle low voltage interrupts + * } + */ +#define DEF_INTLOW(name) \ DEF_ABSVECTOR(2, name) \ -void name(void) __naked __interrupt \ -{\ - __asm \n +void name(void) __naked __interrupt \ +{ \ + __asm - -#define END_DEF \ - retfie \n\ - __endasm;\ +/* finish an interrupt handler definition */ +#define END_DEF \ + retfie \n\ + __endasm; \ } - -#define DEF_HANDLER(sig, handler) \ - btfsc sig \n\ +/* Declare handler to be the handler function for the given signal. + * sig should be one of SIG_xxx from above, handler should be a + * function defined using SIGHANDLER(handler) or + * SIGHANDLERNAKED(handler). + * ATTENTION: This macro ignores the signal's enable bit! + * Use DEF_HANDLER2(SIG_xxx, SIGxxxIE, handler) instead! + * To be used together with DEF_INTHIGH and DEF_INTLOW. + */ +#define DEF_HANDLER(sig, handler) \ + btfsc sig \n\ goto _ ## handler +/* Declare handler to be the handler function for the given signal. + * sig should be one of SIG_xxx from above, + * sig2 should also be a signal (probably SIG_xxxIE from below) and + * handler should be a function defined using SIGHANDLER(handler) + * or SIGHANDLERNAKED(handler). + * To be used together with DEF_INTHIGH and DEF_INTLOW. + */ +#define DEF_HANDLER2(sig1,sig2,handler) \ + btfss sig1 \n\ + bra $+8 \n\ + btfsc sig2 \n\ + goto _ ## handler +/* Declare or define an interrupt handler function. */ #define SIGHANDLER(handler) void handler (void) __interrupt #define SIGHANDLERNAKED(handler) void handler (void) __naked __interrupt + +/* + * inline assembly compatible bit definitions + */ +#define SIG_RBIF _INTCON, 0 +#define SIG_RBIE _INTCON, 3 +#define SIG_RBIP _INTCON2, 0 + +#define SIG_INT0IF _INTCON, 1 +#define SIG_INT0IE _INTCON, 4 +/*#define SIG_INT0IP not selectable, always ? */ + +#define SIG_TMR0IF _INTCON, 2 +#define SIG_TMR0IE _INTCON, 5 +#define SIG_TMR0IP _INTCON2, 2 + +#define SIG_INT1IF _INTCON3, 0 +#define SIG_INT1IE _INTCON3, 3 +#define SIG_INT1IP _INTCON3, 6 + +#define SIG_INT2IF _INTCON3, 1 +#define SIG_INT2IE _INTCON3, 4 +#define SIG_INT2IP _INTCON3, 7 + +/* device dependent -- should be moved to pic18f*.h */ +#define SIG_TMR1IDX 0 +#define SIG_TMR1SUF 1 +#define SIG_TMR2IDX 1 +#define SIG_TMR2SUF 1 +#define SIG_CCP1IDX 2 +#define SIG_CCP1SUF 1 +#define SIG_SSPIDX 3 +#define SIG_SSPSUF 1 +#define SIG_TXIDX 4 +#define SIG_TXSUF 1 +#define SIG_RCIDX 5 +#define SIG_RCSUF 1 +#define SIG_ADIDX 6 +#define SIG_ADSUF 1 +#define SIG_PSPIDX 7 +#define SIG_PSPSUF 1 + +#define SIG_CCP2IDX 0 +#define SIG_CCP2SUF 2 +#define SIG_TMR3IDX 1 +#define SIG_TMR3SUF 2 +#define SIG_LVDIDX 2 +#define SIG_LVDSUF 2 +#define SIG_BCOLIDX 3 +#define SIG_BCOLSUF 2 +#define SIG_EEIDX 4 +#define SIG_EESUF 2 +#define SIG_USBIDX 5 +#define SIG_USBSUF 2 + +/* device independent */ +#define __concat(a,b) __concat2(a,b) +#define __concat2(a,b) a ## b + +#define SIG_PIR(suf) __concat(_PIR,suf) +#define SIG_PIE(suf) __concat(_PIE,suf) +#define SIG_IPR(suf) __concat(_IPR,suf) + +#define SIG_TMR1IF SIG_PIR(SIG_TMR1SUF), SIG_TMR1IDX +#define SIG_TMR1IE SIG_PIE(SIG_TMR1SUF), SIG_TMR1IDX +#define SIG_TMR1IP SIG_IPR(SIG_TMR1SUF), SIG_TMR1IDX + +#define SIG_TMR2IF SIG_PIR(SIG_TMR2SUF), SIG_TMR2IDX +#define SIG_TMR2IE SIG_PIE(SIG_TMR2SUF), SIG_TMR2IDX +#define SIG_TMR2IP SIG_IPR(SIG_TMR2SUF), SIG_TMR2IDX + +#define SIG_CCP1IF SIG_PIR(SIG_CCP1SUF), SIG_CCP1IDX +#define SIG_CCP1IE SIG_PIE(SIG_CCP1SUF), SIG_CCP1IDX +#define SIG_CCP1IP SIG_IPR(SIG_CCP1SUF), SIG_CCP1IDX + +#define SIG_SSPIF SIG_PIR(SIG_SSPSUF), SIG_SSPIDX +#define SIG_SSPIE SIG_PIE(SIG_SSPSUF), SIG_SSPIDX +#define SIG_SSPIP SIG_IPR(SIG_SSPSUF), SIG_SSPIDX +/* aliases: MSSP */ +#define SIG_MSSPIF SIG_SSPIF //SIG_PIR(SIG_SSPSUF), SIG_SSPIDX +#define SIG_MSSPIE SIG_SSPIE //SIG_PIE(SIG_SSPSUF), SIG_SSPIDX +#define SIG_MSSPIP SIG_SSPIP //SIG_IPR(SIG_SSPSUF), SIG_SSPIDX + +#define SIG_TXIF SIG_PIR(SIG_TXSUF), SIG_TXIDX +#define SIG_TXIE SIG_PIE(SIG_TXSUF), SIG_TXIDX +#define SIG_TXIP SIG_IPR(SIG_TXSUF), SIG_TXIDX + +#define SIG_RCIF SIG_PIR(SIG_RCSUF), SIG_RCIDX +#define SIG_RCIE SIG_PIE(SIG_RCSUF), SIG_RCIDX +#define SIG_RCIP SIG_IPR(SIG_RCSUF), SIG_RCIDX + +#define SIG_ADIF SIG_PIR(SIG_ADSUF), SIG_ADIDX +#define SIG_ADIE SIG_PIE(SIG_ADSUF), SIG_ADIDX +#define SIG_ADIP SIG_IPR(SIG_ADSUF), SIG_ADIDX + +#define SIG_PSPIF SIG_PIR(SIG_PSPSUF), SIG_PSPIDX +#define SIG_PSPIE SIG_PIE(SIG_PSPSUF), SIG_PSPIDX +#define SIG_PSPIP SIG_IPR(SIG_PSPSUF), SIG_PSPIDX + +#define SIG_CCP2IF SIG_PIR(SIG_CCP2SUF), SIG_CCP2IDX +#define SIG_CCP2IE SIG_PIE(SIG_CCP2SUF), SIG_CCP2IDX +#define SIG_CCP2IP SIG_IPR(SIG_CCP2SUF), SIG_CCP2IDX + +#define SIG_TMR3IF SIG_PIR(SIG_TMR3SUF), SIG_TMR3IDX +#define SIG_TMR3IE SIG_PIE(SIG_TMR3SUF), SIG_TMR3IDX +#define SIG_TMR3IP SIG_IPR(SIG_TMR3SUF), SIG_TMR3IDX + +#define SIG_LVDIF SIG_PIR(SIG_LVDSUF), SIG_LVDIDX +#define SIG_LVDIE SIG_PIE(SIG_LVDSUF), SIG_LVDIDX +#define SIG_LVDIP SIG_IPR(SIG_LVDSUF), SIG_LVDIDX + +#define SIG_BCOLIF SIG_PIR(SIG_BCOLSUF), SIG_BCOLIDX +#define SIG_BCOLIE SIG_PIE(SIG_BCOLSUF), SIG_BCOLIDX +#define SIG_BCOLIP SIG_IPR(SIG_BCOLSUF), SIG_BCOLIDX + +#define SIG_EEIF SIG_PIR(SIG_EESUF), SIG_EEIDX +#define SIG_EEIE SIG_PIE(SIG_EESUF), SIG_EEIDX +#define SIG_EEIP SIG_IPR(SIG_EESUF), SIG_EEIDX + +#define SIG_USBIF SIG_PIR(SIG_USBSUF), SIG_USBIDX +#define SIG_USBIE SIG_PIE(SIG_USBSUF), SIG_USBIDX +#define SIG_USBIP SIG_IPR(SIG_USBSUF), SIG_USBIDX + #endif /* __SIGNAL_H__ */ diff --git a/device/lib/pic16/debug/gstack/gstack.c b/device/lib/pic16/debug/gstack/gstack.c index 9cd8b16a..28b6b803 100644 --- a/device/lib/pic16/debug/gstack/gstack.c +++ b/device/lib/pic16/debug/gstack/gstack.c @@ -59,9 +59,9 @@ char _gstack_succ_str[]="Stack ok\n"; static -void _gstack_overflow_default(void) _naked +void _gstack_overflow_default(void) __naked { - _asm + __asm lfsr 0, __gstack_fail_str ; incf _FSR0L, f @@ -74,15 +74,15 @@ void _gstack_overflow_default(void) _naked @00: goto @00 - _endasm ; + __endasm ; } void (* _gstack_overflow)(void)=_gstack_overflow_default; -void _gstack_init(void) _naked +void _gstack_init(void) __naked { - _asm + __asm movlw LOW(_stack) movwf __gstack_begin @@ -111,13 +111,13 @@ void _gstack_init(void) _naked movwf __init_ok return; - _endasm ; + __endasm ; } -void _gstack_test(void) _naked +void _gstack_test(void) __naked { - _asm + __asm movff _WREG, __wreg_store movff _STATUS, __status_store @@ -195,5 +195,5 @@ ret_lab: return - _endasm ; + __endasm ; } diff --git a/device/lib/pic16/libc/stdlib/calloc.c b/device/lib/pic16/libc/stdlib/calloc.c index d3be5799..91112911 100644 --- a/device/lib/pic16/libc/stdlib/calloc.c +++ b/device/lib/pic16/libc/stdlib/calloc.c @@ -32,16 +32,13 @@ unsigned char _MALLOC_SPEC *calloc(unsigned char len) { unsigned char _MALLOC_SPEC *result, *ch; - if(len >= MAX_BLOCK_SIZE)return ((unsigned char _MALLOC_SPEC *)0); + if (len >= MAX_BLOCK_SIZE) return ((unsigned char _MALLOC_SPEC *)0); ch = malloc( len ); result = ch; - if(result != 0) { - while(len) { - len--; - *ch = 0; - *ch = 1; - ch++; + if (result != 0) { + while (len) { + --len; *ch = 0; ch++; } diff --git a/device/lib/pic16/libc/stdlib/malloc.c b/device/lib/pic16/libc/stdlib/malloc.c index cd355ced..23e3aeb9 100644 --- a/device/lib/pic16/libc/stdlib/malloc.c +++ b/device/lib/pic16/libc/stdlib/malloc.c @@ -88,7 +88,7 @@ unsigned char _MALLOC_SPEC *malloc(unsigned char len) /* otherwise proceed with next block */ goto do_continue; - pHeap = temp; + //pHeap = temp; /* temp == pHeap */ bLen = pHeap->bits.count; } @@ -109,7 +109,6 @@ unsigned char _MALLOC_SPEC *malloc(unsigned char len) do_continue: pHeap = (_malloc_rec _MALLOC_SPEC *)((unsigned int)pHeap + bLen); - //pHeap->bits.count); } do_end: diff --git a/device/lib/pic16/libc/stdlib/memfree.c b/device/lib/pic16/libc/stdlib/memfree.c index fe710705..81663beb 100644 --- a/device/lib/pic16/libc/stdlib/memfree.c +++ b/device/lib/pic16/libc/stdlib/memfree.c @@ -32,14 +32,15 @@ unsigned int memfree(void) { _malloc_rec _MALLOC_SPEC *pHeap; unsigned int hsize=0; + unsigned char bLen; pHeap = (_malloc_rec _MALLOC_SPEC *)&heap; - while(pHeap->datum) { + while ((bLen = pHeap->bits.count)) { if(!pHeap->bits.alloc) - hsize += pHeap->bits.count; + hsize += bLen - 1; - pHeap = (_malloc_rec _MALLOC_SPEC *)((unsigned int)pHeap + pHeap->bits.count); + pHeap = (_malloc_rec _MALLOC_SPEC *)((unsigned int)pHeap + bLen); } return (hsize); diff --git a/device/lib/pic16/libc/stdlib/memfreemax.c b/device/lib/pic16/libc/stdlib/memfreemax.c index bd25918b..ea7eb101 100644 --- a/device/lib/pic16/libc/stdlib/memfreemax.c +++ b/device/lib/pic16/libc/stdlib/memfreemax.c @@ -31,17 +31,20 @@ extern unsigned char _MALLOC_SPEC *heap; unsigned int memfreemax(void) { _malloc_rec _MALLOC_SPEC *pHeap; - unsigned int maxSize=0; + unsigned char maxSize = 1; + unsigned char bLen; pHeap = (_malloc_rec _MALLOC_SPEC *)&heap; - while(pHeap->datum) { - if(!pHeap->bits.alloc - && pHeap->bits.count > maxSize) - maxSize = pHeap->bits.count; + while ((bLen = pHeap->bits.count)) { + if(!pHeap->bits.alloc && (bLen > maxSize)) + maxSize = bLen; - pHeap = (_malloc_rec _MALLOC_SPEC *)((unsigned int)pHeap + pHeap->bits.count); + pHeap = (_malloc_rec _MALLOC_SPEC *)((unsigned int)pHeap + bLen); } + /* do not count the block header */ + --maxSize; + return (maxSize); } diff --git a/device/lib/pic16/libc/stdlib/memmisc.c b/device/lib/pic16/libc/stdlib/memmisc.c index fe341ad1..ca907920 100644 --- a/device/lib/pic16/libc/stdlib/memmisc.c +++ b/device/lib/pic16/libc/stdlib/memmisc.c @@ -33,27 +33,28 @@ void _initHeap(unsigned char _MALLOC_SPEC *dheap, unsigned int heapsize) int bsize; pHeap = (_malloc_rec _MALLOC_SPEC *)dheap; + if (heapsize == 0) return; + /* we need one byte as the end of block list marker */ + heapsize--; - while(hsize < heapsize-1) { - + while (hsize < heapsize) { /* a guess of the next block size */ - bsize = (heapsize - hsize); - if(bsize > MAX_BLOCK_SIZE)bsize = MAX_BLOCK_SIZE; - else bsize--; - - if(bsize < 0)return; + bsize = (heapsize - hsize); /* thus: bsize > 0 */ + if(bsize > MAX_BLOCK_SIZE) bsize = MAX_BLOCK_SIZE; /* now we can create the block */ pHeap->datum = bsize; pHeap = (_malloc_rec _MALLOC_SPEC *)((unsigned int)pHeap + bsize); hsize += bsize; - if(!bsize)break; } + + /* mark end of block list */ + pHeap->datum = 0; } /* search heap starting from sBlock for a block of size bSize, merging - * adjacent blocks if ne necessery */ + * adjacent blocks if necessery */ _malloc_rec _MALLOC_SPEC *_mergeHeapBlock(_malloc_rec _MALLOC_SPEC *sBlock, unsigned char bSize) { _malloc_rec _MALLOC_SPEC *temp; @@ -67,7 +68,7 @@ _malloc_rec _MALLOC_SPEC *_mergeHeapBlock(_malloc_rec _MALLOC_SPEC *sBlock, unsi * blocks to make it fit */ temp = (_malloc_rec _MALLOC_SPEC *)((unsigned int)sBlock + bLen); //sBlock->bits.count); eLen = bLen; - while((temp->datum) && (!temp->bits.alloc) && (eLen < bSize)) { + while((temp->datum) && (!temp->bits.alloc) && (eLen <= bSize)) { eLen += (dat=temp->bits.count); temp = (_malloc_rec _MALLOC_SPEC *)((unsigned int)temp + dat); } diff --git a/device/lib/pic16/libc/stdlib/realloc.c b/device/lib/pic16/libc/stdlib/realloc.c index be3b3ebb..6b403544 100644 --- a/device/lib/pic16/libc/stdlib/realloc.c +++ b/device/lib/pic16/libc/stdlib/realloc.c @@ -34,37 +34,24 @@ unsigned char _MALLOC_SPEC *realloc(unsigned char _MALLOC_SPEC *mblock, unsigned _malloc_rec _MALLOC_SPEC *temp; unsigned char bLen; /* size of block */ - if(len >= MAX_BLOCK_SIZE) - return ((unsigned char _MALLOC_SPEC *)0); - - /* if mblock is NULL, then same as malloc */ - if(!mblock) - return (malloc(len)); - - /* if len is 0, */ - if(len == 0) { - free(mblock); - return (malloc(0)); - } - - len++; /* increase to count header too */ - - pHeap = (_malloc_rec _MALLOC_SPEC *)((unsigned int)mblock - 1); - bLen = pHeap->bits.count; + if(len >= MAX_BLOCK_SIZE) + return ((unsigned char _MALLOC_SPEC *)0); - /* new size is same as old, return pointer */ - if(bLen == len)return (mblock); + /* if mblock is NULL, then same as malloc */ + if(!mblock) + return (malloc(len)); - if(bLen > len) { - /* new segment is smaller than the old one, that's easy! */ - pHeap->bits.count = len; - temp = (_malloc_rec _MALLOC_SPEC *)((unsigned int)pHeap + len); - temp->bits.alloc = 0; - temp->bits.count = bLen - len; - - return ((unsigned char _MALLOC_SPEC *)((unsigned int)pHeap + 1)); - } + /* if len is 0 */ + if(len == 0) { + free(mblock); + return ((unsigned char _MALLOC_SPEC *)0); + } + + pHeap = (_malloc_rec _MALLOC_SPEC *)((unsigned int)mblock - 1); + bLen = pHeap->bits.count; + /* block too small for len bytes + 1 byte header <===> bLen < len + 1 <===> blen <= len */ + if (bLen <= len) { /* so, new segment has size bigger than the old one, we can return a * valid pointer only when after the block there is an empty block that * can be merged to produce a new block of the requested size, otherwise @@ -76,20 +63,19 @@ unsigned char _MALLOC_SPEC *realloc(unsigned char _MALLOC_SPEC *mblock, unsigned return ((unsigned char _MALLOC_SPEC *)0); } - pHeap = temp; + //pHeap = temp; /* temp == pHeap */ bLen = pHeap->bits.count; - - /* allocate by filling the fields */ - pHeap->bits.count = len; - pHeap->bits.alloc = 1; + } - if(bLen > len) { - /* if current block size is greater than the requested one, - * create a new empty block at the end of the newly allocated */ - temp = (_malloc_rec _MALLOC_SPEC *)((unsigned int)pHeap + len); - temp->bits.count = bLen - len; - temp->bits.alloc = 0; - } + len++; /* increase to also count the header */ + + if(bLen > len) { + /* new segment is smaller than the old one (or the merged one), that's easy! */ + pHeap->bits.count = len; + temp = (_malloc_rec _MALLOC_SPEC *)((unsigned int)pHeap + len); + temp->bits.alloc = 0; + temp->bits.count = bLen - len; + } - return ((unsigned char _MALLOC_SPEC *)((unsigned int)pHeap + 1)); + return (mblock); } diff --git a/device/lib/pic16/libc/stdlib/x_ftoa.c b/device/lib/pic16/libc/stdlib/x_ftoa.c index e271f33f..af910736 100644 --- a/device/lib/pic16/libc/stdlib/x_ftoa.c +++ b/device/lib/pic16/libc/stdlib/x_ftoa.c @@ -47,11 +47,13 @@ extern FSR2H; #define _vv0x03 0x03 #define _vv0x04 0x04 +/* do not warn about unreferenced arguments/missing return values */ +#pragma save +#pragma disable_warning 59 +#pragma disable_warning 85 + char x_cnvint_wrap(unsigned long num, __data char *buffer) { - num; - buffer; - __asm movff _vv0x00, _POSTDEC1 movff _vv0x01, _POSTDEC1 @@ -124,7 +126,7 @@ char x_cnvfrac_wrap(unsigned long num, __data char *buffer, unsigned char prec) movff _PREINC1, _vv0x00 __endasm ; } - +#pragma restore union float_long { diff --git a/device/lib/pic16/libdev/pic18f2220.c b/device/lib/pic16/libdev/pic18f2220.c index f4ced161..0b5a8b4e 100644 --- a/device/lib/pic16/libdev/pic18f2220.c +++ b/device/lib/pic16/libdev/pic18f2220.c @@ -143,6 +143,8 @@ __sfr __at (0xfd3) OSCCON; volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; __sfr __at (0xfd5) T0CON; +volatile __T0CONbits_t __at (0xfd5) T0CONbits; + __sfr __at (0xfd6) TMR0L; __sfr __at (0xfd7) TMR0H; __sfr __at (0xfd8) STATUS; diff --git a/device/lib/pic16/libdev/pic18f2320.c b/device/lib/pic16/libdev/pic18f2320.c new file mode 100644 index 00000000..60adc136 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f2320.c @@ -0,0 +1,201 @@ + +/* + * pic18f2320.c - PIC18F2320 Device Library Source + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id$ + * + */ + +#include + +__sfr __at (0xf80) PORTA; +volatile __PORTAbits_t __at (0xf80) PORTAbits; + +__sfr __at (0xf81) PORTB; +volatile __PORTBbits_t __at (0xf81) PORTBbits; + +__sfr __at (0xf82) PORTC; +volatile __PORTCbits_t __at (0xf82) PORTCbits; + +__sfr __at (0xf89) LATA; +volatile __LATAbits_t __at (0xf89) LATAbits; + +__sfr __at (0xf8a) LATB; +volatile __LATBbits_t __at (0xf8a) LATBbits; + +__sfr __at (0xf8b) LATC; +volatile __LATCbits_t __at (0xf8b) LATCbits; + +__sfr __at (0xf92) TRISA; +volatile __TRISAbits_t __at (0xf92) TRISAbits; + +__sfr __at (0xf93) TRISB; +volatile __TRISBbits_t __at (0xf93) TRISBbits; + +__sfr __at (0xf94) TRISC; +volatile __TRISCbits_t __at (0xf94) TRISCbits; + +__sfr __at (0xf9b) OSCTUNE; +volatile __OSCTUNEbits_t __at (0xf9b) OSCTUNEbits; + +__sfr __at (0xf9d) PIE1; +volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +__sfr __at (0xf9e) PIR1; +volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +__sfr __at (0xf9f) IPR1; +volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +__sfr __at (0xfa0) PIE2; +volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +__sfr __at (0xfa1) PIR2; +volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +__sfr __at (0xfa2) IPR2; +volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +__sfr __at (0xfa6) EECON1; +volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +__sfr __at (0xfa7) EECON2; +__sfr __at (0xfa8) EEDATA; +__sfr __at (0xfa9) EEADR; +__sfr __at (0xfab) RCSTA; +volatile __RCSTAbits_t __at (0xfab) RCSTAbits; + +__sfr __at (0xfac) TXSTA; +volatile __TXSTAbits_t __at (0xfac) TXSTAbits; + +__sfr __at (0xfad) TXREG; +__sfr __at (0xfae) RCREG; +__sfr __at (0xfaf) SPBRG; +__sfr __at (0xfb1) T3CON; +volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +__sfr __at (0xfb2) TMR3L; +__sfr __at (0xfb3) TMR3H; +__sfr __at (0xfb4) CMCON; +volatile __CMCONbits_t __at (0xfb4) CMCONbits; + +__sfr __at (0xfb5) CVRCON; +volatile __CVRCONbits_t __at (0xfb5) CVRCONbits; + +__sfr __at (0xfba) CCP2CON; +volatile __CCP2CONbits_t __at (0xfba) CCP2CONbits; + +__sfr __at (0xfbb) CCPR2L; +__sfr __at (0xfbc) CCPR2H; +__sfr __at (0xfbd) CCP1CON; +volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits; + +__sfr __at (0xfbe) CCPR1L; +__sfr __at (0xfbf) CCPR1H; +__sfr __at (0xfc0) ADCON2; +volatile __ADCON2bits_t __at (0xfc0) ADCON2bits; + +__sfr __at (0xfc1) ADCON1; +volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +__sfr __at (0xfc2) ADCON0; +volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +__sfr __at (0xfc3) ADRESL; +__sfr __at (0xfc4) ADRESH; +__sfr __at (0xfc5) SSPCON2; +volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits; + +__sfr __at (0xfc6) SSPCON1; +volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits; + +__sfr __at (0xfc7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits; + +__sfr __at (0xfc8) SSPADD; +__sfr __at (0xfc9) SSPBUF; +__sfr __at (0xfca) T2CON; +volatile __T2CONbits_t __at (0xfca) T2CONbits; + +__sfr __at (0xfcb) PR2; +__sfr __at (0xfcc) TMR2; +__sfr __at (0xfcd) T1CON; +volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +__sfr __at (0xfce) TMR1L; +__sfr __at (0xfcf) TMR1H; +__sfr __at (0xfd0) RCON; +volatile __RCONbits_t __at (0xfd0) RCONbits; + +__sfr __at (0xfd1) WDTCON; +volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +__sfr __at (0xfd2) LVDCON; +volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +__sfr __at (0xfd3) OSCCON; +volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +__sfr __at (0xfd5) T0CON; +volatile __T0CONbits_t __at (0xfd5) T0CONbits; + +__sfr __at (0xfd6) TMR0L; +__sfr __at (0xfd7) TMR0H; +__sfr __at (0xfd8) STATUS; +volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +__sfr __at (0xfd9) FSR2L; +__sfr __at (0xfda) FSR2H; +__sfr __at (0xfdb) PLUSW2; +__sfr __at (0xfdc) PREINC2; +__sfr __at (0xfdd) POSTDEC2; +__sfr __at (0xfde) POSTINC2; +__sfr __at (0xfdf) INDF2; +__sfr __at (0xfe0) BSR; +__sfr __at (0xfe1) FSR1L; +__sfr __at (0xfe2) FSR1H; +__sfr __at (0xfe3) PLUSW1; +__sfr __at (0xfe4) PREINC1; +__sfr __at (0xfe5) POSTDEC1; +__sfr __at (0xfe6) POSTINC1; +__sfr __at (0xfe7) INDF1; +__sfr __at (0xfe8) WREG; +__sfr __at (0xfe9) FSR0L; +__sfr __at (0xfea) FSR0H; +__sfr __at (0xfeb) PLUSW0; +__sfr __at (0xfec) PREINC0; +__sfr __at (0xfed) POSTDEC0; +__sfr __at (0xfee) POSTINC0; +__sfr __at (0xfef) INDF0; +__sfr __at (0xff0) INTCON3; +volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +__sfr __at (0xff1) INTCON2; +volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +__sfr __at (0xff2) INTCON; +volatile __INTCONbits_t __at (0xff2) INTCONbits; + +__sfr __at (0xff3) PRODL; +__sfr __at (0xff4) PRODH; +__sfr __at (0xff5) TABLAT; +__sfr __at (0xff6) TBLPTRL; +__sfr __at (0xff7) TBLPTRH; +__sfr __at (0xff8) TBLPTRU; +__sfr __at (0xff9) PCL; +__sfr __at (0xffa) PCLATH; +__sfr __at (0xffb) PCLATU; +__sfr __at (0xffc) STKPTR; +volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +__sfr __at (0xffd) TOSL; +__sfr __at (0xffe) TOSH; +__sfr __at (0xfff) TOSU; + + diff --git a/device/lib/pic16/libdev/pic18f4220.c b/device/lib/pic16/libdev/pic18f4220.c new file mode 100644 index 00000000..7e6cd5ed --- /dev/null +++ b/device/lib/pic16/libdev/pic18f4220.c @@ -0,0 +1,222 @@ + +/* + * pic18f4220.c - PIC18F4220 Device Library Source + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id$ + * + */ + +#include + +__sfr __at (0xf80) PORTA; +volatile __PORTAbits_t __at (0xf80) PORTAbits; + +__sfr __at (0xf81) PORTB; +volatile __PORTBbits_t __at (0xf81) PORTBbits; + +__sfr __at (0xf82) PORTC; +volatile __PORTCbits_t __at (0xf82) PORTCbits; + +__sfr __at (0xf83) PORTD; +volatile __PORTDbits_t __at (0xf83) PORTDbits; + +__sfr __at (0xf84) PORTE; +volatile __PORTEbits_t __at (0xf84) PORTEbits; + +__sfr __at (0xf89) LATA; +volatile __LATAbits_t __at (0xf89) LATAbits; + +__sfr __at (0xf8a) LATB; +volatile __LATBbits_t __at (0xf8a) LATBbits; + +__sfr __at (0xf8b) LATC; +volatile __LATCbits_t __at (0xf8b) LATCbits; + +__sfr __at (0xf8c) LATD; +volatile __LATDbits_t __at (0xf8c) LATDbits; + +__sfr __at (0xf8d) LATE; +volatile __LATEbits_t __at (0xf8d) LATEbits; + +__sfr __at (0xf92) TRISA; +volatile __TRISAbits_t __at (0xf92) TRISAbits; + +__sfr __at (0xf93) TRISB; +volatile __TRISBbits_t __at (0xf93) TRISBbits; + +__sfr __at (0xf94) TRISC; +volatile __TRISCbits_t __at (0xf94) TRISCbits; + +__sfr __at (0xf9b) OSCTUNE; +volatile __OSCTUNEbits_t __at (0xf9b) OSCTUNEbits; + +__sfr __at (0xf9d) PIE1; +volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +__sfr __at (0xf9e) PIR1; +volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +__sfr __at (0xf9f) IPR1; +volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +__sfr __at (0xfa0) PIE2; +volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +__sfr __at (0xfa1) PIR2; +volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +__sfr __at (0xfa2) IPR2; +volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +__sfr __at (0xfa6) EECON1; +volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +__sfr __at (0xfa7) EECON2; +__sfr __at (0xfa8) EEDATA; +__sfr __at (0xfa9) EEADR; +__sfr __at (0xfab) RCSTA; +volatile __RCSTAbits_t __at (0xfab) RCSTAbits; + +__sfr __at (0xfac) TXSTA; +volatile __TXSTAbits_t __at (0xfac) TXSTAbits; + +__sfr __at (0xfad) TXREG; +__sfr __at (0xfae) RCREG; +__sfr __at (0xfaf) SPBRG; +__sfr __at (0xfb1) T3CON; +volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +__sfr __at (0xfb2) TMR3L; +__sfr __at (0xfb3) TMR3H; +__sfr __at (0xfb4) CMCON; +volatile __CMCONbits_t __at (0xfb4) CMCONbits; + +__sfr __at (0xfb5) CVRCON; +volatile __CVRCONbits_t __at (0xfb5) CVRCONbits; + +__sfr __at (0xfba) CCP2CON; +volatile __CCP2CONbits_t __at (0xfba) CCP2CONbits; + +__sfr __at (0xfb7) PWM1CON; +volatile __PWM1CONbits_t __at (0xfb7) PWM1CONbits; + +__sfr __at (0xfb6) ECCPAS; +volatile __ECCPASbits_t __at (0xfb6) ECCPASbits; + +__sfr __at (0xfba) CCP2CON; +volatile __CCP2CONbits_t __at (0xfba) CCP2CONbits; + +__sfr __at (0xfbb) CCPR2L; +__sfr __at (0xfbc) CCPR2H; +__sfr __at (0xfbd) CCP1CON; +volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits; + +__sfr __at (0xfbe) CCPR1L; +__sfr __at (0xfbf) CCPR1H; +__sfr __at (0xfc0) ADCON2; +volatile __ADCON2bits_t __at (0xfc0) ADCON2bits; + +__sfr __at (0xfc1) ADCON1; +volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +__sfr __at (0xfc2) ADCON0; +volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +__sfr __at (0xfc3) ADRESL; +__sfr __at (0xfc4) ADRESH; +__sfr __at (0xfc5) SSPCON2; +volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits; + +__sfr __at (0xfc6) SSPCON1; +volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits; + +__sfr __at (0xfc7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits; + +__sfr __at (0xfc8) SSPADD; +__sfr __at (0xfc9) SSPBUF; +__sfr __at (0xfca) T2CON; +volatile __T2CONbits_t __at (0xfca) T2CONbits; + +__sfr __at (0xfcb) PR2; +__sfr __at (0xfcc) TMR2; +__sfr __at (0xfcd) T1CON; +volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +__sfr __at (0xfce) TMR1L; +__sfr __at (0xfcf) TMR1H; +__sfr __at (0xfd0) RCON; +volatile __RCONbits_t __at (0xfd0) RCONbits; + +__sfr __at (0xfd1) WDTCON; +volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +__sfr __at (0xfd2) LVDCON; +volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +__sfr __at (0xfd3) OSCCON; +volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +__sfr __at (0xfd5) T0CON; +volatile __T0CONbits_t __at (0xfd5) T0CONbits; + +__sfr __at (0xfd6) TMR0L; +__sfr __at (0xfd7) TMR0H; +__sfr __at (0xfd8) STATUS; +volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +__sfr __at (0xfd9) FSR2L; +__sfr __at (0xfda) FSR2H; +__sfr __at (0xfdb) PLUSW2; +__sfr __at (0xfdc) PREINC2; +__sfr __at (0xfdd) POSTDEC2; +__sfr __at (0xfde) POSTINC2; +__sfr __at (0xfdf) INDF2; +__sfr __at (0xfe0) BSR; +__sfr __at (0xfe1) FSR1L; +__sfr __at (0xfe2) FSR1H; +__sfr __at (0xfe3) PLUSW1; +__sfr __at (0xfe4) PREINC1; +__sfr __at (0xfe5) POSTDEC1; +__sfr __at (0xfe6) POSTINC1; +__sfr __at (0xfe7) INDF1; +__sfr __at (0xfe8) WREG; +__sfr __at (0xfe9) FSR0L; +__sfr __at (0xfea) FSR0H; +__sfr __at (0xfeb) PLUSW0; +__sfr __at (0xfec) PREINC0; +__sfr __at (0xfed) POSTDEC0; +__sfr __at (0xfee) POSTINC0; +__sfr __at (0xfef) INDF0; +__sfr __at (0xff0) INTCON3; +volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +__sfr __at (0xff1) INTCON2; +volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +__sfr __at (0xff2) INTCON; +volatile __INTCONbits_t __at (0xff2) INTCONbits; + +__sfr __at (0xff3) PRODL; +__sfr __at (0xff4) PRODH; +__sfr __at (0xff5) TABLAT; +__sfr __at (0xff6) TBLPTRL; +__sfr __at (0xff7) TBLPTRH; +__sfr __at (0xff8) TBLPTRU; +__sfr __at (0xff9) PCL; +__sfr __at (0xffa) PCLATH; +__sfr __at (0xffb) PCLATU; +__sfr __at (0xffc) STKPTR; +volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +__sfr __at (0xffd) TOSL; +__sfr __at (0xffe) TOSH; +__sfr __at (0xfff) TOSU; + + diff --git a/device/lib/pic16/libdev/pic18f4320.c b/device/lib/pic16/libdev/pic18f4320.c new file mode 100644 index 00000000..02a86074 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f4320.c @@ -0,0 +1,222 @@ + +/* + * pic18f4320.c - PIC18F4320 Device Library Source + * + * This file is part of the GNU PIC Library. + * + * January, 2004 + * The GNU PIC Library is maintained by, + * Vangelis Rokas + * + * $Id$ + * + */ + +#include + +__sfr __at (0xf80) PORTA; +volatile __PORTAbits_t __at (0xf80) PORTAbits; + +__sfr __at (0xf81) PORTB; +volatile __PORTBbits_t __at (0xf81) PORTBbits; + +__sfr __at (0xf82) PORTC; +volatile __PORTCbits_t __at (0xf82) PORTCbits; + +__sfr __at (0xf83) PORTD; +volatile __PORTDbits_t __at (0xf83) PORTDbits; + +__sfr __at (0xf84) PORTE; +volatile __PORTEbits_t __at (0xf84) PORTEbits; + +__sfr __at (0xf89) LATA; +volatile __LATAbits_t __at (0xf89) LATAbits; + +__sfr __at (0xf8a) LATB; +volatile __LATBbits_t __at (0xf8a) LATBbits; + +__sfr __at (0xf8b) LATC; +volatile __LATCbits_t __at (0xf8b) LATCbits; + +__sfr __at (0xf8c) LATD; +volatile __LATDbits_t __at (0xf8c) LATDbits; + +__sfr __at (0xf8d) LATE; +volatile __LATEbits_t __at (0xf8d) LATEbits; + +__sfr __at (0xf92) TRISA; +volatile __TRISAbits_t __at (0xf92) TRISAbits; + +__sfr __at (0xf93) TRISB; +volatile __TRISBbits_t __at (0xf93) TRISBbits; + +__sfr __at (0xf94) TRISC; +volatile __TRISCbits_t __at (0xf94) TRISCbits; + +__sfr __at (0xf9b) OSCTUNE; +volatile __OSCTUNEbits_t __at (0xf9b) OSCTUNEbits; + +__sfr __at (0xf9d) PIE1; +volatile __PIE1bits_t __at (0xf9d) PIE1bits; + +__sfr __at (0xf9e) PIR1; +volatile __PIR1bits_t __at (0xf9e) PIR1bits; + +__sfr __at (0xf9f) IPR1; +volatile __IPR1bits_t __at (0xf9f) IPR1bits; + +__sfr __at (0xfa0) PIE2; +volatile __PIE2bits_t __at (0xfa0) PIE2bits; + +__sfr __at (0xfa1) PIR2; +volatile __PIR2bits_t __at (0xfa1) PIR2bits; + +__sfr __at (0xfa2) IPR2; +volatile __IPR2bits_t __at (0xfa2) IPR2bits; + +__sfr __at (0xfa6) EECON1; +volatile __EECON1bits_t __at (0xfa6) EECON1bits; + +__sfr __at (0xfa7) EECON2; +__sfr __at (0xfa8) EEDATA; +__sfr __at (0xfa9) EEADR; +__sfr __at (0xfab) RCSTA; +volatile __RCSTAbits_t __at (0xfab) RCSTAbits; + +__sfr __at (0xfac) TXSTA; +volatile __TXSTAbits_t __at (0xfac) TXSTAbits; + +__sfr __at (0xfad) TXREG; +__sfr __at (0xfae) RCREG; +__sfr __at (0xfaf) SPBRG; +__sfr __at (0xfb1) T3CON; +volatile __T3CONbits_t __at (0xfb1) T3CONbits; + +__sfr __at (0xfb2) TMR3L; +__sfr __at (0xfb3) TMR3H; +__sfr __at (0xfb4) CMCON; +volatile __CMCONbits_t __at (0xfb4) CMCONbits; + +__sfr __at (0xfb5) CVRCON; +volatile __CVRCONbits_t __at (0xfb5) CVRCONbits; + +__sfr __at (0xfba) CCP2CON; +volatile __CCP2CONbits_t __at (0xfba) CCP2CONbits; + +__sfr __at (0xfb7) PWM1CON; +volatile __PWM1CONbits_t __at (0xfb7) PWM1CONbits; + +__sfr __at (0xfb6) ECCPAS; +volatile __ECCPASbits_t __at (0xfb6) ECCPASbits; + +__sfr __at (0xfba) CCP2CON; +volatile __CCP2CONbits_t __at (0xfba) CCP2CONbits; + +__sfr __at (0xfbb) CCPR2L; +__sfr __at (0xfbc) CCPR2H; +__sfr __at (0xfbd) CCP1CON; +volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits; + +__sfr __at (0xfbe) CCPR1L; +__sfr __at (0xfbf) CCPR1H; +__sfr __at (0xfc0) ADCON2; +volatile __ADCON2bits_t __at (0xfc0) ADCON2bits; + +__sfr __at (0xfc1) ADCON1; +volatile __ADCON1bits_t __at (0xfc1) ADCON1bits; + +__sfr __at (0xfc2) ADCON0; +volatile __ADCON0bits_t __at (0xfc2) ADCON0bits; + +__sfr __at (0xfc3) ADRESL; +__sfr __at (0xfc4) ADRESH; +__sfr __at (0xfc5) SSPCON2; +volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits; + +__sfr __at (0xfc6) SSPCON1; +volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits; + +__sfr __at (0xfc7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits; + +__sfr __at (0xfc8) SSPADD; +__sfr __at (0xfc9) SSPBUF; +__sfr __at (0xfca) T2CON; +volatile __T2CONbits_t __at (0xfca) T2CONbits; + +__sfr __at (0xfcb) PR2; +__sfr __at (0xfcc) TMR2; +__sfr __at (0xfcd) T1CON; +volatile __T1CONbits_t __at (0xfcd) T1CONbits; + +__sfr __at (0xfce) TMR1L; +__sfr __at (0xfcf) TMR1H; +__sfr __at (0xfd0) RCON; +volatile __RCONbits_t __at (0xfd0) RCONbits; + +__sfr __at (0xfd1) WDTCON; +volatile __WDTCONbits_t __at (0xfd1) WDTCONbits; + +__sfr __at (0xfd2) LVDCON; +volatile __LVDCONbits_t __at (0xfd2) LVDCONbits; + +__sfr __at (0xfd3) OSCCON; +volatile __OSCCONbits_t __at (0xfd3) OSCCONbits; + +__sfr __at (0xfd5) T0CON; +volatile __T0CONbits_t __at (0xfd5) T0CONbits; + +__sfr __at (0xfd6) TMR0L; +__sfr __at (0xfd7) TMR0H; +__sfr __at (0xfd8) STATUS; +volatile __STATUSbits_t __at (0xfd8) STATUSbits; + +__sfr __at (0xfd9) FSR2L; +__sfr __at (0xfda) FSR2H; +__sfr __at (0xfdb) PLUSW2; +__sfr __at (0xfdc) PREINC2; +__sfr __at (0xfdd) POSTDEC2; +__sfr __at (0xfde) POSTINC2; +__sfr __at (0xfdf) INDF2; +__sfr __at (0xfe0) BSR; +__sfr __at (0xfe1) FSR1L; +__sfr __at (0xfe2) FSR1H; +__sfr __at (0xfe3) PLUSW1; +__sfr __at (0xfe4) PREINC1; +__sfr __at (0xfe5) POSTDEC1; +__sfr __at (0xfe6) POSTINC1; +__sfr __at (0xfe7) INDF1; +__sfr __at (0xfe8) WREG; +__sfr __at (0xfe9) FSR0L; +__sfr __at (0xfea) FSR0H; +__sfr __at (0xfeb) PLUSW0; +__sfr __at (0xfec) PREINC0; +__sfr __at (0xfed) POSTDEC0; +__sfr __at (0xfee) POSTINC0; +__sfr __at (0xfef) INDF0; +__sfr __at (0xff0) INTCON3; +volatile __INTCON3bits_t __at (0xff0) INTCON3bits; + +__sfr __at (0xff1) INTCON2; +volatile __INTCON2bits_t __at (0xff1) INTCON2bits; + +__sfr __at (0xff2) INTCON; +volatile __INTCONbits_t __at (0xff2) INTCONbits; + +__sfr __at (0xff3) PRODL; +__sfr __at (0xff4) PRODH; +__sfr __at (0xff5) TABLAT; +__sfr __at (0xff6) TBLPTRL; +__sfr __at (0xff7) TBLPTRH; +__sfr __at (0xff8) TBLPTRU; +__sfr __at (0xff9) PCL; +__sfr __at (0xffa) PCLATH; +__sfr __at (0xffb) PCLATU; +__sfr __at (0xffc) STKPTR; +volatile __STKPTRbits_t __at (0xffc) STKPTRbits; + +__sfr __at (0xffd) TOSL; +__sfr __at (0xffe) TOSH; +__sfr __at (0xfff) TOSU; + + diff --git a/device/lib/pic16/libio/usart/ubaud.c b/device/lib/pic16/libio/usart/ubaud.c index 9271a044..c02d3d6f 100644 --- a/device/lib/pic16/libio/usart/ubaud.c +++ b/device/lib/pic16/libio/usart/ubaud.c @@ -32,5 +32,5 @@ void usart_baud(unsigned char baudconfig) __wparam { - BAUDREG = baudconfig; + SPBRG = baudconfig; } diff --git a/device/lib/pic16/libsdcc/lregs/lrrest.c b/device/lib/pic16/libsdcc/lregs/lrrest.c index f3c21cdd..02f27377 100644 --- a/device/lib/pic16/libsdcc/lregs/lrrest.c +++ b/device/lib/pic16/libsdcc/lregs/lrrest.c @@ -33,14 +33,14 @@ extern PREINC1; extern POSTDEC0; extern WREG; -void _lr_restore(void) _naked +void _lr_restore(void) __naked { - _asm + __asm loop: movff _PREINC1, _POSTDEC0 decfsz _WREG, f bra loop return - _endasm; + __endasm; } diff --git a/device/lib/pic16/libsdcc/lregs/lrst.c b/device/lib/pic16/libsdcc/lregs/lrst.c index 72528055..c454889b 100644 --- a/device/lib/pic16/libsdcc/lregs/lrst.c +++ b/device/lib/pic16/libsdcc/lregs/lrst.c @@ -33,14 +33,14 @@ extern POSTDEC1; extern POSTINC0; extern WREG; -void _lr_store(void) _naked +void _lr_store(void) __naked { - _asm + __asm loop: movff _POSTINC0, _POSTDEC1 decfsz _WREG, f bra loop return - _endasm; + __endasm; } diff --git a/device/lib/pic16/pics.all b/device/lib/pic16/pics.all index 741f5bc0..f8971ae5 100644 --- a/device/lib/pic16/pics.all +++ b/device/lib/pic16/pics.all @@ -11,9 +11,12 @@ 1220 2220 +2320 2455 2550 +4220 +4320 4331 4455 4520 diff --git a/src/pic16/device.c b/src/pic16/device.c index a2617244..abf38404 100644 --- a/src/pic16/device.c +++ b/src/pic16/device.c @@ -280,6 +280,28 @@ static PIC16_device Pics16[] = { { 0, 0 }, { 0, 0 }, { 0, 0 } } } }, + { + {"p18f2320", "18f2320", "pic18f2320", "f2320"}, + 0, + 0x200, /* 512 */ + 0x80, + 0, + { 0xf80, 0xfff }, /* PIC18F2320 range of SFR's */ + { + /* PIC18F2320 configuration words */ + 0x300001, + 0x30000d, + { { 0xcf, 0, 0xff } /* 1 */ , { 0x0f, 0, 0xff } /* 2 */ , { 0x1f, 0, 0xff } /* 3 */ , + { -1, 0, 0xff } /* 4 */ , { 0x83, 0, 0xff } /* 5 */ , { 0x85, 0, 0xff } /* 6 */ , + { -1, 0, 0xff } /* 7 */ , { 0x0f, 0, 0xff } /* 8 */ , { 0xc0, 0, 0xff } /* 9 */ , + { 0x0f, 0, 0xff } /* a */ , { 0xe0, 0, 0xff } /* b */ , { 0x0f, 0, 0xff } /* c */ , + { 0x40, 0, 0xff } /* d */ } + }, + { 0x200000, 0x200007, + { { 0, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 }, + { 0, 0 }, { 0, 0 }, { 0, 0 } } + } + }, { {"p18f2455", "18f2455", "pic18f2455", "f2455"}, 0, @@ -324,6 +346,50 @@ static PIC16_device Pics16[] = { { 0, 0 }, { 0, 0 }, { 0, 0 } } } }, + { + {"p18f4220", "18f4220", "pic18f4220", "f4220"}, + 0, + 0x200, /* 512 */ + 0x80, + 0, + { 0xf80, 0xfff }, /* PIC18F4220 range of SFR's */ + { + /* PIC18F4220 configuration words */ + 0x300001, + 0x30000d, + { { 0xcf, 0, 0xff } /* 1 */ , { 0x0f, 0, 0xff } /* 2 */ , { 0x1f, 0, 0xff } /* 3 */ , + { -1, 0, 0xff } /* 4 */ , { 0x83, 0, 0xff } /* 5 */ , { 0x85, 0, 0xff } /* 6 */ , + { -1, 0, 0xff } /* 7 */ , { 0x0f, 0, 0xff } /* 8 */ , { 0xc0, 0, 0xff } /* 9 */ , + { 0x0f, 0, 0xff } /* a */ , { 0xe0, 0, 0xff } /* b */ , { 0x0f, 0, 0xff } /* c */ , + { 0x40, 0, 0xff } /* d */ } + }, + { 0x200000, 0x200007, + { { 0, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 }, + { 0, 0 }, { 0, 0 }, { 0, 0 } } + } + }, + { + {"p18f4320", "18f4320", "pic18f4320", "f4320"}, + 0, + 0x200, /* 512 */ + 0x80, + 0, + { 0xf80, 0xfff }, /* PIC18F4320 range of SFR's */ + { + /* PIC18F4320 configuration words */ + 0x300001, + 0x30000d, + { { 0xcf, 0, 0xff } /* 1 */ , { 0x0f, 0, 0xff } /* 2 */ , { 0x1f, 0, 0xff } /* 3 */ , + { -1, 0, 0xff } /* 4 */ , { 0x83, 0, 0xff } /* 5 */ , { 0x85, 0, 0xff } /* 6 */ , + { -1, 0, 0xff } /* 7 */ , { 0x0f, 0, 0xff } /* 8 */ , { 0xc0, 0, 0xff } /* 9 */ , + { 0x0f, 0, 0xff } /* a */ , { 0xe0, 0, 0xff } /* b */ , { 0x0f, 0, 0xff } /* c */ , + { 0x40, 0, 0xff } /* d */ } + }, + { 0x200000, 0x200007, + { { 0, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 }, + { 0, 0 }, { 0, 0 }, { 0, 0 } } + } + }, { {"p18f4331", "18f4331", "pic18f4331", "f4331"}, 0, diff --git a/src/pic16/gen.c b/src/pic16/gen.c index 75b9b3a7..570188af 100644 --- a/src/pic16/gen.c +++ b/src/pic16/gen.c @@ -9886,12 +9886,7 @@ static void genrshTwo (operand *result,operand *left, else movLeft2Result(left, MSB16, result, LSB); - pic16_emitpcode(POC_CLRF,pic16_popGet(AOP(result),MSB16)); - - if(sign) { - pic16_emitpcode(POC_BTFSC,pic16_newpCodeOpBit(pic16_aopGet(AOP(left),LSB,FALSE,FALSE),7,0, PO_GPR_REGISTER)); - pic16_emitpcode(POC_SETF, pic16_popGet(AOP(result),MSB16)); - } + pic16_addSign (result, 1, sign); } /* 1 <= shCount <= 7 */ -- 2.30.2