From 01c5178e097126448f1fd794cdc93e933a6e7dc7 Mon Sep 17 00:00:00 2001 From: sdattalo Date: Tue, 30 Jul 2002 12:19:43 +0000 Subject: [PATCH] - Register banking wasn't working for bit variables were. - Register banking at a return instruction was broken. git-svn-id: https://sdcc.svn.sourceforge.net/svnroot/sdcc/trunk/sdcc@2050 4a8a32a2-be11-0410-ad9d-d568d2c75423 --- src/pic/device.c | 2 +- src/pic/device.h | 7 +-- src/pic/pcode.c | 121 +++++++++++++++++++++++++++++++++-------------- src/pic/ralloc.c | 5 +- 4 files changed, 93 insertions(+), 42 deletions(-) diff --git a/src/pic/device.c b/src/pic/device.c index fe0ef872..ad21be45 100644 --- a/src/pic/device.c +++ b/src/pic/device.c @@ -416,7 +416,7 @@ int validAddress(int address, int reg_size) fprintf(stderr, "missing \"#pragma maxram\" setting\n"); return 0; } - + // fprintf(stderr, "validAddress: Checking 0x%04x\n",address); if(address > pic->maxRAMaddress) return 0; diff --git a/src/pic/device.h b/src/pic/device.h index 591181a8..8ee30e43 100644 --- a/src/pic/device.h +++ b/src/pic/device.h @@ -86,9 +86,10 @@ typedef struct PIC_device { } PIC_device; /* Given a pointer to a register, this macro returns the bank that it is in */ -#define REG_BANK(r) (finalMapping[(r)->address].bank) -#define REG_isALIASED(r) (finalMapping[(r)->address].alias != 0) -#define REG_isVALID(r) (finalMapping[(r)->address].isValid) +#define REG_ADDR(r) ((r)->isBitField ? (((r)->address)>>3) : (r)->address) +#define REG_BANK(r) (finalMapping[REG_ADDR(r)].bank) +#define REG_isALIASED(r) (finalMapping[REG_ADDR(r)].alias != 0) +#define REG_isVALID(r) (finalMapping[REG_ADDR(r)].isValid) /****************************************/ diff --git a/src/pic/pcode.c b/src/pic/pcode.c index 3dcb4748..066ad633 100644 --- a/src/pic/pcode.c +++ b/src/pic/pcode.c @@ -3824,7 +3824,7 @@ void BanksUsedFlow(pBlock *pb) /*-----------------------------------------------------------------*/ /*-----------------------------------------------------------------*/ -void insertBankSwitch(pCode *pc, int Set_Clear, int RP_BankBit) +void insertBankSwitch(int position, pCode *pc, int Set_Clear, int RP_BankBit) { pCode *new_pc; @@ -3837,7 +3837,15 @@ void insertBankSwitch(pCode *pc, int Set_Clear, int RP_BankBit) new_pc = newpCode((Set_Clear ? POC_BSF : POC_BCF), popCopyGPR2Bit(PCOP(&pc_status),RP_BankBit)); - pCodeInsertAfter(pc->prev, new_pc); + if(position) { + /* insert the bank switch after this pc instruction */ + pCode *pcnext = findNextInstruction(pc); + pCodeInsertAfter(pc, new_pc); + if(pcnext) + pc = pcnext; + + } else + pCodeInsertAfter(pc->prev, new_pc); /* Move the label, if there is one */ @@ -3890,18 +3898,18 @@ void FixRegisterBankingInFlow(pCodeFlow *pcfl, int cur_bank) case 0: break; case 1: - insertBankSwitch(pc, cur_bank&1, PIC_RP0_BIT); + insertBankSwitch(0, pc, cur_bank&1, PIC_RP0_BIT); break; case 2: - insertBankSwitch(pc, cur_bank&2, PIC_RP1_BIT); - insertBankSwitch(pc, cur_bank&2, PIC_RP1_BIT); + insertBankSwitch(0, pc, cur_bank&2, PIC_RP1_BIT); + insertBankSwitch(0, pc, cur_bank&2, PIC_RP1_BIT); break; case 3: if(cur_bank & 3) { - insertBankSwitch(pc, cur_bank&1, PIC_RP0_BIT); - insertBankSwitch(pc, cur_bank&2, PIC_RP1_BIT); + insertBankSwitch(0, pc, cur_bank&1, PIC_RP0_BIT); + insertBankSwitch(0, pc, cur_bank&2, PIC_RP1_BIT); } else - insertBankSwitch(pc, -1, -1); + insertBankSwitch(0, pc, -1, -1); break; /* new_pc = newpCode(((cur_bank&1) ? POC_BSF : POC_BCF), @@ -4494,11 +4502,10 @@ void FixRegisterBanking(pBlock *pb) { pCode *pc=NULL; pCode *pcprev=NULL; - pCode *new_pc; int cur_bank; regs *reg; - // return; + if(!pb) return; @@ -4522,60 +4529,102 @@ void FixRegisterBanking(pBlock *pb) //genericPrint(stderr, pc); reg = getRegFromInstruction(pc); - #if 0 +#if 0 if(reg) { fprintf(stderr, " %s ",reg->name); - fprintf(stderr, "addr = 0x%03x, bank = %d\n",reg->address,REG_BANK(reg)); + fprintf(stderr, "addr = 0x%03x, bank = %d, bit=%d\n", + reg->address,REG_BANK(reg),reg->isBitField); } - #endif +#endif if(reg && REG_BANK(reg)!=cur_bank) { + //fprintf(stderr,"need to switch banks\n"); /* Examine the instruction before this one to make sure it is * not a skip type instruction */ pcprev = findPrevpCode(pc->prev, PC_OPCODE); if(!pcprev || (pcprev && !isPCI_SKIP(pcprev))) { int b = cur_bank ^ REG_BANK(reg); - //fprintf(stderr, "Cool! can switch banks\n"); cur_bank = REG_BANK(reg); - if(b & 1) { - new_pc = newpCode(((cur_bank&1) ? POC_BSF : POC_BCF), - popCopyGPR2Bit(PCOP(&pc_status),PIC_RP0_BIT)); - pCodeInsertAfter(pc->prev, new_pc); - if(PCI(pc)->label) { - PCI(new_pc)->label = PCI(pc)->label; - PCI(pc)->label = NULL; - } - /* - new_pc = newpCode(((cur_bank&1) ? POC_BCF : POC_BSF), - popCopyGPR2Bit(PCOP(&pc_status),PIC_RP0_BIT)); - pCodeInsertAfter(pc, new_pc); - */ + + switch(b & 3) { + case 0: + break; + case 1: + insertBankSwitch(0, pc, cur_bank&1, PIC_RP0_BIT); + break; + case 2: + insertBankSwitch(0, pc, cur_bank&2, PIC_RP1_BIT); + insertBankSwitch(0, pc, cur_bank&2, PIC_RP1_BIT); + break; + case 3: + if(cur_bank & 3) { + insertBankSwitch(0, pc, cur_bank&1, PIC_RP0_BIT); + insertBankSwitch(0, pc, cur_bank&2, PIC_RP1_BIT); + } else + insertBankSwitch(0, pc, -1, -1); + break; } - } else { + + }else { //fprintf(stderr, "Bummer can't switch banks\n"); ; } } + + pcprev = pc; + } - pcprev = pc; pc = pc->next; // } while(pc && !(isPCFL(pc))); }while (pc); - if(pcprev && cur_bank) { - /* Brute force - make sure that we point to bank 0 at the - * end of each flow block */ - new_pc = newpCode(POC_BCF, - popCopyGPR2Bit(PCOP(&pc_status),PIC_RP0_BIT)); - pCodeInsertAfter(pcprev, new_pc); - cur_bank = 0; + if(pcprev && cur_bank) { + + int pos = 1; /* Assume that the bank swithc instruction(s) + * are inserted after this instruction */ + + if((PCI(pcprev)->op == POC_RETLW) || + (PCI(pcprev)->op == POC_RETURN) || + (PCI(pcprev)->op == POC_RETFIE)) { + + /* oops, a RETURN - we need to switch banks *before* the RETURN */ + + pos = 0; + + } + + /* Brute force - make sure that we point to bank 0 at the + * end of each flow block */ + + switch(cur_bank & 3) { + case 0: + break; + case 1: + insertBankSwitch(pos, pcprev, 0, PIC_RP0_BIT); + break; + case 2: + insertBankSwitch(pos, pcprev, 0, PIC_RP1_BIT); + insertBankSwitch(pos, pcprev, 0, PIC_RP1_BIT); + break; + case 3: + insertBankSwitch(pos, pcprev, -1, -1); + break; + } +/* + new_pc = newpCode(POC_BCF, + popCopyGPR2Bit(PCOP(&pc_status),PIC_RP0_BIT)); + pCodeInsertAfter(pcprev, new_pc); +*/ + cur_bank = 0; + //fprintf(stderr, "Brute force switch\n"); + } } diff --git a/src/pic/ralloc.c b/src/pic/ralloc.c index 337615aa..787b1b73 100644 --- a/src/pic/ralloc.c +++ b/src/pic/ralloc.c @@ -691,9 +691,10 @@ allocDirReg (operand *op ) reg->type = REG_SFR; } - if (IS_BITVAR (OP_SYM_ETYPE(op))) + if (IS_BITVAR (OP_SYM_ETYPE(op))) { addSet(&dynDirectBitRegs, reg); - else + reg->isBitField = 1; + } else addSet(&dynDirectRegs, reg); } else { -- 2.30.2