Luca Lindhorst [Thu, 3 Dec 2020 11:34:41 +0000 (12:34 +0100)]
Correct warning message
The warning message regarding wrong verification checksum for LPC2000, claims that the verification will fail, but the checksum written correctly by openocd. Clarify this in the warning message.
Change-Id: I929ac767f7f9fdad9bace250c8c04a776462800a Signed-off-by: Luca Lindhorst <l.lindhorst@wut.de>
Reviewed-on: http://openocd.zylin.com/5956 Tested-by: jenkins Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Łukasz Misek [Tue, 6 Jan 2015 12:53:09 +0000 (15:53 +0300)]
jtag/drivers/ulink: auto-detect OpenULINK USB endpoints numbers
This should provide greater compatibility with different OpenULINK
targets which might be using various endpoints numbers. Since they're
advertised in the USB descriptor anyway it makes sense to autodetect
them.
Interface is no longer claimed before attempting to load firmware to a
freshly booted device, so I have no idea if this will break on windows
or other uncommon systems (Paul).
Change-Id: Iee10dcb6911dcf46239c430e174d9f98b5bde3c2 Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2445 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Antonio Borneo [Thu, 5 Nov 2020 22:02:55 +0000 (23:02 +0100)]
jimtcl: switch to github
The 'historically' main repository of jimtcl in repo.or.cz has
lost sync with the github current main repository since July 2020.
The new tag 0.80 is not present in repo.or.cz.
The developer of jimtcl has been in contact with the admins of
repo.or.cz to fix the not better described sync issues and has now
decided to stop any further tentative. A new README has been added
on 2020-11-19 in the old repository to inform that it is abandoned
in favour of github. The old content in repo.or.cz will remain due
to forks that still exists in the same server.
Switch OpenOCD git submodules to fetch jimtcl code from the main
development repository in github.
Change-Id: Ia2d59f1347ccfe374538b38131badfd46054eb91 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5948 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Antonio Borneo [Sun, 15 Nov 2020 21:10:58 +0000 (22:10 +0100)]
target/register: use an array of uint8_t for register's value
The use of 'void *' makes the pointer arithmetic incompatible with
standard C, even if this is allowed by GCC extensions.
The use of 'void *' can also hide incorrect pointer assignments.
Switch to 'uint8_t *' and add GCC warning flag to track any use of
pointer arithmetic extension.
Change-Id: Ic4d15a232834cd6b374330f70e2473a359b1607f Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5937 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Antonio Borneo [Sun, 22 Nov 2020 12:02:32 +0000 (13:02 +0100)]
mips_mips64: fix minor host endianness bug
Commit 80f1a92bd798 ("mips64: Add generic mips64 target support")
adds a log of the target's program counter in function
mips_mips64_debug_entry() by directly casting the little-endian
buffer in pc->value.
This is going to print an incorrect value on big-endian hosts.
Use the function buf_get_u64() to return the register value.
Not tested on real HW. Issue identified with GCC compiler flag
'-Wcast-align=strict' after change http://openocd.zylin.com/5937/
("target/register: use an array of uint8_t for register's value").
Antonio Borneo [Sun, 22 Nov 2020 11:29:04 +0000 (12:29 +0100)]
arm7_9_common: fix host endianness bug in arm7_9_full_context()
The original code passes to ->read_core_regs() and to
->read_xpsr() the pointer to the little-endian buffer reg.value.
This is incorrect because the two functions above require a
pointer to uint32_t, since they already run the conversion with
arm_le_to_h_u32() in the jtag callback.
This causes a mismatch on big-endian host and the registers get
read with the incorrect endianness.
Use an intermediate buffer to read the registers as uint32_t and
to track the destination reg.value pointer, then copy the value in
reg.value after the call to jtag_execute_queue().
Tested with qemu-armeb and an OpenOCD built through buildroot
configured for cortex-a7 big-endian.
Note that if jtag_execute_queue() fails, the openocd register
cache is not updated, so the already modified flags 'valid' and
'dirty' are incorrect. This part should be moved after the call to
jtag_execute_queue() too.
Change-Id: Iba70d964ffbb74bf0860bfd9d299f218e3bc65bf Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5943 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Antonio Borneo [Sat, 21 Nov 2020 23:33:59 +0000 (00:33 +0100)]
armv4_5: fix output of command 'arm reg'
Commit fc2abe63fd3c ("armv7m: use generic arm::core_mode") adds
two special modes for ARMv6M and ARMv7M in struct arm_mode_data[].
While these modes do not have any additional register to be dumped
by command 'arm reg', the command still prints an header for these
modes but not followed by any register.
Detect the special modes for ARMv6M and ARMv7M and skip them to
avoid printing the useless header.
Change-Id: I04145769e5742624f143c910eebf9a6f6d8e3cdc Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Fixes: fc2abe63fd3c ("armv7m: use generic arm::core_mode")
Reviewed-on: http://openocd.zylin.com/5942 Tested-by: jenkins
Antonio Borneo [Sat, 21 Nov 2020 23:15:44 +0000 (00:15 +0100)]
armv4_5: fix segmentation fault in command 'arm reg'
Commit fed713104904 ("armv4_5: support weirdo ARMv6 secure monitor
mode") introduces the secure mode 28 of ARMv6 as a synonymous of
mode 22 (MON), but does not add it in the switch/case in command
'arm reg'.
When command 'arm reg' scans the array arm_mode_data[] on targets
without secure modes, it does not detect the new secure mode as
not supported by the architecture, thus triggers a segmentation
fault when it try to read the register's value from unallocated
memory.
Issue detected with target arm926ejs.
Add the new mode in the switch/case and treat it as the mode MON.
Marc Schink [Thu, 17 Sep 2020 13:23:31 +0000 (15:23 +0200)]
Add initial RTT support
Real Time Transfer (RTT) is an interface specified by SEGGER based on
basic memory reads and writes to transfer data bidirectionally between
target and host.
Every target that supports so called "background memory access", which
means that the target memory can be accessed by the debugger while the
target is running, can be used.
RTT is especially of interest for targets which do not support Serial
Wire Output (SWO) (e.g. ARM Cortex-M0) or where using semihosting is
not possible (e.g. real-time applications) [1].
The data transfer is organized in channels where each channel consists
of an up- and/or down-channel. See [2] for more details.
Channels are exposed via TCP connections. One or more RTT server can be
assigned to each channel to make them accessible to an unlimited number
of TCP connections.
The current implementation does not respect buffer flags which are used
to determine what happens when writing to a full buffer.
Note that the implementation is designed in a way that the RTT
operations can be directly performed by an adapter (e.g. J-Link).
Tomas Vanek [Fri, 1 Mar 2019 20:44:27 +0000 (21:44 +0100)]
adi_v5_swd: wait for readable DPIDR, ABORT if stalled
Reading of DPIDR is the very first operation after JTAG to SWD sequence.
Without this change if DPIDR read fails then swd connect fails.
Keep trying JTAG to SWD sequence and DPIDR read until success
or timeout 0.5 sec. It makes setting of adapter srst delay on SWD transport
mostly unnecessary.
Also test for ERROR_WAIT (which should not occur according to
IHI 0031E B4.3.2 but a quirk is known) and if bus is kept stalled
then issue abort to make the next connect possible.
Change-Id: Id8fe6618605bbeb4fed5061e987ed55de90a35f2 Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5730 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tomas Vanek [Mon, 29 Jun 2020 11:34:07 +0000 (13:34 +0200)]
arm_adi_v5: prevent possibly endless recursion in dap_dp_init()
If dap_dp_read_atomic() in 30 trials loop fails, dap->do_reconnect is set.
Following dap_dp_read_atomic() calls dap_queue_dp_read() which in case
of SWD transport calls swd_queue_dp_read(). It starts
with swd_check_reconnect() and it calls swd_connect() because
dap->do_reconnect is set. swd_connect() does some initialization,
reads DPIDR and calls dap_dp_init() again!
Moreover if dap_dp_init() is called from cortex_m_reset_(de)assert()
one level of recursion is necessary to reconnect the target.
Introduce dap_dp_init_or_reconnect() for use in cortex_m reset
and similar.
Remove loop of 30 atomic reads of DP_STAT to prevent unwanted recursion.
Change-Id: I54052fdefe50bf5f7c7b59fe751fe2063d5710c9 Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5729 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Because only root name of the command is logged, most of lines is not
too informative. E.g. registering 'flash' is repeated 14 times.
Karl Passon submitted the patch [1] changing the logged cmd name from
root to lowest level. It makes the log better. Unfortunately we also have
'reset_config' and 'cortex_m reset_config' and similar which looks
equal in the log after [1].
Moreover [1] has not been reviewed for 5 years.
So my guess is that nobody uses that crap in debug log.
Save more than 10 kbytes in any debug log and make log analyse easier
by blocking log command in #if 0 block.
If some developer eventually needs to debug cmd registering he can easily
enable logging again.
[1] http://openocd.zylin.com/2765
Change-Id: Ib7e528aadd692fd0da2e3c005b4c5a484551b728 Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5928 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Christopher Head <chead@zaber.com>
Tarek BOCHKATI [Wed, 25 Mar 2020 15:33:30 +0000 (16:33 +0100)]
flash/stm32l4x: STM32L55/L56xx basic support (non-secure mode)
STM32L5 have 512 Kbytes of Flash memory with dual bank architecture.
STM32L5 flash is quite similar to L4 flash, mainly register names
and offsets and some bits are changed.
NON-SECURE flash is located at 0x8000000 like L4 devices, so no
big change is needed (secure flash will be subject of another change).
Note: flash driver name is set stm32l5x, in order to extend the commands
with specific L5 commands (to manage TZEN for example ...)
Note: this works only when TZEN=0
Change-Id: Ie758abb4aa19a3f29eeb0702d7dcb43992e4c639 Signed-off-by: Michael Jung <mijung@gmx.net> Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5510 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tarek BOCHKATI [Tue, 3 Nov 2020 00:58:59 +0000 (01:58 +0100)]
flash/stm32l4x: introduce table with register offsets
This change is a preparation for STM32L5 support on top of L4 driver
STM32L5 flash is quite similar to L4 flash, mainly register names
and offsets and some bits are changed.
flash_regs table is introduced within stm32l4_flash_bank struct in order
to get correct register offsets, by using the driver internal function
'stm32l4_get_flash_reg_by_index'.
To use efficiently register indexes, stm32l4 _[get|read|write]_flash_reg
functions are surcharged to accept register indexes.
IMPORTANT: stm32l4_write_option is not surcharged, and they always accept
the option register offset.
tested on NUCLEO-G474RE and STM32L4R9I-DISCO
Change-Id: I739d3e97d63b831af6aa569c5629db0000209551 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5509 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Antonio Borneo [Thu, 30 Jul 2020 19:36:39 +0000 (21:36 +0200)]
jtag/drivers/cmsis_dap: fix build with gcc 10.1.0
Avoid multiple definition of cmsis_dap_usb_backend and
cmsis_dap_hid_backend using 'extern'.
Move the prototypes in cmsis_dap.h.
Remove the useless #if/#endif around the prototypes.
Change-Id: I8d73fe148e2155620244bc887d4235e9af530e30 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5790 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tomas Vanek [Thu, 30 Jul 2020 08:26:34 +0000 (10:26 +0200)]
jtag/drivers/cmsis_dap: fix usb bulk connection logic
http://openocd.zylin.com/4831 has following problems in selecting
USB device/interface to connect:
- attempts connection to any device with user class and 2 bulk endpoints
- regardless of cmsis_dap_vid_pid or cmsis_dap_serial setting
connects to the first suitable device
Distinguish between real match and no filtering cases and use that info
appropriately.
Add debug messages to show why the interface is refused.
Move CMSIS-DAP interface string detection before checking of class/endpoints
to give more understandable debug log in the case the device is refused.
Keep track of reliable matches in both device and interface enumeration.
First search for the interface with CMSIS-DAP in the interface string.
If it fails, chose the first suitable interface.
Tomas Vanek [Thu, 22 Oct 2020 18:36:30 +0000 (20:36 +0200)]
target/armv7m, cortex_m: fix misleading comments
Change-Id: I4fea29f07f4d3b8b2578b538ef0eef5f1eea285f Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5876 Tested-by: jenkins Reviewed-by: Christopher Head <chead@zaber.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tomas Vanek [Thu, 22 Oct 2020 11:18:40 +0000 (13:18 +0200)]
flash/nor/psoc6: remove setting of xPSR.T bit from sromalgo_prepare()
PSoC6 erases flash to 0x00 not more common 0xff, so a device
with erased flash loads xPSR.T=0 from the zeroed reset vector.
Wrong thumb bit value caused a target algorithm failed with HardFault.
The low level write to xPSR solved the problem only if xPSR cached
copy was not marked dirty.
Since 49bd64 this part of code is useless as xPSR target_start_algorithm()
sets always xPSR dirty so the effect of the low level write is eliminated
(and proper setting of thumb bit is ensured in target_start_algorithm())
Change-Id: I68aea5e921fbc6203f2fe91a45f10d22869327de Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5875 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
If a Cortex-M (not M0, M0+) target was stopped in the middle of
a conditional IT block or in the load/store multiple instruction,
cortex_m_debug_entry() used wrong xPSR bits to detect it and then
cleared 8 bits of the exception number from xPSR
- probably wrong bit mask again.
I believe clearing of the ICI/IT bits in cortex_m_debug_entry() has no
reason as Cortex-M does not use instruction injecting.
Remove the wrong code.
The change was originally a part of http://openocd.zylin.com/4862
It is now re-submitted as #4862 is not ready.
Change-Id: If91cd91d1b81b2684f7d5f10cf20452cde1a7f56 Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5874 Tested-by: jenkins Reviewed-by: Christopher Head <chead@zaber.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Antonio Borneo [Sun, 25 Oct 2020 13:59:13 +0000 (14:59 +0100)]
hla: API: specify that read_reg/write_reg use regsel as parameter
The API of hla have been defined from ST-Link basic operations.
By chance, all the current implementation of hla (st-link, ti-icdi
and nulink) share the same way to handle the parameter 'num' of
the API read_reg() and write_reg(), that is simply using it to
initialize the field REGSEL (bits [6:0]) of armv7m Debug Core
Register Selector Register (DCRSR).
Add a comment in the API definition to highlight this, in case it
get used by a further hla implementation, then rename as 'regsel'
the 'num' parameter.
Change-Id: I4b6a2c7d78b4fc4de2b9b2bdba065414b15c6ba3 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5882 Reviewed-by: Edward Fewell <edwardfewell@hotmail.com> Tested-by: jenkins Reviewed-by: Zale Yu Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tomas Vanek [Wed, 14 Oct 2020 19:03:02 +0000 (21:03 +0200)]
target/cortex_m,hla_target: rework Cortex-M register handling part 4
Consolidate low level register read/write.
Floating point registers were handled by target_read/write_u32
unlike other registers handled by cortexm_dap_read/write_coreregister_u32
There is no reason to do so in cortex_m.
Remove cortexm_dap_read/write_coreregister_u32
and use cortex_m_load/store_core_reg_u32 directly.
Similarly HLA adapters register read/write interface supports all registers
so use it for any floating point and other registers.
Change-Id: Ida679e5f4fec02d94ffb0bd3f265ed7ed2221cdc Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5864 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tomas Vanek [Wed, 14 Oct 2020 18:23:50 +0000 (20:23 +0200)]
target/armv7m: rework Cortex-M register handling part 3
Move primask/basepri/faultmask/control packing/unpacking from
cortex_m.c and hla_target.c to armv7m.c armv7m_read_core_reg()
and armv7m_write_core_reg() where also the FP 32/64-bit registers
conversion takes place.
Introduce a new hidden register ARMV7M_PMSK_BPRI_FLTMSK_CTRL
for packing/unpacking of special registers in the register cache.
The new packing/unpacking is endianess safe.
While on it improve returned error codes and LOG_ messages.
Just minimal changes in cortex_m.c and hla_target.c, will be
consolidated in the next patch.
Change-Id: Id51e764e243e54b5fdaadf2a202eee7c4bc729fe Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5863 Tested-by: jenkins Reviewed-by: Christopher Head <chead@zaber.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tomas Vanek [Wed, 14 Oct 2020 14:52:09 +0000 (16:52 +0200)]
target/armv7m: rework Cortex-M register handling part 2
Make arm register id coherent with reg_list index.
Without this reg_list[ARMV7M_R12] was possible but
reg_list[ARMV7M_FPSCR] was out of bounds.
Remove unused items from reg_list index.
Change-Id: I84d3b5c496fc1839d07a5b74cb1fd1c3d4ff8989 Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5862 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Christopher Head <chead@zaber.com>
Tomas Vanek [Sun, 20 Oct 2019 08:12:32 +0000 (10:12 +0200)]
target/armv7m: rework Cortex-M register handling part 1
Define a new enum with DCRSR.REGSEL selectors.
Introduce armv7m_map_id_to_regsel() to unify mapping in one place.
Use DCRSR.REGSEL selectors for low level register read/write.
Change-Id: Ida0ccdfa9cdb1257a1900b8bfbf172b076374d39 Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5327 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Christopher Head <chead@zaber.com>
Tomas Vanek [Sun, 20 Oct 2019 07:40:34 +0000 (09:40 +0200)]
target, register: allow a register hidden from gdb and 'reg' cmd
Introduce a 'hidden' flag in struct reg to support a register cache
containing different views of same data: e.g. Cortex-M has
primask, basepri, faultmask and control registers accessed
as one word. With the hidden flag we can add an reg_list item
corresponding to hw access without exposing the register to user level.
All the struct reg are allocated with calloc() but one in xscale.c
allocated by malloc(). Change this one to use calloc() as well
to guarantee initial value hidden=false
Change-Id: I8da9f5a5a60777ae7ef943a841307487bd80fc6f Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5325 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Antonio Borneo [Mon, 9 Nov 2020 14:50:55 +0000 (15:50 +0100)]
flash/stmqspi: minor fixes on coding style
Add space around operators;
use BIT() macro in place of left shifting constant 1;
remove space between cast operator and value;
do not check a pointer before free() it;
add parenthesis around parameters in macros;
fix indentation using only TABs;
remove line continuation '\' at code lines out of macros.
Change-Id: I809e8ee72d7bfe49d0edf10afb36efe2458de77c Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Fixes: e44539d66c89 ("Flash, FRAM and EEPROM driver for STM32 QUAD-/OCTOSPI interface")
Reviewed-on: http://openocd.zylin.com/5932 Tested-by: jenkins Reviewed-by: Christopher Head <chead@zaber.com>
Kevin Yang [Wed, 4 Nov 2020 18:39:29 +0000 (10:39 -0800)]
target/cortex_m: Change sleep to running state
When the core is in sleep mode, the core is no longer retiring
instructions. Cortext M remains in "unknown" state. This patch converts
sleep mode to "running" state.
Change-Id: I1e9b6c9be51fd0f1f6ce81af9b1f5f9f1f43c661 Signed-off-by: Kevin Yang <kangyang@google.com>
Reviewed-on: http://openocd.zylin.com/5921 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
Andreas Bolsch [Wed, 21 Dec 2016 09:35:58 +0000 (10:35 +0100)]
Flash, FRAM and EEPROM driver for STM32 QUAD-/OCTOSPI interface
- write speed up to 150 kByte/s on STM32F469I-disco (due to
SWD clock and USB connection), up to 1 MByte/s on Nucleo-F767ZI
with external STLink-V3 or Nucleo-G474RE with two W25Q256FV in
dual 4-line mode or STM32H73BI-Disco in octal mode
- tested with STM32L476G-disco (64MBit flash, 3-byte addr),
STM32F412G-Disco, STM32F469I-Disco, STM32F746G-Disco, and
STM32L476G-Disco (all 128Mbit flash, 3-byte addr),
STM32F723E-Disco, STM32F769I-Disco (512Mbit flash, 4-byte addr)
STM32L4R9I-Disco, STM32L4P5G-Disco (512MBit octo-flash, DTR, 4-byte addr)
STM32H745I-Disco, STM32H747I-Disco (two 512MBit flash, 4-byte addr)
STM32H73BI-Disco, STM32H735G-Disco (512MBit octo-flash, DTR, 4-byte addr)
- suitable cfg for Discovery boards included
- limited parsing of SFDP data if flash device not hardcoded
(tested only in single/quad mode as most devices either don't
support SFDP at all or have empty(!) SFDP memory)
- 'set' command for auto detection override (e. g. for EEPROMs)
- 'cmd' command for arbitrary SPI commands (reconfiguration, testing etc.)
- makefile for creation of binary loader files
- tcl/board/stm32f469discovery.cfg superseded by stm32f469i-disco.cfg
- tcl/board/stm32f7discovery.cfg removed as name is ambiguous
(superseded by stm32f746g-disco.cfg vs. stm32f769i-disco.cfg)
- dual 4-line mode tested on Nucleo-F767ZI, Nucleo-H743ZI and Nucleo-H7A3ZI-Q
with two W25Q256FV, and on Nucleo-L496ZP-P and Nucleo-L4R5ZI
with two W25Q128FV, sample cfg files included and on STM32H745I-Disco,
STM32H747I-Disco, STM32H750B-Disco
- read/verify/erase_check uses indirect read mode to work around silicon bug in
H7, L4+ and MP1 memory mapped mode (last bytes not readable, accessing last
bytes causes debug interface to hang)
- octospi supported only in single/dual 1-line, 2-line, 4-line
and single 8-line modes, (not in hyper flash mode)
Requirements:
GPIOs must be initialized appropriately, and SPI flash chip be configured
appropriately (1-line ..., QPI, 4-byte addresses ...). This is board/chip
specific, cf. included cfg files. The driver infers most parameters from
current setting in CR, CCR, ... registers.
Change-Id: I54858fbbe8758c3a5fe58812e93f5f39514704f8 Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-on: http://openocd.zylin.com/4321 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Christopher Head <chead@zaber.com>
Antonio Borneo [Sat, 31 Oct 2020 13:55:10 +0000 (14:55 +0100)]
stlink: fix computation of trace prescaler
Use integer rounding for the computation of prescaler.
Improve the test of prescaler range, knowing its value would be
decremented before being written in TPIU ACPR.
Change-Id: I041dde1dca41323904e36a6b6975028a6de902b3 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5909 Tested-by: jenkins
Antonio Borneo [Sat, 31 Oct 2020 13:49:23 +0000 (14:49 +0100)]
drivers/jlink: fix check for max prescaler
The value stored in TPIU ACPR is the prescaler value decremented
by one. Thus, the test should verify that prescaler does not
exceed the maximum ACPR value plus one. Also, zero value is not
allowed for prescaler.
Change-Id: I1817f04f2a310b2f413bad726f0cb9dd6a4172e2 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5907 Tested-by: jenkins Reviewed-by: Adrian M Negreanu <adrian.negreanu@nxp.com>
Antonio Borneo [Sun, 1 Nov 2020 14:39:23 +0000 (15:39 +0100)]
build: fix build with --enable-minidriver-dummy
Commit 462c01206692 ("Add complete JTAG debug logging.") breaks
the build for minidriver, that is enabled either on zy1000 build
and on minidriver-dummy build. The check on BUILD_ZY1000 was added
to pass the auto-build in jenkins. While the build issue with
minidriver-dummy was known, as reported in the comment, it was not
addressed and got ignored for slightly more than one year.
Use the macro HAVE_JTAG_MINIDRIVER_H in place of BUILD_ZY1000 to
take in account both builds that require the minidriver.
Fix also the build in case configure enables the HLA drivers due
to autodetection of libusb. The HLA drivers would not be in the
build and the function transport_is_hla() would be missing.
Change-Id: I1d85c5fa247bf4a85aba29b233c0b573b46665bc Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5911 Tested-by: jenkins
Antonio Borneo [Sun, 1 Nov 2020 21:06:03 +0000 (22:06 +0100)]
doc: remove reference to already dropped tftp support
The only code dealing with tftp in OpenOCD was in eCos build, code
already dropped in commit 39650e2273bc ("ecosboard: delete
bit-rotted eCos code") almost 8 years ago.
Drop tftp related documentation too.
Change-Id: I0defc8f844e74c90894dca04a652dcc497a520e1 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5913 Tested-by: jenkins Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li>
Antonio Borneo [Thu, 5 Nov 2020 08:54:11 +0000 (09:54 +0100)]
configure.ac: add libutil to the dependency list
Jimtcl 0.80 (2020-10-29) adds dependency to libutil, which is part
of the GNU libc.
The library is searched and used by jimtcl build, but still has to
be linked in by OpenOCD as indirect dependency.
While OpenOCD is still using jimtcl 0.79, let's prepare to switch
to the next version.
Add libutil search in configure.ac.
stm32h7x: Fix reset with non-HLA interfaces on macOS
regsub doesn't work correctly on macOS Catalina, which results in
an incorrect CHIPNAME derived from the current target. Since regsub
is only used by this target, replace it with a simple string search
for '.' followed by a substring. This is funcionally equivalent to
what the regular expression was doing, but instead relies in simpler
string operations that should have little to no differences
between systems.
Also, refactor CHIPNAME detection into proc stm32h7x_chipname, so
it's always retrieved in the same way without duplicating the code.
Change-Id: Ia9f63f56b508688e74278b022eaec47e503916e7 Signed-off-by: Alberto Garcia Hierro <alberto@garciahierro.com>
Reviewed-on: http://openocd.zylin.com/5872 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Christopher Head <chead@zaber.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Kevin Yang [Mon, 12 Oct 2020 22:33:47 +0000 (15:33 -0700)]
target: Examine subsequent targets after failure
When a target examination fails, continue to examine subsequent targets.
Return the number of targets that failed to examine.
Change-Id: I883a0c445edc7eb00f496b79271d773771ec6b66 Signed-off-by: Kevin Yang <kangyang@google.com>
Reviewed-on: http://openocd.zylin.com/5855 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tarek BOCHKATI [Mon, 2 Nov 2020 15:12:11 +0000 (16:12 +0100)]
contrib/cross-build.sh: build capstone from source
tested with capstone 4.0.2, with the following options
CAPSTONE_CONFIG="CAPSTONE_ARCHS=arm,aarch64
CAPSTONE_BUILD_CORE_ONLY=yes
CAPSTONE_STATIC=yes
CAPSTONE_SHARED=no"
Tarek BOCHKATI [Mon, 8 Jun 2020 22:47:46 +0000 (23:47 +0100)]
armv7m: add a TCP channel to stream captured trace
When trace capturing the trace is enabled using 'tpiu_config internal'
(via the internal mode), OpenOCD can collect the trace buffers then append
it to a specified file or named pipe and propagate the trace to 'tcl_trace'
command.
This change is allowing OpenOCD to stream the captured trace over TCP.
When using this configuration OpenOCD acts like a server and multiple
clients can connect and receive the captured trace.
Example on STM32F7 running at 216MHz:
itm port 0 on
tpiu config internal :3344 uart off 216000000
Change-Id: Idea43e7e26e87b98a33da7fb9acf7ea50fe3b345 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5345 Tested-by: jenkins Reviewed-by: Karl Palsson <karlp@tweak.net.au> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tarek BOCHKATI [Mon, 8 Jun 2020 23:15:49 +0000 (00:15 +0100)]
server: permit the add_service function to return the created service
returning the created service seems useful:
as the only method to get the freshly created service is by getting the
last item in the services linked list, and this seems to be like an
intrusion to service internal mechanism.
possibly, we could get the service from a connection but this is possible
only from [new_connection|input|connection_closed]_handler_t, but this is
not always practical:
example: armv7m: add a TCP channel to stream captured trace
http://openocd.zylin.com/#/c/5345/
here we poll for trace and broadcast to all connections
outside of these xxx_handler_t functions
also, storing one of the connections in new_connection_handler_t and get
the service from it is possible, but this will make the code less readable.
Antonio Borneo [Thu, 29 Oct 2020 13:51:33 +0000 (14:51 +0100)]
openocd: convert function setup_command_handler() to static
The function setup_command_handler() was used in the eCos build of
OpenOCD, thus it was exported and a comment was added to remark it
should remain not-static. Unfortunately the comment was missing
the relevant information of the special build that requires so.
Also unusual is that there is no include file that declares the
prototype of the function.
The comment above the function was added in two steps, in commit ea3e49f4e22d ("fix embedded builds") and commit fb96b8607a0c
("openocd: setup_command_handler() must not be static"), again
without info about the special build.
Also the mailing list archive does not report any further detail.
The only hint is in the first commit above that also adds a test
on BUILD_ECOSBOARD in a #if.
Commit 39650e2273bc ("ecosboard: delete bit-rotted eCos code")
removes all the eCos code, that effectively includes the both the
prototype and the call to the function setup_command_handler(),
http://openocd.zylin.com/#/c/503/2/src/ecosboard.c@a1092
but did not reverted the function to static.
With all the 'external' uses of this function being dropped, set
the function setup_command_handler() to static and remove the
obsoleted and misleading comment.
Change-Id: I4d6b83dec2a838119821189fc67949bfca070035 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5902 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Antonio Borneo [Tue, 27 Oct 2020 23:51:30 +0000 (00:51 +0100)]
openocd: add support for libftdi 1.5
The new libftdi 1.5 (2020-07-07) changes some API, deprecating the
old ones. This cause a warning at compile time.
Detect in configure the version of libftdi.
Use the new API in the driver's code.
Add an helper include file 'libftdi_helper.h' that wraps the old
API for backward compatibility with old libftdi.
Antonio Borneo [Tue, 27 Oct 2020 21:56:49 +0000 (22:56 +0100)]
configure.ac: stop automake to search for scripts in parent dirs
Automake will search for the helper scripts in the folder that
contains the current Makefile.am (typically '.'), then some of the
scripts will be also searched in '..' and '../..'.
If the parent folders '..' or '../..' of OpenOCD source code
contain a file named 'install.sh', then automake will use it and
will assume that the same folder should contains also 'ltmain.sh'.
This situation can either cause the build to fail or automake to
use incorrect helper scripts.
Force automake to only search for helper scripts in the current
directory.
Antonio Borneo [Fri, 23 Oct 2020 14:45:35 +0000 (16:45 +0200)]
target: handle command 'target current' when no target is present
Is it possible to run OpenOCD without any target, for example to
only dump the rom-tables of an arm dap, or to perform low level
jtag operations.
But without any target created, the command 'target current'
causes OpenOCD to abruptly exit.
Handle in command 'target current' the case of no targets.
Change-Id: Ide15cb13bec84b88ccc3e7126523c04a6d70e636 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5881 Tested-by: jenkins
Antonio Borneo [Thu, 15 Oct 2020 12:45:27 +0000 (14:45 +0200)]
gdb_server: allow multiple GDB connections to selected targets
The default way of working is to have a single GDB attached to one
target, so OpenOCD accepts only one connection to the GDB port of
each targets and rejects any further connection.
There are some barely safe use cases in which it could get useful
having a second GDB connection to the same target.
One such use case is while using GDB as a 'non-intrusive memory
inspector', as explained in the OpenOCD documentation.
One GDB can be left running an infinite loop to dump some memory
area, or even analysing the content, while keeping a second GDB
ready for user interaction or spot memory check.
Add a target configure option to specify the maximum number of GDB
connections allowed for that target, keeping the default to 1.
Antonio Borneo [Sat, 17 Oct 2020 14:27:13 +0000 (16:27 +0200)]
target/arm_cti: use adiv5_jim_mem_ap_spot_configure()
To avoid code duplication, reorganize the code to replace
cti_configure() with adiv5_jim_mem_ap_spot_configure().
Reorganize 'struct arm_cti_object' and its sub-'struct arm_cti'
moving DAP and mem-AP info in a 'struct adiv5_mem_ap_spot'.
Replace cti_configure() with adiv5_jim_mem_ap_spot_configure().
Deprecate the use of '-ctibase' in favor of '-baseaddr'.
Change-Id: I43740a37c80de67c0f5e4dc79c3400b91a12e9e8 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5869 Tested-by: jenkins
Antonio Borneo [Sun, 11 Oct 2020 22:11:07 +0000 (00:11 +0200)]
target/arm_adi_v5: add helper to get mem_ap spot in configure/cget
This is somehow an extension of existing adiv5_jim_configure(),
but includes the 'address' in the mem_ap.
Rewrite adiv5_jim_configure() using the new helper.
Change-Id: Ia7effeeece044004d459b45126ed4961a98b8568 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5857 Tested-by: jenkins
Antonio Borneo [Mon, 26 Oct 2020 16:58:33 +0000 (17:58 +0100)]
tcl/board: fix changed target config filenames
In commit a1ce28b118e7 ("rename some target scripts to be
consistent with the rest") the following renames was applied, but
the old names are still referenced:
tcl/target/{sam7se512.cfg => at91sam7se512.cfg}
tcl/target/{sam7x256.cfg => at91sam7x256.cfg}
Fix the board files to use to correct target config filename.
Change-Id: I7698aa0da7db95c2bd9ba7ab8c260905a975c857 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5888 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
Antonio Borneo [Mon, 26 Oct 2020 16:54:55 +0000 (17:54 +0100)]
tcl/board: drop 'tcl' prefix in 'find' command
When OpenOCD is installed to the host the 'tcl' folder gets
usually installed in /usr/share/openocd/, thus having 'tcl' as
prefix of the target's file causes 'find' to fail.
Remove the 'tcl' folder prefix.
Change-Id: I3dc484c8de6af8f5aae4dd1b230522ee47ae2ba6 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5887 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
Cliff L. Biffle [Tue, 12 May 2020 20:28:04 +0000 (13:28 -0700)]
jtag/drivers/stlink_usb: fix SWO prescaler
The config_trace function has an out-parameter for generating the
prescaler for the TPIU. The STLink implementation wasn't always writing
it, causing the tpiu command to load uninitialized stack memory (minus
one) into the TPIU's prescaler register when 'external' was requested.
This change ensures that the out-parameter (and the other one,
trace_freq, which hadn't caused any buggy behavior for me) are written
every time.
Signed-off-by: Cliff L. Biffle <cliff@oxide.computer>
Change-Id: I222975869b1aa49cc6b1963c79d5ea0f46522b8c
Reviewed-on: http://openocd.zylin.com/5656 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Christopher Head [Fri, 14 Jun 2019 22:35:31 +0000 (15:35 -0700)]
target: restore last run state after profiling
Now that it’s possible to start profiling from either a running or a
halted state, rather than unconditionally halting after profiling
finishes, it makes more sense to restore the processor to whatever state
(running or halted) it was in before profiling started.
Change-Id: If6f6e70a1a365c1ce3b348a306c435c220b8bf12 Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5237 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Christopher Head [Fri, 14 Jun 2019 22:25:26 +0000 (15:25 -0700)]
target/cortex_m: reduce duplication in profiling
The Cortex-M implementation of profiling contains a bunch of
conditionals and checks to handle both chips which have PCSR and chips
which do not. However, the net effect of the non-PCSR branches is
actually exactly the same as what target_profiling_default does. Rather
than duplicating this code, just detect the situation where PCSR isn’t
available and delegate to target_profiling_default.
Change-Id: I1be57ac77f983816ab6bf644a3cfca77b67d6f70 Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5236 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Christopher Head [Fri, 14 Jun 2019 22:12:28 +0000 (15:12 -0700)]
target: allow profiling from running
There are a handful of implementations of profiling. There is the
default implementation, which repeatedly halts and resumes the target,
sampling PC each time. There is the Cortex-M implementation, which
uses PCSR if available, otherwise falling back to halting and resuming
and sampling PC. There is the OR1K implementation, which reads NPC
repeatedly. Finally, there is the NDS32 implementation which uses some
kind of AICE commands with which I am unfamiliar.
None of these (with the possible exception of the NDS32
implementation) actually require the target to be halted when starting
profiling. The Cortex-M and OR1K actually resume the target as pretty
much their first action. The default implementation doesn’t do this,
but is written in such a way that the target just flips back and forth
between halted and running, and the code will do the right thing from
either initial state. The NDS32 implementation I don’t know about.
As such, for everything except NDS32, it is not really necessary that
the target be halted to start profiling. For the non-PCSR Cortex-M and
default implementations, there is no real harm in such a requirement,
because profiling is intrusive anyway, but there is no benefit. For
the PCSR-based Cortex-M and the OR1K, requiring that the target is
halted is annoying because it makes profiling more intrusive.
Remove the must-be-halted check from the target_profiling function.
Add it to the NDS32 implementation because I am not sure if that will
break when invoked with a running target. Do not add it to any of the
other implementations because they don’t need it.
Change-Id: I479dce999a80eccccfd3be4fa192c904f0a45709 Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5235 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tomas Vanek [Mon, 16 Mar 2020 14:49:54 +0000 (15:49 +0100)]
flash/nor/nrf5: check protection before flash erase/write on nRF51
nRF51 devices have a clumsy flash protection based on UICR CLENR0.
A code running in RAM can write to a protected flash region without
any hint the protection gets violated.
NVMC flash page erase obeys protection setting but fails absolutely
silently.
Before this change the first problem was not addressed in the code.
To justify the second one, protection was loaded during probe,
after protection setting and after a mass erase.
Move protection updates to the beginning of erase/write operation
and limit them to nRF51 series only. Check for protected sectors
before write.
The change also fixes the problem of 'nrf5 mass_erase' on
nRF52833/840 devices. They use ACL flash protection, which is not
supported in nrf5 driver. mass_erase then looked like it failed.
Change-Id: Ie58cda68eb104d410b02777c3df5b343408e2666 Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5522 Tested-by: jenkins
Tomas Vanek [Sun, 12 Apr 2020 08:15:00 +0000 (10:15 +0200)]
flash/nor/nrf5: fix protection setting on nRF51
Protection setting has not ever worked. UICR CLENR0 register cannot
be simply written but has to programmed because it resides in UICR
page of the flash.
Enable flash programming before writing CLENR0 and set back to r/o
afterwards.
Inform the user that reset might be required.
Change-Id: Ib0f96c74ba3583ac33f4394ddb57d8c8895adf53 Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5586 Tested-by: jenkins