Ake Rehnman [Sun, 29 Mar 2020 10:13:18 +0000 (12:13 +0200)]
Entering SWIM mode on ST-LINK does not update swim status word.
As a consequence of a previous failed SWIM command any
subsequent attempts to enter SWIM mode fails. Change
stlink_usb_mode_enter to use stlink_usb_xfer_noerrcheck
instead.
Tarek BOCHKATI [Mon, 30 Mar 2020 11:06:18 +0000 (13:06 +0200)]
stlink: always use a valid endpoint
In order to extend the driver to support stlink-server over TCP,
we should always use a valid endpoint, as stlink-server is not permissive
and do not accept the invalid STLINK_NULL_EP.
STLINK_NULL_EP value was used for commands without an expected reply,
this value could be replaced with a valid endpoint without any impact
when the size is set to zero.
Antonio Borneo [Mon, 3 Feb 2020 09:02:54 +0000 (10:02 +0100)]
jtag: flush queue after reset for drivers using old reset model
Not all the jtag drivers have been migrated to the new reset model
and for those only we need to flush the jtag queue to make the
reset working with command 'adapter [de]assert ...'.
Add a queue flush and a FIXME comment to remove both when all the
drivers would be migrated.
Change-Id: Ib6667f987b1be2bce492841040302e742dd1cad1 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5430 Tested-by: jenkins
Antonio Borneo [Mon, 16 Mar 2020 13:53:18 +0000 (14:53 +0100)]
gdb_server: print the target associated to the gdb port
While running OpenOCD on multi-target SoC, it's not immediate to
detect which target is associated to each GDB port. The log only
reports:
Info : Listening on port 3333 for gdb connections
and a verbose debug log is required to get such info.
Promote to LOG_INFO() the existing debug message that already
reports the association, obtaining for each port:
Info : starting gdb server for stm32mp15x.cpu0 on 3333
Info : Listening on port 3333 for gdb connections
Change-Id: I1bd75655a3449222c959e6e82f5e0f8f5acd908a Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5525 Tested-by: jenkins Reviewed-by: Jan Matyas <matyas@codasip.com> Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Antonio Borneo [Tue, 10 Mar 2020 22:07:42 +0000 (23:07 +0100)]
cortex_m: remove deprecation for soft_reset_halt
The command "soft_reset_halt" is deprecated since mid 2013 with
the commit 146dfe32956d ("cortex_m: deprecate soft_reset_halt").
Nevertheless it is still extremely useful with multicore chips
where it allows to reset only one of the cores, option not
available through asserting the chip-wide srst.
It also get useful to handle the reset on some problematic chip,
as in http://openocd.zylin.com/5489
Replace the warning about deprecation with a more light debug
message.
Change-Id: I52de6359475ba31014ae77e596a87fe88b252177 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5514 Tested-by: jenkins Reviewed-by: Edward Fewell <efewell@ti.com> Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Antonio Borneo [Wed, 12 Feb 2020 21:26:51 +0000 (22:26 +0100)]
cortex_a: don't wait for target halted in deassert_reset()
The tcl script src/target/startup.tcl has already the proper
centralized support to wait for all targets to halt after the
command "reset halt". The extra wait in cortex_a_deassert_reset()
is not required.
This extra wait is also an issue for multi-core support, because
waiting for one core to halt can delay the halt request to the
other cores.
Replace the indirect call to cortex_a_halt(), that embeds the wait
for halt, with a low-level halt sequence.
The on-going work on the reset framework is compatible with this
change; in fact it keeps in startup.tcl the wait for targets to
halt, even if current code proposal for cortex_a simply removes
the function cortex_a_deassert_reset().
Antonio Borneo [Thu, 26 Mar 2020 14:16:52 +0000 (15:16 +0100)]
stlink: remove only instance of useconds_t
The usleep() function, and its associated useconds_t type
specifier, has been obsoleted by POSIX.1-2008.
OpenOCD has 28 call to usleep(), that should be migrated to the
replacement nanosleep(), but due to the different prototype
int nanosleep(const struct timespec *req, struct timespec *rem);
this can take some effort.
The type useconds_t is used in only one case, where it's used both
as parameter of usleep() and as value passed to LOG_DEBUG(). Due
to different implementation of useconds_t, there are cases that
trigger a compile warning in LOG_DEBUG() when useconds_t is more
than 32 bit.
E.g. with unistd.h in MinGW 4.x, useconds_t is defined as unsigned
long, thus being 32 or 64 bits depending on the target.
Antonio Borneo [Thu, 26 Mar 2020 22:35:08 +0000 (23:35 +0100)]
flash/nor/nrf5: pass unsigned char to isalnum()
In newlib, the argument of isalnum() and the similar functions in
ctype.h is checked to be either an int or an unsigned char.
Using a normal (signed) char triggers a compile time warning
warning: array subscript has type ‘char’ [-Wchar-subscripts]
Rewrite the function to separate the internal unsigned char
operations from the (signed) char parameter.
Jan Matyas [Wed, 1 Apr 2020 09:58:20 +0000 (11:58 +0200)]
target: added events TARGET_EVENT_STEP_START and _END
Events TARGET_EVENT_STEP_START and TARGET_EVENT_STEP_END
have been added - analogous to already existing events
TARGET_EVENT_RESUME_*.
This is an example of a concrete use case where having
these events is important:
In RISC-V processors without Debug Program Buffer, OpenOCD
cannot execute fence/fence.i when resuming or single-
stepping. With these events implemented, the user can
instead provide custom operations to achieve that same
effect prior to resuming the processor.
Change-Id: I786348ff08940759d99b0f24e9e0ed5a44581094 Signed-off-by: Jan Matyas <matyas@codasip.com>
Reviewed-on: http://openocd.zylin.com/5551 Tested-by: jenkins Reviewed-by: Tim Newsome <tim@sifive.com>
Edward Fewell [Tue, 10 Mar 2020 20:11:43 +0000 (15:11 -0500)]
tcl/target: Use vectreset for CC13xx/CC26xx targets.
nSRST and sysreqreset are both broken for these targets. Upon a
hard reset, the target disables the TDO/TDI pins and the
ICEPick router will remove the target's TAP from the scan
chain. The scripts to do these tasks are run, but then
OpenOCD throws the reset again breaking the debug connection.
Until that issue can be resolved, vectreset is the only
reset that works without breaking the debug connection.
Update: original patch didn't have the correct reset command.
Change-Id: If7c985b703c87399a13364609d370d6222f4a66c Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/5511 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tarek BOCHKATI [Fri, 13 Mar 2020 10:49:25 +0000 (11:49 +0100)]
armv8: log the register name which we failed to read or write
when openocd fails to read armv8 register, the user is not informed
which register has caused the error.
for example, in AArch32 state ESR_EL3 read/write is not supported,
thus armv8_dpm_read_current_registers is always failing without mentioning
which register has caused the error.
For STM32 F100xx HD VL (0x428), max_flash_size_kb is 512 (was 128)
refer to RM0041 Rev5: Table 5. Flash module organization (high-density
value line devices) => (256 page of 2 Kbytes each)
Edward Fewell [Tue, 24 Mar 2020 21:46:59 +0000 (16:46 -0500)]
flash/nor: Change missing protect_check message from WARN to Info.
Change the current message when a flash driver does not implement
the protect_check function to LOG_INFO() from LOG_WARNING(). The
user is still notified that the procedure isn't available, but
changes the tone to indicate this is expected with this flash
driver and not something that necessarily is a problem to fix.
Change-Id: If8a2e86a23c852d562346ca36734e5d02df4a851 Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/5539 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tarek BOCHKATI [Mon, 2 Mar 2020 13:20:27 +0000 (14:20 +0100)]
doc: enhance target types description
target types are sorted alphabetically
minor changes for some precision:
- cortex_a : it's an ARMv7-A core
- cortex_m : besides the ARMv7-M it support the v6-M and v8-M cores
Tarek BOCHKATI [Mon, 2 Mar 2020 12:58:07 +0000 (13:58 +0100)]
doc: fix OpenRISC target documentation
OpenRISC correct target name is 'or1k' not 'openrisc'
http://openocd.zylin.com/3096 introduced a conflict between 'openrisc'
and 'ls1_sap' documentations
Lars Poeschel [Tue, 5 Nov 2019 15:37:43 +0000 (16:37 +0100)]
avrf.c: Use extended addressing for flash > 0x20000
The current method used for flash addressing uses 16 bit. Every access
to flash is 16 bit wide. With 16 address bits one can address 0x10000
unique locations á 16 bits thats 0x20000 bytes.
For flashes bigger than that avrs have an extended addressing with more
than 16 address bits. This is now implemented and used for flashs larger
than 0x20000 bytes.
Change-Id: Id8b6337dde3830fb3c56b9042872e040bb67c12d Signed-off-by: Lars Pöschel <poeschell+openocd@mailbox.org>
Reviewed-on: http://openocd.zylin.com/5502 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Antonio Borneo [Fri, 6 Mar 2020 09:30:25 +0000 (10:30 +0100)]
jtag: fix command "adapter [de]assert" with dap direct
The commit fafe6dfc9cd8 ("adapter: add command "adapter [de]assert
srst|trst [[de]assert srst|trst]"") was proposed in gerrit well
before commit a61ec3c1d73d ("adi_v5_dapdirect: add support for
adapter drivers that provide DAP API") get merged, so it didn't
include a complete support for dap direct.
The merge upstream of the two commits lacks the support by command
"adapter [de]assert" for dap direct
Let command command "adapter [de]assert" handle dap direct.
Antonio Borneo [Sun, 8 Mar 2020 15:40:05 +0000 (16:40 +0100)]
doc: fix texinfo files attributes on Windows
While installing git on Windows, the user is prompted by a dialog
"Configuring the line ending conversions" to select the value for
the git property "core.autocrlf". The default choice proposed by
the installer is "Checkout Windows-style, commit Unix-style line
endings", that corresponds to "core.autocrlf=true".
Even if the dialog provides technical explanation of the different
choices, most users will blindly accept the default proposal.
With "core.autocrlf=true" git will convert to DOS mode all the
text files during "clone" (so can be edited by any crap Windows
tool) and convert back to UNIX mode during "push" operation.
While this is safe enough for C and TCL files, it breaks the
texinfo files.
The trailing '@' character used for command continuation in
https://www.gnu.org/software/texinfo/manual/texinfo/html_node/Def-Cmd-Continuation-Lines.html
does not accept being followed by CR+LF (DOS mode), generating a
build error. Same error can be replicated on Linux by passing the
file doc/openocd.texi through "unix2dos" command.
Tentative to fix this has already been proposed in
http://openocd.zylin.com/5294
http://openocd.zylin.com/5413
by breaking the command continuation syntax, which is a no go.
The correct fix would require to force/suggest all the Windows
users to get rid of the crap DOS mode, but this could have side
effects.
To workaround the issue, add a .gitattributes file in the doc
folder, specifying a local conversion attribute for the files .txt
and .texi in the doc folder and overriding the eventual incorrect
global value of "core.autocrlf" selected during installation.
The local attribute "text eol=lf" is equivalent to the global one
"core.autocrlf=input".
Change-Id: I468a8f8125b6bc4628fce6c66eb082824ba3413f Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5499 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Edward Fewell [Mon, 2 Mar 2020 20:04:24 +0000 (14:04 -0600)]
tcl/target: Enable using vectreset for CC3320SF targets
On CC32xx family of devices, sysrequest is disabled, and
vectreset is blocked by the boot loader (stops in a while(1)
statement). srst reset can leave the target in a state
that prevents debug.
This change enables using vectreset on SF variants by
moving the PC to the start of the user application in
internal flash. This allows for a more reliable reset,
but with two caveats:
1) This only works for the SF variant with internal
flash.
2) This only resets the CPU and not any peripherals.
Tested on CC3220SF rev B Launchpad in both SWD and
JTAG modes. Confirmed proper behavior of reset,
reset init, reset halt, and reset run commands.
Update: reworked per comment in code review. Re-tested
with CC3220SF Launchpad as both CC3220SF and as
CC32xx board to confirm reset behavior as expected.
Update: Added adapter srst delay 1100 line to the
CC3200 LaunchXL configuration file.
Change-Id: Ibc042d785c846c2223ae55b8f2410b75ed2df354 Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/5489 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Edward Fewell [Wed, 4 Mar 2020 21:14:48 +0000 (15:14 -0600)]
drivers: xds110: Add support of alternate XDS110 configurations
The XDS110 supports alternate configurations, each of which has
a unique vid/pid:
0451/bef3 -- Standard (legacy) configuration
0451/bef4 -- Drag-n-Drop configuration
1cbe/02a5 -- CMSIS-DAP 2.0 on BULK interface configuration
It's not important to OpenOCD what the differences are except
that OpenOCD needs to know how to connect using the different
vid/pids and, in the case of the last one, use a different
interface for the debug connection.
Updated the XDS110 source to search for all possible
configurations, and updated the udev rules file to enable
user access to the alternate configuraitons.
For the curious, you can download the latest XDS emupack from
software-dl.ti.com/ccs/esd/documents/xdsdebugprobes/emu_xds_software_package_download.html
Install to an empty directory, and documentation for the
XDS110 is located in the .../ccs_base/common/uscif/xds110
of the installation.
Updated for comments in code review. Changed const variable
names to lower case. Reworked interface/endpoint setting
to use arrays suggestion.
Change-Id: Icc9d11c6618f43d87ae8171c78ebf238800d3ac2 Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/5494 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Edward Fewell [Wed, 4 Mar 2020 23:24:33 +0000 (17:24 -0600)]
drivers: xds110: Clean up command syntax and documentation
Arrange all commands under a top level xds110 command. Fix
documentation to properly reflect the current functionality.
Also updated the links in the document to the new permanent
links for the XDS110 only support.
Patch updated for comments from code review. Return
ERROR_COMMAND_SYNTAX_ERROR for wrong number of args in
commands. Added deprecated commands to src/jtag/startup.tcl.
Change-Id: Ica45f65e1fdf7fa72866f4e28c4f6bce428d8ac9 Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/5495 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Edward Fewell [Wed, 4 Mar 2020 19:07:13 +0000 (13:07 -0600)]
drivers: xds110: Add support TCK changes in firmware update
Starting with XDS110 firmware version 3.0.0.0, the peak TCK
frequency became 14,000 kHz. So the delay count calculation
in the current driver has been updated to use the new
formula for setting the TCK speed depending on which version
of the firmware is detected. And because of the changes, the
default TCK settings for the XDS110 based Launchpads can be
adjusted to take advantage of the higher TCK performance.
Note that the values used have been determined through
testing in the automated test labs to be the highest TCK
frequency with the XDS110 that are still reliable.
Different boards have a different peak TCK setting that
should be safe.
Change-Id: I4d66e90d8fac8272641ba4db4a3a510e3b444d86 Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/5493 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tarek BOCHKATI [Sat, 7 Mar 2020 16:20:24 +0000 (17:20 +0100)]
stlink: workaround serial bug with old ST-Link DFU
Old ST-LINK DFU returns an incorrect serial in the USB descriptor
example for the following serial "57FF72067265575742132067"
- the correct descriptor serial is:
0x32, 0x03, 0x35, 0x00, 0x37, 0x00, 0x46, 0x00, 0x46, 0x00 ...
this contains the length (0x32 = 50), the type (0x3 = DT_STRING)
and the serial in unicode format.
the serial part is: 0x0035, 0x0037, 0x0046, 0x0046 ... >> 57FF ...
this format could be read correctly by 'libusb_get_string_descriptor_ascii'
so this case is managed by libusb_helper::string_descriptor_equal
- the buggy DFU is not doing any unicode conversion and returns a raw
serial data in the descriptor:
0x1a, 0x03, 0x57, 0x00, 0xFF, 0x00, 0x72, 0x00 ...
>> 57 FF 72 ...
based on the length (0x1a = 26) we could easily decide if we have to fixup the serial
and then we have just to convert the raw data into printable characters using sprintf
example for an old ST-LINK/V2 standalone:
before : 'W?r\ 6reWWB\13 g'
after : '57FF72067265575742132067'
=> same as the displayed value in STM32CubeProgrammer
tested using these commands
using the buggy serial
-c "hla_serial \x57\x3f\x72\x06\x72\x65\x57\x57\x42\x13\x20\x67"
using the computed serial
-c "hla_serial 57FF72067265575742132067"
[...]
==9656== 224 (80 direct, 144 indirect) bytes in 1 blocks are definitely lost in loss record 3 of 3
==9656== at 0x483CD99: calloc (in /usr/lib/x86_64-linux-gnu/valgrind/vgpreload_memcheck-amd64-linux.so)
==9656== by 0x1C541A: os_alloc (rtos.c:79)
==9656== by 0x1C569E: os_alloc_create (rtos.c:111)
==9656== by 0x1C569E: rtos_create (rtos.c:153)
==9656== by 0x1AE332: target_configure (target.c:4899)
==9656== by 0x1AF228: jim_target_configure (target.c:4952)
==9656== by 0x1C9EF9: command_unknown (command.c:1066)
==9656== by 0x313284: JimInvokeCommand (jim.c:10364)
==9656== by 0x313FB6: Jim_EvalObj (jim.c:10814)
==9656== by 0x3154A3: Jim_EvalFile (jim.c:11207)
==9656== by 0x316015: Jim_SourceCoreCommand (jim.c:15230)
==9656== by 0x313284: JimInvokeCommand (jim.c:10364)
==9656== by 0x313B8B: JimEvalObjList (jim.c:10605)
[...]
Change-Id: I2cd41a154fb8570842601ff4e3e76502f5908f49 Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5479 Tested-by: jenkins Reviewed-by: Moritz Fischer <moritzf@google.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Andreas Bolsch [Sun, 16 Dec 2018 16:30:41 +0000 (17:30 +0100)]
Flash driver for STM32G0xx and STM32G4xx
Flash module of STM32G0/G4 family is quite similar to the one of
STM32L4, so only minor changes are required, in particular
adaption of flash loader to Cortex-M0. Register addresses
passed to flash loader to simplify integration of L5.
Added re-probe after option byte load.
Added flash size override via cfg file.
WRPxxR mask now based on max. number of pages instead of fixed 0xFF,
as G4 devices fill up unused bits with '1'.
Sizes in stm32l4_probe changed to multiples of 1kB.
Tested with Nucleo-G071RB, G030J6, Nucleo-G431RB and Nucleo-G474RE.
Gap handling in G4 Cat. 3 dual bank mode tested with STM32G473RB.
This handling isn't optimal as the bank size includes the
size of the gap. WB not tested.
Change-Id: I24df7c065afeb71c11c7e96de4aa9fdb91845593 Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-on: http://openocd.zylin.com/4807 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Edward Fewell [Fri, 6 Mar 2020 20:39:14 +0000 (14:39 -0600)]
drivers: xds110: Fix errors in routine that toggles
TCK during nSRST assert/deassert code.
To support LPRF targets (CC13xx/CC26xx), TCK must be toggled
for 50 ms while nSRST is asserted and right after it is
released. This allows the core to halt in boot ROM before
code is run that might interfere with debug access.
The current routine has two issues. It shouldn't be run at
all if the target is using SWD. And the delay needs to
be a real-time 50 ms, so the number of TCK periods should
be calculated off the set speed.
Change-Id: If993031b84cf2a505ea67a6633602c4b01cd8e1e Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/5497 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Antonio Borneo [Tue, 25 Jun 2019 14:01:38 +0000 (16:01 +0200)]
target/cortex_a: add hypervisor mode
Hypervisor mode is present only if the optional virtualization
extensions are available. Moreover, virtualization extensions
require that also security extensions are implemented.
Add the required infrastructure for the shadowed registers in
hypervisor mode.
Make monitor shadowed registers visible in hypervisor mode too.
Make hypervisor shadowed registers visible in hypervisor mode
only.
Check during cortex_a examine if virtualization extensions are
present and then conditionally enable the visibility of both
hypervisor and monitor modes shadowed registers.
Change-Id: I81dbb1ee8baf4c9f1a2226b77c10c8a2a7b34871 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5261 Tested-by: jenkins
Antonio Borneo [Mon, 24 Jun 2019 16:28:31 +0000 (18:28 +0200)]
armv7a: access monitor registers only with security extensions
Accordingly to ARM DDI 0406C at B1.5, the security extensions for
armv7a are optional extensions and can be detected by reading
ID_PFR1.
The monitor mode is part of the security extensions and the shadow
registers "sp_mon", "lr_mon" and "spsr_mon" are only present with
the security extensions.
Read the register ID_PFR1 during cortex_a examine, determine if
security extension is present and then conditionally enable the
visibility of the monitor mode shadow registers.
Change-Id: Ib4834698659046566f6dc5cd35b44de122dc02e5 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5259 Tested-by: jenkins
Antonio Borneo [Mon, 24 Jun 2019 10:17:17 +0000 (12:17 +0200)]
arm: fix reg num for Monitor mode
Commit 2efb1f14f611 ("Add GDB remote target description support
for ARM4") inserts two additional registers "sp" and "lr" in the
table arm_core_regs[], thus shifting by two the position of the
last three registers already present
"sp_mon" moved from index 37 to 39
"lr_mon" moved from index 38 to 40
"spsr_mon" moved from index 39 to 41
Part of the code is updated (e.g. enum defining ARM_SPSR_MON and
array arm_mon_indices[]), but it's missing the update of mapping
in armv4_5_core_reg_map[].
Fix armv4_5_core_reg_map[].
Change-Id: I0bdf766183392eb738206b876cd9559aacc29fa0 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Fixes: 2efb1f14f611 ("Add GDB remote target description support for ARM4")
Reviewed-on: http://openocd.zylin.com/5257 Tested-by: jenkins
Antonio Borneo [Mon, 3 Feb 2020 15:48:40 +0000 (16:48 +0100)]
ftdi: flush mpsse queue after a level change on reset pins
The function ftdi_set_signal() does not propagate the pin change
until next call to mpsse_flush(). Current code does not toggles
immediately the reset pins if polling is turned off.
Call mpsse_flush() at the end of ftdi_reset().
While there, remove the duplicated LOG message.
Change-Id: I79eacfe4fc32b5cdf2dc1b78f3660d96988466bc Fixes: 8850eb8f2c51 ("swd: get rid of jtag queue to assert/deassert srst") Reported-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5431 Tested-by: jenkins Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Antonio Borneo [Sat, 19 Oct 2019 17:46:53 +0000 (19:46 +0200)]
jimtcl: update to tag 0.79
OpenOCD is stuck at jimtcl tag 0.77 that is 3 years old.
The latest tag 0.79 (2019-11-20) is already used by debian build,
which packs jim library separately, as shown in [1]. Today only
the build for architecture powerpcspe is still not updated to
latest package version.
I have been using jim 0.79 since the day of the release, without
any issue.
Switch jimtcl to latest tag 0.79
[1] https://packages.debian.org/sid/openocd
Change-Id: I3426e68c32f88ecde74d4278303925423db451e0 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5403 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Antonio Borneo [Fri, 14 Feb 2020 13:35:51 +0000 (14:35 +0100)]
target: fix crash with jimtcl 0.78
The jimtcl commit 41c5ff1809f5 ("jim.c: Fix Object leak in zlib
support") https://repo.or.cz/jimtcl.git/commit/41c5ff1809f5
makes Jim_SetResultFormatted() freeing the parameters that have
zero refcount.
OpenOCD commit 559d08c19ed8 ("jim tests: use installed") adds the
only code instance in OpenOCD that first passes a zero refcount
object to Jim_SetResultFormatted() and then frees it.
By switching jimtcl version to 0.78 or newer this causes a crash
of OpenOCD.
To trigger the crash in a telnet session, check that the current
target is running and type:
[target current] arp_waitstate halted 1
Remove the call to Jim_FreeNewObj() after the call to
Jim_SetResultFormatted().
Change-Id: I5f5a8bca96a0e8466ff7b789fe578ea9785fa550 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5453 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Antonio Borneo [Mon, 24 Feb 2020 11:26:07 +0000 (12:26 +0100)]
jtag: report API reset as synchronous
The jtag API reset() is synchronous, but this was not highlighted
in the description.
Change-Id: I76ffb7eec97c8608cfbef0b9268ee18a5f50b221 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Fixes: 8850eb8f2c51 ("swd: get rid of jtag queue to assert/deassert srst")
Reviewed-on: http://openocd.zylin.com/5471 Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Tested-by: jenkins
A common problem with target configurations appears to be broken
debug base address configuration. ARM DDI0406C.d specifies in App. D,
1.4.1, that bit 31 of the debug base address serves as identification
of an external debugger, as opposed to an internal access to memory
mapped debug registers by the CPU. External accesses are treated
as privileged and require no debug authentification via the lock
access register.
Sometimes the base address of a debug component is wrong even
in the targets' ROM table. In this case, the correct base address
must be specified using the -dbgbase argument when creating the
target.
This patch adds a warning when bit 31 of the debug base address
is not set, as a hint to the user.
Change-Id: I9c41d85a138123c657ef655e3436a2aa39249dcc Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/5105 Tested-by: jenkins Reviewed-by: Tommy Vestermark <tov@vestermark.dk> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tarek BOCHKATI [Mon, 9 Dec 2019 11:47:07 +0000 (12:47 +0100)]
target/armv8_opcodes: use T32 instructions when the PE is in AArch32 state
As stated in ARM v8-A Architecture Reference Manual (ARM DDI 0487E.a)
in Chapter H4.3 DCC and ITR access modes:
Writes to EDITR trigger the instruction to be executed if the PE
is in Debug state:
- If the PE is in AArch64 state, this is an A64 instruction.
- If the PE is in AArch32 state, this is a T32 instruction
But in armv8_opcodes specifically in t32_opcodes we were using some
A32 instructions for HLT, LDRx and STRx opcodes.
Using the correct LDRx and STRx opcodes, fixes 16 and 8 bits memory access
when the PE is in AArch32 state.
Change-Id: Ib1acbdd4966297e7b069569bcb8deea3c3993615 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5346 Tested-by: jenkins Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tarek BOCHKATI [Wed, 4 Dec 2019 14:09:51 +0000 (15:09 +0100)]
target/aarch64: fix soft breakpoint when PE is in AArch32 state
Before this patch aarch64_set_breakpoint was using either A64, or A32
HLT opcode by relying on armv8_opcode helper.
This behaviors ignores the fact that in AArch32 state the core could
execute Thumb-2 instructions, and gdb could request to insert a soft
bkpt in a Thumb-2 code chunk.
In this change, we check the core_state and bkpt length to know the
correct opcode to use.
Note: based on https://sourceware.org/gdb/current/onlinedocs/gdb/ARM-Breakpoint-Kinds.html
if bkpt length/kind == 3, we should replace a 32-bit Thumb-2 opcode,
then we use twice the 16 bits Thumb-2 bkpt opcode and we fix-up the
length to 4 bytes, in order to set correctly the bpkt.
Change-Id: I8f3551124412c61d155eae87761767e9937f917d Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5355 Tested-by: jenkins Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tarek BOCHKATI [Mon, 9 Dec 2019 11:35:01 +0000 (12:35 +0100)]
target/aarch64: fix minor stepping issue with gdb
when using step command from gdb the step happens without any issue,
but aarch64_step call explicitly aarch64_poll which consumes the
status change to HALTED, so it does not inform gdb that the step has
finished.
by removing this call, all is back to normal and openocd could inform gdb
that the step has finished.
Change-Id: I9366aecd20f7d52259b050b8653189b67d9299d0 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5354 Tested-by: jenkins Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Change-Id: I693e5b7933fc61956010a96be57ee6eb8abd3c31 Signed-off-by: Anton V. Kirilchik <kosmonaffft@gmail.com>
Reviewed-on: http://openocd.zylin.com/5422 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tarek BOCHKATI [Tue, 25 Feb 2020 18:35:44 +0000 (19:35 +0100)]
semihosting: reorganize semihosting commands
the same semihosting handlers chain is declared twice:
1. in src/target/armv4_5.c
2. in src/target/riscv/riscv.c
to make it simpler we moved the declaration into
'src/target/semihosting_common.c' under semihosting_common_handlers[].
then we used this into both of armv4_5.c and riscv.c
Marek Vasut [Wed, 15 Jan 2020 04:42:03 +0000 (05:42 +0100)]
tcl/target: Unify Renesas R-Car JTAG reset config
Both Gen2 and Gen3 used the same init_reset{} implementation,
pull it into common file and include it from both generations.
Moreover, this behavior is SoC specific, not board specific,
so move the common init_reset into target/ directory.
Edward Fewell [Fri, 28 Feb 2020 22:56:11 +0000 (16:56 -0600)]
flash/nor: update support for TI MSP432 devices
Added fixes for issues found in additional code reviews.
Fixed host Endianness issues with using buffer reads
and writes instead of the *_u32 variants.
Changed code that tried to ID banks by hardcode
bank_number values to use instead the bank base
address. This fixes problems using configurations
with multiple devices.
Note that this replaces Change 4786 which has
been abandoned because of extensive changes to
the code to stop IDing banks by name. And I
think I really messed up a rebase/merge on the
document file.
Tested on MSP432P401R, MSP432P4111, and MSP432E401Y
Launchpads.
Change-Id: Id05798b3aa78ae5cbe725ee762a164d673ee5767 Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/5481 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
luca vinci [Wed, 8 Jan 2020 09:15:40 +0000 (10:15 +0100)]
bluenrg-x: simplyfied the driver
Adopted only fast algorithm for flash programming:
- write_word and write_byte methods have been removed.
- start and end write alignments have been defined.
Moved flash controller registers offsets in a common file
shared with the flash algorithm.
- the flash base address is passed to the flash algorithm
as a parameter.
Removed unused functions
luca vinci [Tue, 5 Nov 2019 07:45:04 +0000 (08:45 +0100)]
bluenrg-x: added support for BlueNRG-LP device
Extended bluenrg-x flash driver with BlueNRG-LP flash controller.
Changes include:
- register set for the flash controller
- made software structure prone to support more easily future devices
- updated target config file
Writing bits to an uninitialized buffer generated false warnings.
Zero buffers before setting them by buf_set_u32|64()
(do it only if bit-by-bit copy loop is used,
zeroed buffer is not necessary if a fast path write is used)
Change-Id: I2f7f8ddb45b0cbd08d3e249534fc51f4b5cc6694 Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5383 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tomas Vanek [Fri, 20 Dec 2019 22:26:51 +0000 (23:26 +0100)]
flash/nor/numicro: use flash infrastructure to align write
The aligning code generated a clang static analyzer warning and
imposed huge memory leak. This part of code was removed and
flash infrastructure to alignment is used instead.
Oleksij Rempel [Mon, 3 Feb 2020 18:44:40 +0000 (19:44 +0100)]
remove libusb0_common support
Supporting two libusb versions provides additional development challenges
without additional advantage. In most cases we need to patch libusb0_common and
libusb1_common without real ability to test libusb0_common.
Marek Vasut [Tue, 7 Jan 2020 21:49:45 +0000 (22:49 +0100)]
tcl/target: Add unified config for Renesas R-Car Gen2 targets
Add configuration for the Renesas R-Car Generation 2 targets.
These are SoCs with Cortex A15s and A7s. All cores currently
supported by OpenOCD are supported here as well as two new
cores, M2N and V2H, for the sake of support completeness.
Tarek BOCHKATI [Thu, 6 Feb 2020 23:12:48 +0000 (00:12 +0100)]
flash/stm32h7x: add support of STM32H7Ax/H7Bx devices
this new device has the following features:
- single core cortex-M7
- 2MB flash - dual bank
- page size 8k
- write protection grouped by 4 sectors
- write block size 128 bits (16 bytes)
the bit definition of FLASH_CR is different than STM32H74x,
that's why we introduced a helper to compute the FLASH_CR value
Evgeniy Didin [Mon, 27 Jan 2020 12:22:27 +0000 (15:22 +0300)]
Introduce ARCv2 architecture related code
This patch is an initial bump of ARC-specific code
which implements the ARCv2 target(EMSK board) initializing
routine and some basic remote connection/load/continue
functionality.
Changes:
03.12.2019:
-Add return value checks.
-Using static code analizer next fixes were made:
Mem leak in functions:
arc_jtag_read_memory,arc_jtag_read_memory,
arc_jtag_write_registers, arc_jtag_read_registers,
jim_arc_add_reg_type_flags, jim_arc_add_reg_type_struct,
arc_build_reg_cache, arc_mem_read.
Dead code in "arc_mem_read";
In arc_save_context, arc_restore_context correct arguments
in"memset" calls.
In "build_bcr_reg_cache", "arc_build_reg_cache" check
if list is not empty.
29.12.2019
-Moved code from arc_v2.c to arc.c
-Added checks of the result of calloc/malloc calls
-Reworked arc_cmd.c: replaced spagetty code with functions
-Moved to one style in if statements - to "if(!bla)"
-Changed Licence headers
22.01.2020
-Removed unused variables in arc_common
-Renamed register operation functions
-Introduced arc_deinit_target function
-Fixed interrupt handling in halt/resume:
* add irq_state field in arc_common
* fix irq enable/disable calls ( now STATUS32 register is used)
-Switched from buf_set(get)_us32() usage to target_buffer_set(get)_u32()
-Made some cleanup
30.01.2020
-Removed redundant arc_register struct, moved target link to arc_reg_desc
-Introduced link to BCR reg cache in arc_common for freeing memory.
-Now arc_deinit_target frees all arc-related allocated memory.
Valgrind shows no memory leaks.
-Inroduced arch description in arc.c
01.02.2020
-Remove small memory allocations in arc_init_reg. Instead created reg_value
and feature fields in arc_reg_desc.
-Add return value for arc_init_reg() func.
-Replaced some integer constants(61,62,63) with defines.
-Removed redundant conversions in arc_reg_get_field().
-Moved iccm/dccm configuration code from arc_configure()
to separate functions.
19.02.2020
-Change sizeof(struct) to sizeof(*ptr) in allocations
-Changed if/while(ptr != NULL) to if/while(ptr)
-Removed unused variables from struct arc_jtag
-Add additional structs to arc_reg_data_type
to reduce amount of memory allocations calls
and simplifying memory freeing.
-Add helper arc_reg_bitfield_t struct which includes
reg_data_type_bitfield object and char[] name. Reduces
memory allocations calls.
-Add limit for reg_type/reg_type_field names(20 symbols).
-Add in jim_arc_add_reg_type*() functions additional
argnument checks(amount of field/name size).
-In jim_arc_add_reg_type*() reduced amount of memory allocations.
-Cleanup of jim_arc_add_reg_type*() functions.
-For commands update ".usage" fields according docopt.
-Cleanup in arc_jtag.c
-Renamed functions which require jtag_exeutre_queue() to arc_jtag_enque_*()
-Add arc_jtag_enque_register_rw() function, which r/w to jtag ir/dr regs
during regiter r/w.
24.02:
-Change include guards in arc* files according coding style
-Remove _t suffix in struct arc_reg_bitfield_t
-Some cleanup
Antonio Borneo [Sun, 5 May 2019 19:26:56 +0000 (21:26 +0200)]
coding style: fix space around pointer's asterisk
The script checkpatch available in new Linux kernel offers an
experimental feature for automatically fix the code in place.
While still experimental, the feature works quite well for simple
fixes, like spacing.
This patch has been created automatically with the script under
review for inclusion in OpenOCD, using the command
find src/ -type f -exec ./tools/scripts/checkpatch.pl \
-q --types POINTER_LOCATION --fix-inplace -f {} \;
then manually reviewed.
OpenOCD coding style does not mention the space around pointer's
asterisk, so no check is enforced. This patch only makes the style
uniform across the files.
The patch only changes amount and position of whitespace, thus
the following commands show empty diff
git diff -w
git log -w -p
git log -w --stat
Change-Id: Iefb4998e69bebdfe0d1ae65cadfc8d2c4f166d13 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5197 Tested-by: jenkins
Antonio Borneo [Fri, 14 Jun 2019 08:00:06 +0000 (10:00 +0200)]
log: let command "log_output" to set back its default
The default log output is stderr. After the command "log_output"
has been used to set an output log file, it is possible to return
back to stderr only on *NIX hosts specifying a new log output file
as "/dev/stderr", but this is not intuitive, not documented and
not portable out of *NIX.
Make command "log_output" able to set back the default output to
stderr when the parameter is either "default" or is missing.
While there, add debug message to log the change and make the
command return error on incorrect syntax.
Change-Id: I8c7c929780f58e2c23936737c8e7274a96734786 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5233 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Antonio Borneo [Thu, 23 Jan 2020 14:18:33 +0000 (15:18 +0100)]
adi_v5_dapdirect: fix connect under reset
Deassert the reset only if connect under reset is not required;
otherwise, assert the reset.
This fix aligns the behavior of connect under reset in dapdirect
with the behavior in jtag and swd.
Change-Id: I937ef4320b44e51ef6cb0e349e12348dbfbe4abb Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5415 Tested-by: jenkins
Marc Schink [Mon, 10 Feb 2020 14:39:19 +0000 (15:39 +0100)]
flash/nor/stm32h7x: Minor code cleanups
Change-Id: Ia212b1877abeda27f507de29a3aee2b171c1b8c6 Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5448 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Christopher Head <chead@zaber.com>