Cortex-M uses only 2 byte breakpoint instruction.
cortex_m_unset_breakpoint() does not need to check breakpoint->length,
use the length as the size argument in target_write_memory()
Change-Id: I20bb869f6abce2fc61f0469e34a638bc4dc6f7ce Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4889 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-by: Jānis Skujenieks <janis.skujenieks@gmail.com> Reviewed-by: Christopher Head <chead@zaber.com>
Christopher Head [Thu, 13 Dec 2018 19:53:59 +0000 (11:53 -0800)]
Constify struct flash_driver instances
Instances of struct flash_driver are never written to at runtime. For a
small amount of memory saving and also robustness (fewer things for
stray pointer writes to hit), mark them const.
Change-Id: Iadbbbc2fac0976d892699200000c5f02856729f3 Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4803 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Antonio Borneo [Thu, 7 Mar 2019 21:34:29 +0000 (22:34 +0100)]
smp: move sub-command "smp_gdb" in file smp.c
The code for this command is currently replicated in cortex_a and
in mips_m4k and is going to be added again for cortex_m.
Plus, it is going to be obsoleted by the HW thread pseudo RTOS.
Consolidate in smp.c a single instance of the command. This will
simplify both obsoleting it and adding it to cortex_m, whatever
change comes first.
Antonio Borneo [Thu, 19 Jul 2018 09:50:56 +0000 (11:50 +0200)]
smp: replace commands smp_on/smp_off with "smp [on|off]"
Seams over-engineered having two separate commands to turn SMP
on/off. Plus it is missing the possibility to dump the current
status of SMP and would be weird adding an additional command
for it. Moreover, such commands are replicated in few targets so
it would make sense centralizing them.
- Deprecate the commands "smp_on" and "smp_off".
- Add a new command "smp" that accepts optional parameters
"[on|off]" and prints the SMP status when run without
parameters. This replaces the two commands above.
- Put the deprecated and the new command handlers in smp.c
- Update the documentation, except for mips_m4k, since it is not
available yet.
- Promote the macro foreach_smp_target to global context and use
it where possible.
Change-Id: Ia72841c1a3bd6edd4db4cc809046322f498617e6 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4615 Tested-by: jenkins Reviewed-by: Graham Sanderson <graham.sanderson@gmail.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Tim Newsome [Fri, 15 Feb 2019 20:08:51 +0000 (12:08 -0800)]
Lots of RISC-V improvements.
This represents months of continuing RISC-V work, with too many changes
to list individually. Some improvements:
* Fixed memory leaks.
* Better handling of dbus timeouts.
* Add `riscv expose_custom` command.
* Somewhat deal with cache coherency.
* Deal with more timeouts during block memory accesses.
* Basic debug compliance test.
* Tell gdb which watchpoint hit.
* SMP support for use with -rtos hwthread
* Add `riscv set_ir`
Some boards require a slower clock speed because of passive components on the
JTAG/SWD lines. The previous implementation would first try to discover the
chips on the default speed, and only after discovery switch to the requested
adapter_khz speed.
This patch moves the speed change to just before entering the SWD/JTAG mode,
which should alleviate this problem.
Marek Vasut [Fri, 1 Mar 2019 12:56:44 +0000 (13:56 +0100)]
mips32: pracc: Fix UPPER/LOWER macros
These macros are missing parenthesis around the argument, which can
lead to side effects, add them. Replace the argument name to avoid
conflict with uint32_t data type, since the macro can be applied to
other data types as well.
Christopher Head [Tue, 30 Oct 2018 21:37:22 +0000 (14:37 -0700)]
flash/stm32h7x: remove IWDG1_SW separate variable
Bit 4 in OPTSR is IWDG1_SW (the code originally called it IWDG1_HW, but
the reference manual refers to it as IWDG1_SW). This is broken out into
a separate variable, independent_watchdog_selection, in stm32x_options.
However, this is not necessary: bit 4 is included in the user_options
field, which includes all of bits 2 through 7, and
independent_watchdog_selection is not referenced anywhere else. Delete
the field and just rely on user_options to transport that bit, along
with all the other bits it contains, between stm32x_read_options and
stm32x_write_options.
Change-Id: I4da63df9272cf091267b956c412b95671ea1d3c9 Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4744 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Antonio Borneo [Thu, 28 Feb 2019 11:29:49 +0000 (12:29 +0100)]
target/adi_v5_swd: improve error check while updating DP_SELECT
Write to register DP_SELECT can fail, but both functions
swd_queue_dp_bankselect() and swd_queue_ap_bankselect() return
void and do not propagate the error.
Change the return type of the two functions to int and check the
returned value.
Invalidate the cached value of DP_SELECT if the write fails.
Change-Id: Iba6ef8b0c2332e7f7efb66337d558fb7a4a0d39c Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4980 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Antonio Borneo [Thu, 28 Feb 2019 10:31:11 +0000 (11:31 +0100)]
target/adi_v5_swd: update cached value on write to DP_SELECT
When the register DP_SELECT is written directly, e.g. with command
<dap> dpreg 8 <value>
the cached value in OpenOCD is not completely updated with the new
value, thus creating issues in the following AP and DP read/write
that rely on the cached value.
Update the cached value while writing to DP_SELECT.
Change-Id: I8221b10cd6fc1fbe73e6b834b68820b43480e1a2 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4979 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tim Newsome [Mon, 25 Feb 2019 22:02:30 +0000 (14:02 -0800)]
gdb_server, target: Add target_address_bits()
Targets can use this to expose how many address bits there are.
gdb_server uses this to send gdb the appropriate upper limit in the
memory-map. (Before this change the upper limit would only be correct
for 32-bit targets.)
Change-Id: Idb0933255ed53951fcfb05e040674bcdf19441e1 Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4947 Tested-by: jenkins Reviewed-by: Peter Mamonov <pmamonov@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
This patch adds "hwthread", a pseudo rtos that represents cpu cores
in an SMP system as threads to gdb. This allows to debug SMP
system kernels in a more sensible manner and removes the current
atrocities of switching gdb manually between CPU cores to update
the context.
Antonio Borneo [Fri, 7 Dec 2018 21:11:12 +0000 (22:11 +0100)]
drivers/stlink_usb: fix stlink_usb_read_regs() for API v2
API v2 implementation for command READALLREGS returns the status
in the first two bytes, followed by two bytes of padding.
This makes the reply 4 bytes longer and changes the offset of the
first register value to 4.
Fix it for the case API v2 and clean-up the management of the
return value.
Change-Id: I448c82bcc0baa72d66fdfe7f0c525b94f8a4468b Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4824 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Antonio Borneo [Tue, 5 Feb 2019 10:25:19 +0000 (11:25 +0100)]
stlink: handle error GET_IDCODE
When the connection with target is lost on the physical JTAG/SWD
link (either wire disconnected or DAP/TAP in reset), STLINK fail
to connect and returns error STLINK_JTAG_GET_IDCODE_ERROR.
Add it in the list of known errors.
Change-Id: Iabd6e6892111726f614345497d9286554bfe4ac0 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4982 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
Antonio Borneo [Sun, 3 Feb 2019 20:07:31 +0000 (21:07 +0100)]
stlink: handle error bad-AP
The new firmwares for ST-Link support handling multiple AP, but
are (actually) limited to the AP number in range [0..8].
Any tentative to operate on AP number higher than 8 returns an
error "bad AP".
Add the error code and the related message.
Change-Id: I78a98b2612d10e580d03fc43ed9f2b09619d39d8 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4981 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
Antonio Borneo [Sun, 24 Feb 2019 17:19:44 +0000 (18:19 +0100)]
stlink: remove unused assignment
Fix a warning identified by clang 7.0.1:
stlink_usb.c:1092:3: warning: Value stored to 'p' is never read
p += sprintf(p, "S%d", swim);
^ ~~~~~~~~~~~~~~~~~~~~~~~
Change-Id: Ic9da57e19ceecb0e3d65d3ea3412a05e1c2c779a Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4945 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Antonio Borneo [Fri, 15 Feb 2019 23:23:25 +0000 (00:23 +0100)]
gdb_server: fix 'null' pointer passed as 'nonnull' parameter
The null pointer used as second parameter to gdb_put_packet() is
passed as second parameter to the memcpy() in line 408 of
gdb_put_packet_inner(). In this case memcpy() does not segfault
because also the parameter length is zero. Nevertheless, the
prototype of memcpy() requires a nonnull pointer.
Fixed by passing an empty string in place of the null pointer.
Issue highlighted by clang 7.0.0 with warning message:
"Null pointer passed as an argument to a 'nonnull' parameter"
Change-Id: Ib3dde95d76fcc5fb245ee2d6669e5535d0e0b127 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4946 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Diego Herranz [Wed, 13 Feb 2019 08:33:17 +0000 (08:33 +0000)]
src/jtag/drivers/ftdi: fix swd pin comment and links
- TDI/DO is not pin 2 and in fact, we don't even need to mention which
pin number it is. "TDI/DO pin" is descriptive enough.
- FT2232D link didn't work anymore. It could have been updated to the
current working FT2232D link but changed to link the FT2232H instead
which is the latest generation and the most commonly used these days.
- Taking advantage of the change, link to the MPSSE document updated.
It still worked but through a redirection, so updated just in case the
redirection stops working.
Change-Id: Ia7d01bbcac2158026831edb010a6b50f58351e42 Signed-off-by: Diego Herranz <diegoherranz@diegoherranz.com>
Reviewed-on: http://openocd.zylin.com/4908 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Antonio Borneo [Wed, 7 Nov 2018 16:55:43 +0000 (17:55 +0100)]
gdb_server: remove warning for stepi after gdb_sync
The command "gdb_sync" is used to resynchronize gdb with OpenOCD.
It is supposed to be follow by the gdb command "stepi" that will
be ignored by OpenOCD.
Don't annoy the user with a warning message when the stepi
command is ignored, but simply log a debug message.
Change-Id: Ie4cffa89e761d7335e5961900b62e31f209d4b1b Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4764 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Moritz Fischer [Mon, 21 Jan 2019 17:24:12 +0000 (09:24 -0800)]
flash: stm32f2/f4/f7: Add One-Time-Porgrammable (OTP) support
The OTP is part of the flash memory. It has 512 (1024 for F7) bytes
and is organized in 16 sectors with 32 (64 for F7) bytes each.
The OTP is exposed as separate flash bank 1 and can be used
with the usual flash commands.
Antonio Borneo [Fri, 15 Feb 2019 20:33:34 +0000 (21:33 +0100)]
cortex_a: fix a potential memory leak in cortex_a_target_create()
If the function cortex_a_target_create() or the function
cortex_r4_target_create() exit for an error, the value of pointer
cortex_a get lost, causing a memory leak.
Move the allocation of cortex_a after the check on the parameters.
While there, add checks on the value returned by calloc().
Issue highlighted by clang 7.0.0.
Change-Id: Ic6eeb9c3b39922d016f6d0319eada1a97a6681f0 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4925 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Recent patches for STM32L4+ assumed all STM32L4 processors have a dual-
bank option. This is not the case for STM32L4{3,4,5,6}xx processors and
therefore, these processors (like STM32L433) failed when attempting to
flash the second half of the flash memory. This patch fixed this issue.
Tested on STM32L433xC, STM32L476xG and STM32L471xG.
Change-Id: I8262ba4f05190802c5868d753f3e7af50e581811 Signed-off-by: Armin van der Togt <armin@otheruse.nl>
Reviewed-on: http://openocd.zylin.com/4913 Tested-by: jenkins Reviewed-by: Peter Tettelaar <peter@float-iot.nl> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Mark Schulte <mschulte@lyft.com>
Tomas Vanek [Thu, 24 Jan 2019 13:33:16 +0000 (14:33 +0100)]
target, breakpoints: improve error handling
handle_bp_command_set() showed the error message
"Failure setting breakpoint, the same address(IVA) is already used"
on any error returned from (xxx_)breakpoint_add().
Paradoxically breakpoint_add() returned ERROR_OK if it detected
duplicated bp address.
context_breakpoint_add() and hybrid_breakpoint_add() returned -1
instead of OpenOCD compatible error if they detected duplicity.
Introduce ERROR_TARGET_DUPLICATE_BREAKPOINT
Unify error handling to LOG_ERROR() any error in (xxx_)breakpoint_add()
Remove misleading error messages from handle_bp_command_set()
handle_bp_command_set() returns error if the target does not implement
add_context_breakpoint or add_hybrid_breakpoint.
Antonio Borneo [Thu, 7 Feb 2019 08:56:10 +0000 (09:56 +0100)]
command: fix the mode for command "jtag configure"
Before commit 877cec20dca6e78f9f029f0f173879cda101a6c2 ("command:
check command mode for native jim commands") all the jim commands
were erroneously treated as they had mode COMMAND_ANY.
The commit above fixes the code in order to check the mode and
permit running the commands only if the mode is respected.
Those jim commands that have incorrect mode were not detected nor
fixes because the wrong mode was masked by the missing mode check.
After the commit above, the wrong mode triggers error in several
existing configuration scripts.
A complete list of commands that now does not run anymore as
CONFIG_ANY is reported in ticket 225, but most of them have the
mode set correctly.
At least two instances of command "jtag configure" have the wrong
mode.
Fix the mode to CONFIG_ANY for command "jtag configure" in files
src/jtag/aice/aice_transport.c and src/jtag/tcl.c
Change-Id: I3f96c5fd24d7d463712cbaf1295284fe0dc56b23
Ticket: https://sourceforge.net/p/openocd/tickets/225/ Reported-by: Bill Paul <wpaul@users.sourceforge.net> Fixes: 877cec20dca6 ("command: check command mode for native jim commands") Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4886 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
Kevin Vermilion [Wed, 30 Jan 2019 19:01:48 +0000 (11:01 -0800)]
at91samd: Add flash programming support for SAMC2?N* parts
Added id, name, flash size and RAM size for following parts to samc20_parts[]:
SAMC20N18A
SAMC20N17A
And the following to samc21_parts[]:
SAMC21N18A
SAMC21N17A
Change-Id: Ie8cf1c531a60bfaed6e814d436d232afb89dae3f Signed-off-by: Kevin Vermilion <kevin.vermilion@gmail.com>
Reviewed-on: http://openocd.zylin.com/4880 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
target start_algorithm: Don't copy the IN mem_params fix uninitialised value.
Fix the write only out params TODO on armv7m.c
Fix conditional move depends on uninitialised value.
It was detected while programming a LPC8Nxx with a FTDI adapter.
valgrind --leak-check=full --show-leak-kinds=all --track-origins=yes
[...]
==8696== Conditional jump or move depends on uninitialised value(s)
==8696== at 0x16E4D3: buf_set_u32 (binarybuffer.h:52)
==8696== by 0x16E4D3: ftdi_swd_queue_cmd (ftdi.c:1206)
==8696== by 0x18D76D: swd_queue_ap_write (adi_v5_swd.c:271)
==8696== by 0x18E33B: dap_queue_ap_write (arm_adi_v5.h:382)
==8696== by 0x18E33B: mem_ap_write (arm_adi_v5.c:420)
==8696== by 0x197CD9: target_write_buffer_default (target.c:2176)
==8696== by 0x2464B3: armv7m_start_algorithm (armv7m.c:383)
==8696== by 0x246AEB: armv7m_run_algorithm (armv7m.c:330)
==8696== by 0x19D846: target_run_algorithm (target.c:814)
==8696== by 0x1DF3A6: lpc2000_iap_call.isra.3 (lpc2000.c:818)
==8696== by 0x1E0CF6: lpc2000_erase (lpc2000.c:992)
==8696== by 0x185BDF: flash_driver_erase (core.c:44)
==8696== by 0x18650D: flash_iterate_address_range_inner (core.c:541)
==8696== by 0x18650D: flash_iterate_address_range (core.c:567)
==8696== by 0x18732F: flash_erase_address_range (core.c:584)
==8696== by 0x18732F: flash_write_unlock (core.c:928)
==8696== Uninitialised value was created by a heap allocation
==8696== at 0x4C2BBAF: malloc (vg_replace_malloc.c:299)
==8696== by 0x220EF9: init_mem_param (algorithm.c:30)
==8696== by 0x1DF247: lpc2000_iap_call.isra.3 (lpc2000.c:777)
==8696== by 0x1E0CF6: lpc2000_erase (lpc2000.c:992)
==8696== by 0x185BDF: flash_driver_erase (core.c:44)
==8696== by 0x18650D: flash_iterate_address_range_inner (core.c:541)
==8696== by 0x18650D: flash_iterate_address_range (core.c:567)
==8696== by 0x18732F: flash_erase_address_range (core.c:584)
==8696== by 0x18732F: flash_write_unlock (core.c:928)
==8696== by 0x18ACDF: handle_flash_write_image_command (tcl.c:457)
==8696== by 0x1B7D99: run_command (command.c:623)
==8696== by 0x1B7D99: script_command_run (command.c:208)
==8696== by 0x1B7FD9: command_unknown (command.c:1033)
==8696== by 0x2E2D37: JimInvokeCommand (jim.c:10364)
==8696== by 0x2E3865: Jim_EvalObj (jim.c:10814)
==8696==
==8696== Conditional jump or move depends on uninitialised value(s)
==8696== at 0x16E506: buf_set_u32 (binarybuffer.h:52)
==8696== by 0x16E506: ftdi_swd_queue_cmd (ftdi.c:1207)
==8696== by 0x18D76D: swd_queue_ap_write (adi_v5_swd.c:271)
==8696== by 0x18E33B: dap_queue_ap_write (arm_adi_v5.h:382)
==8696== by 0x18E33B: mem_ap_write (arm_adi_v5.c:420)
==8696== by 0x197CD9: target_write_buffer_default (target.c:2176)
==8696== by 0x2464B3: armv7m_start_algorithm (armv7m.c:383)
==8696== by 0x246AEB: armv7m_run_algorithm (armv7m.c:330)
==8696== by 0x19D846: target_run_algorithm (target.c:814)
==8696== by 0x1DF3A6: lpc2000_iap_call.isra.3 (lpc2000.c:818)
==8696== by 0x1E0CF6: lpc2000_erase (lpc2000.c:992)
==8696== by 0x185BDF: flash_driver_erase (core.c:44)
==8696== by 0x18650D: flash_iterate_address_range_inner (core.c:541)
==8696== by 0x18650D: flash_iterate_address_range (core.c:567)
==8696== by 0x18732F: flash_erase_address_range (core.c:584)
==8696== by 0x18732F: flash_write_unlock (core.c:928)
==8696== Uninitialised value was created by a heap allocation
==8696== at 0x4C2BBAF: malloc (vg_replace_malloc.c:299)
==8696== by 0x220EF9: init_mem_param (algorithm.c:30)
==8696== by 0x1DF247: lpc2000_iap_call.isra.3 (lpc2000.c:777)
==8696== by 0x1E0CF6: lpc2000_erase (lpc2000.c:992)
==8696== by 0x185BDF: flash_driver_erase (core.c:44)
==8696== by 0x18650D: flash_iterate_address_range_inner (core.c:541)
==8696== by 0x18650D: flash_iterate_address_range (core.c:567)
==8696== by 0x18732F: flash_erase_address_range (core.c:584)
==8696== by 0x18732F: flash_write_unlock (core.c:928)
==8696== by 0x18ACDF: handle_flash_write_image_command (tcl.c:457)
==8696== by 0x1B7D99: run_command (command.c:623)
==8696== by 0x1B7D99: script_command_run (command.c:208)
==8696== by 0x1B7FD9: command_unknown (command.c:1033)
==8696== by 0x2E2D37: JimInvokeCommand (jim.c:10364)
==8696== by 0x2E3865: Jim_EvalObj (jim.c:10814)
Change-Id: I50f9a8c4516b686cf62ac3c76f47c53465e949da Signed-off-by: Jean-Christian de Rivaz <jcamdr70@gmail.com>
Reviewed-on: http://openocd.zylin.com/4811 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Jan Vojtech [Tue, 4 Sep 2018 09:50:09 +0000 (11:50 +0200)]
flash/nor/stm32f1x: Ability to change user option bytes.
Adds ability to change the user data in STM32F1x/STM32F3x MCU's option byte.
Since OpenOCD prints the content of user data in option byte registers, it
is seems logical to also provide a way how to change this data.
Change-Id: Ie6cb756b4f11b5c6dabd34bc89434a358eb758ff Signed-off-by: Jan Vojtech <honza.vojtech@gmail.com> Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4663 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Tomas Vanek [Tue, 18 Dec 2018 16:17:33 +0000 (17:17 +0100)]
target algo: do not write reg_param if direction is PARAM_IN
Without this change xxx_start_algorithm() writes all register
parameters no matter of their direction. It usually results
in writing of uninitialized reg_params[].value - possibly
reported by valgrind.
While on it fix the wrong parameter direction in
kinetis_disable_wdog_algo(). This bug did not have any
impact because of unconditional write of reg_params.
Change-Id: Ia9c6a7b37f77d5eb6e5f5463012dddd50471742b Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4813 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Oleksij Rempel [Wed, 27 Jun 2018 12:54:21 +0000 (14:54 +0200)]
jtag: drivers: provide initial support for usb path filtering
With this patch drivers will be able to use usb path filtering.
The path format is identical to the format provided by linux kernel:
bus-port.port....
With this format it should be easier just to copy and paste
path found in dmesg.
Tomas Vanek [Fri, 27 Oct 2017 19:43:25 +0000 (21:43 +0200)]
flash/nor: flash driver and cfg for SAM E54, E53, E51 and D51
The new Microchip (former Atmel) series powered by Cortex-M4 looks
very similar to older M0+ powered SAM D2x at the first sight.
Unfortunately the new series differs a lot in important details.
NVMCTRL has different register addresses, moved important bits
and even changed binary command set. An universal driver for all SAM D/E
would be very complicated. That's why a new driver was derived.
Tested on Microchip SAM E54 Xplained Pro kit (board cfg included).
Adjusted for the restructured dap support.
Checked by valgrind and clang static analyzer.
Change-Id: I26c67047a552076f4b207b9b89285a53d69b4ca4 Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4272 Tested-by: jenkins Reviewed-by: Andres Vahter <andres.vahter@gmail.com>
Tomas Vanek [Sat, 19 Jan 2019 13:58:49 +0000 (14:58 +0100)]
flash/nor/stm32f1x: fix minor error messages
Change-Id: I1e9e62979c4629c8ba1d5ae89ca7392259969eb6 Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4858 Tested-by: jenkins Reviewed-by: Christopher Head <chead@zaber.com>
Tomas Vanek [Sat, 19 Jan 2019 09:26:38 +0000 (10:26 +0100)]
cortex_m: fix stepping on FPB rev 1
Stepping in the maskisr auto mode sets breakpoint to step over interrupt
service tasks. If the device has FPB rev 1, setting hard breakpoint
is impossible on address over 0x1fffffff.
Use soft type breakpoint for adresses over 0x1fffffff if FPB is rev 1.
This may eventually fail if the code memory is not writeable, but there
is nothing to do in such case.
Change-Id: Ibdeeb506903a35d550b64f82c24c37a668de62b3 Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4857 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
samr34/r35 combine SAML21 and SX1276 (lora transceiver). This one was found on
xplaned pro evaluation kit. Ids for other r34/r35 chips are apparently not yet
documented.
Antonio Borneo [Wed, 29 Aug 2018 09:57:42 +0000 (11:57 +0200)]
arm_adi_v5: rewrite dap_to_jtag and dap_to_swd
The functions dap_to_jtag() and dap_to_swd() have been introduced by 3ef9beb52cd0 ("ADIv5 DAP ops switching to JTAG or SWD modes") in
arm_adi_v5.c by using the JTAG queue only.
Later, in 6f8b8593d63b ("ADIv5 transport support moves to separate
files") the functions has been moved in adi_v5_swd.c and adi_v5_jtag.c
but keeping the dependency from JTAG queue.
The functions does not work if the current transport is not JTAG.
Move back the functions in arm_adi_v5.c, replace the input parameter
"target" with "dap", use the transport to detect if the JTAG queue is
present, in case of SWD transport use the proper method, for other
transports report error.
Reuse the ADI v5 sequences already present in jtag/swd.h.
Also, OpenOCD does not support switching to another transport after
the initial selection, so do not change DAP's ops vector.
Antonio Borneo [Sat, 19 Jan 2019 23:52:07 +0000 (00:52 +0100)]
command: initialize the command mode for every command
All the commands in OpenOCD have been inspected and have the
command mode initialize, apart for two of them.
This is not critical, because the uninitialized value (0) is
equivalent to the enum COMMAND_EXEC, that is also the correct
value for the two mentioned commands.
To keep the code consistent, initialize the command mode to
COMMAND_EXEC.
Change-Id: Iaf043364cbd1005418d787ed045a3ec653612382 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4861 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Peter Lawrence [Thu, 17 Jan 2019 00:00:34 +0000 (18:00 -0600)]
tcl: Support for Analog Devices ADSP-SC58x / ADSP-SC584-EZBRD
The original script was broken by changes to the Cortex-A code. The
recent introduction of the mem_ap target provided a new mechanism to
allow the script to be fixed. This also adds an example board script
for the ADSP-SC584-EZBRD.
Change-Id: I36bc1ac6b6c036539f4175f1e65223ba10a35355 Signed-off-by: Peter Lawrence <majbthrd@gmail.com>
Reviewed-on: http://openocd.zylin.com/4855 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Correct ZynqMP configuration to be appropriately named
The xilinx_ultrascale.cfg target is actually the configuration for a
ZynqMP, which is a combination of an UltraScale+ FPGA core and a quad
core A53. Update the filename/comments to reflect this, and include
the tap IDs for all known FPGA cores for this part.
Antonio Borneo [Tue, 15 Jan 2019 14:51:13 +0000 (15:51 +0100)]
arm_opcode: fix encoding of ARMv5 breakpoint instruction
The encoding of BKPT instruction is 0xE12###7#, where the four '#'
characters should be replaced by the 16 bits immediate value.
The macro uses an incorrect shift amount, thus the immediate value
is not properly coded and bits 20~23 of the opcode could get
corrupted.
Antonio Borneo [Wed, 29 Aug 2018 08:55:48 +0000 (10:55 +0200)]
arm_adi_v5: fix and update sequences to spec IHI 0031E
Fix the SWD line reset sequence accordingly to Arm specification IHI
0031E that requires at least 2 idle clocks after the 50 clocks with
SWDIO high.
Fix the value of the activation code in the (currently unused)
sequence dormant-to-SWD.
Make each sequence's length multiple of 8, so it is compatible with
adapters that have such limitation (e.g. buspirate) and try to split
and comment each part of the sequence (when possible keep each part
byte aligned, inspired from commit 3ef9beb52cd0). This slightly
increases the sequence length but does not impact run-time
performance because these are rarely used sequences.
Add the missing sequence dormant-to-JTAG and JTAG-to-dormant, not
used yet.
On devices that implements the dormant state, IHI 0031E deprecates
the direct switching between SWD and JTAG, and recommends using a
transition through dormant. This is not implemented.