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flash/nor/at91samd: Use 32-bit register writes for ST-Link compat
[fw/openocd] / src / target / riscv / debug_defines.h
2022-08-15 Tim Newsometarget/riscv: Update debug_defines.h. blob | commitdiff | raw
2021-11-20 Jan Matyasriscv: Regenerated debug_defines.h and encoding.h blob | commitdiff | raw | diff to current
2021-10-25 Tim NewsomeUpstream a whole host of RISC-V changes. blob | commitdiff | raw | diff to current
2020-10-14 Tim NewsomeUpstream tons of RISC-V changes. blob | commitdiff | raw | diff to current
2018-07-24 Tim NewsomeAdd RISC-V support. blob | commitdiff | raw | diff to current
openocd with support for Altus Metrum targets