From: Bdale Garbee Date: Thu, 15 Dec 2011 16:52:26 +0000 (-0500) Subject: fix via annular ring dimensions on all except U9 X-Git-Url: https://git.gag.com/?a=commitdiff_plain;h=a5e1768bc39fcad6fd11d1aa3d072d2bce7f5823;p=hw%2Fteleshield fix via annular ring dimensions on all except U9 --- diff --git a/teleshield.pcb b/teleshield.pcb index a1cdc1e..7574cd3 100644 --- a/teleshield.pcb +++ b/teleshield.pcb @@ -6,13 +6,13 @@ FileVersion[20070407] PCB["Diavolino" 270000 210000] Grid[100.0 0 0 0] -Cursor[3900 14400 0.000000] +Cursor[1800 1100 0.000000] PolyArea[200000000.000000] Thermal[0.500000] -DRC[800 800 800 700 1800 1200] -Flags("nameonpcb,clearnew,snappin") +DRC[600 1000 600 500 1500 700] +Flags("nameonpcb,snappin") Groups("1,c:2,s:3") -Styles["Signal,1000,2800,1500,800:Power,2500,6000,3500,1000:Fat,4000,6000,3500,1000:Skinny,800,2402,1600,800"] +Styles["Signal,1000,2900,1500,700:Power,2500,6000,3500,1000:Fat,4000,6000,3500,1000:Skinny,600,2402,1181,600"] Symbol[' ' 1800] ( @@ -798,19 +798,20 @@ Attribute("PCB::grid::unit" "mil") Via[60000 10000 15000 2000 0 12600 "" ""] Via[260000 70000 15000 2000 0 12600 "" ""] Via[260000 180000 15000 2000 0 12600 "" ""] -Via[261500 95000 3000 2000 0 1800 "" "thermal(1S)"] -Via[261500 115000 3000 2000 0 1800 "" "thermal(1S)"] -Via[97100 168600 2800 1600 0 1500 "" "thermal(1S)"] -Via[193400 30900 2800 1600 0 1500 "" "thermal(1S)"] -Via[34800 188800 2800 1600 0 1500 "" "thermal(1S)"] -Via[43600 203100 2800 1600 0 1500 "" "thermal(0X,1S)"] -Via[47900 196500 2800 1600 0 1500 "" ""] -Via[19500 194900 2800 1600 0 1500 "" "thermal(1S)"] -Via[242200 91500 2800 1600 0 1500 "" "thermal(0X,1S)"] -Via[244000 132200 2800 1600 0 1500 "" "thermal(1S)"] -Via[225000 124100 2800 1600 0 1500 "" "thermal(1S)"] -Via[230900 90800 2800 1600 0 1500 "" "thermal(1S)"] -Via[234400 110400 2800 1600 0 1500 "" ""] +Via[261500 95000 2900 2000 0 1500 "" "thermal(0S,1S)"] +Via[261500 115000 2900 2000 0 1500 "" "thermal(0S,1S)"] +Via[230900 90800 2900 2000 0 1500 "" "thermal(1S)"] +Via[242300 91500 2900 2000 0 1500 "" "thermal(1S)"] +Via[234400 110500 2900 1400 0 1500 "" ""] +Via[236100 114100 2900 1400 0 1500 "" "thermal(1S)"] +Via[97100 168500 2900 1400 0 1500 "" "thermal(1S)"] +Via[193400 30900 2900 1400 0 1500 "" "thermal(1S)"] +Via[34800 188800 2900 1400 0 1500 "" "thermal(1S)"] +Via[43700 203100 2900 1400 0 1500 "" "thermal(1S)"] +Via[47900 196600 2900 1400 0 1500 "" ""] +Via[19400 194900 2900 1400 0 1500 "" "thermal(1S)"] +Via[225000 124100 2900 1400 0 1500 "" "thermal(1S)"] +Via[244000 132300 2900 1400 0 1500 "" "thermal(1S)"] Element["" "0402" "C37" "1uF" 172926 131600 -2016 2623 0 100 ""] ( @@ -1248,11 +1249,11 @@ Element["" "0402" "C2" "47pF" 30674 190700 -1939 1186 0 100 ""] Element["" "0-215079-4" "J6" "Debug" 233589 54613 -30928 -7928 0 100 ""] ( - Pin[0 -10000 6299 1200 7299 3150 "1" "1" "selected,square,edge2,thermal(1t)"] - Pin[-5000 0 6299 1200 7299 3150 "2" "2" "selected,edge2"] - Pin[-10000 -10000 6299 1200 7299 3150 "3" "3" "selected,edge2"] - Pin[-15000 0 6299 1200 7299 3150 "4" "4" "selected,edge2"] - Pin[5511 -2913 7306 1400 7906 5906 "mnt" "0" "selected,edge2"] + Pin[0 -10000 6299 1200 7299 3150 "1" "1" "square,edge2,thermal(1t)"] + Pin[-5000 0 6299 1200 7299 3150 "2" "2" "edge2"] + Pin[-10000 -10000 6299 1200 7299 3150 "3" "3" "edge2"] + Pin[-15000 0 6299 1200 7299 3150 "4" "4" "edge2"] + Pin[5511 -2913 7306 1400 7906 5906 "mnt" "0" "edge2"] ElementLine [9428 -15039 9428 5038 600] ElementLine [-24429 -15039 9428 -15039 600] ElementLine [-24429 -15039 -24429 5038 600] @@ -1427,9 +1428,7 @@ Rat[170400 50300 0 145506 48981 0 ""] Rat[145506 48981 0 145210 58554 0 ""] Rat[145506 48981 0 133500 51307 0 ""] Rat[175500 75407 0 204350 98895 0 ""] -Rat[204350 98895 0 222105 92951 0 ""] -Rat[222105 92951 0 224073 92951 0 ""] -Rat[224073 92951 0 227124 98895 0 ""] +Rat[204350 98895 0 222105 93876 0 ""] Rat[228049 100864 0 228049 106769 0 ""] Rat[228049 106769 0 228049 112674 0 ""] Rat[228049 112674 0 212263 116650 0 ""] @@ -1447,22 +1446,22 @@ Rat[79725 171331 0 178056 56540 0 ""] Rat[61090 117217 0 204350 110706 0 ""] Rat[218589 54613 1 220136 116650 0 ""] Rat[223589 44613 1 218168 116650 0 ""] -Rat[148654 48981 0 45250 167000 1 "via"] -Rat[148358 58554 0 45250 167000 1 "via"] -Rat[147952 73207 0 45250 167000 1 "via"] -Rat[171352 131207 0 45250 167000 1 "via"] -Rat[172352 75407 0 45250 167000 1 "via"] -Rat[134534 133778 0 45250 167000 1 "via"] -Rat[180600 116703 0 45250 167000 1 "via"] -Rat[155552 91907 0 45250 167000 1 "via"] -Rat[154700 83207 0 45250 167000 1 "via"] -Rat[157200 101207 0 45250 167000 1 "via"] -Rat[124750 134503 0 45250 167000 1 "via"] -Rat[177254 116703 0 45250 167000 1 "via"] -Rat[96090 117217 0 45250 167000 1 "via"] +Rat[148654 48981 0 1000 1000 1 "via"] +Rat[148358 58554 0 1000 1000 1 "via"] +Rat[147952 73207 0 1000 1000 1 "via"] +Rat[171352 131207 0 1000 1000 1 "via"] +Rat[172352 75407 0 1000 1000 1 "via"] +Rat[134534 133778 0 1000 1000 1 "via"] +Rat[180600 116703 0 1000 1000 1 "via"] +Rat[155552 91907 0 1000 1000 1 "via"] +Rat[154700 83207 0 1000 1000 1 "via"] +Rat[157200 101207 0 1000 1000 1 "via"] +Rat[124750 134503 0 1000 1000 1 "via"] +Rat[177254 116703 0 1000 1000 1 "via"] +Rat[96090 117217 0 1000 1000 1 "via"] Rat[213589 160913 1 204350 106769 0 ""] -Rat[172752 100516 0 204350 100864 0 ""] -Rat[182400 100516 0 204350 102832 0 ""] +Rat[172752 100515 0 204350 100864 0 ""] +Rat[182400 100515 0 204350 102832 0 ""] Rat[218589 170913 1 210294 92951 0 ""] Rat[210294 92951 0 185732 56540 0 ""] Rat[101378 171331 0 172938 56540 0 ""] @@ -1483,8 +1482,8 @@ Rat[92717 171331 0 167820 56540 0 ""] Rat[51091 57376 0 214231 92951 0 ""] Rat[71090 117217 0 204350 112674 0 ""] Rat[157848 83207 0 220136 92951 0 ""] -Rat[180600 110206 0 185548 100516 0 ""] -Rat[177254 110206 0 175900 100516 0 ""] +Rat[180600 110207 0 185548 100515 0 ""] +Rat[177254 110207 0 175900 100515 0 ""] Rat[53300 201100 0 198589 170913 1 ""] Layer(1 "component") ( @@ -1653,18 +1652,30 @@ Layer(1 "component") Line[234000 110000 234400 110400 1000 1600 "clearline"] Line[227124 108737 230437 108737 1000 1600 "clearline"] Line[230437 108737 231800 110100 1000 1600 "clearline"] - Line[231800 110100 231800 113200 1000 1600 "clearline"] - Line[231800 113200 237100 118500 1000 1600 "clearline"] - Line[237100 118500 237100 122746 1000 1600 "clearline"] + Line[231800 110100 231800 114000 1000 1600 "clearline"] + Line[231800 114000 237100 119300 1000 1600 "clearline"] + Line[237100 119200 237100 122746 1000 1600 "clearline"] Line[237100 122746 239054 124700 1000 1600 "clearline"] Line[227124 110706 229506 110706 1000 1600 "clearline"] Line[229506 110706 229700 110900 1000 1600 "clearline"] - Line[229700 110900 229700 113900 1000 1600 "clearline"] - Line[229700 113900 234600 118800 1000 1600 "clearline"] - Line[234600 118800 234600 129200 1000 1600 "clearline"] + Line[229700 110900 229700 115700 1000 1600 "clearline"] + Line[229700 115700 234600 120600 1000 1600 "clearline"] + Line[234600 120600 234600 129200 1000 1600 "clearline"] Line[234600 129200 233300 130500 1000 1600 "clearline"] Line[233300 130500 231483 130500 1000 1600 "clearline"] Line[231483 130500 230000 131983 1000 1600 "clearline"] + Line[233600 98895 233600 88900 1000 1600 "clearline"] + Line[233600 88900 232600 87900 1000 1600 "clearline"] + Line[232600 87900 225200 87900 1000 1600 "clearline"] + Line[225200 87900 224100 89000 1000 1600 "clearline"] + Line[224100 89000 224100 93849 1000 1600 "clearline"] + Line[224100 93849 224073 93876 1000 1600 "clearline"] + Line[222105 93876 222105 90995 1000 1600 "clearline"] + Line[222105 90995 224450 88650 1000 1600 "clearline"] + Line[236100 114100 240800 118800 1000 1400 ""] + Line[240800 118600 257600 118600 1000 1400 ""] + Line[257600 118600 261350 114850 1000 1400 ""] + Line[240700 118600 256400 118600 4000 2000 ""] Polygon("clearpoly") ( [253400 78600] [270000 78600] [270000 98000] [253400 98000]