From: Keith Packard <keithp@keithp.com>
Date: Sun, 22 Nov 2015 01:12:01 +0000 (-0800)
Subject: Include correct files for seeed PCB zip files
X-Git-Tag: telelco-v3.0~647
X-Git-Url: https://git.gag.com/?a=commitdiff_plain;h=a509fca5f1ab3f7ab81bb04b3be7a0af1f525d97;p=hw%2Faltusmetrum

Include correct files for seeed PCB zip files

Was missing a few important bits, like the top soldermask layer.

Signed-off-by: Keith Packard <keithp@keithp.com>
---

diff --git a/pcb.mk b/pcb.mk
index 8766d12..9160a65 100644
--- a/pcb.mk
+++ b/pcb.mk
@@ -119,8 +119,10 @@ $(PROJECT)-seeed.zip: $(PROJECT).bottom.gbr
 		cp $(PROJECT).group2.gbr $(PROJECT).gl2; \
 		cp $(PROJECT).group3.gbr $(PROJECT).gl3; \
 	fi
-	zip $(PROJECT)-seeed.zip $(PROJECT).gbl $(PROJECT).gbs $(PROJECT).gbo \
-		$(PROJECT).gto $(PROJECT).gml $(PROJECT).gtl $(PROJECT).txt \
+	zip $(PROJECT)-seeed.zip \
+		$(PROJECT).gtl $(PROJECT).gts $(PROJECT).gto \
+		$(PROJECT).gbl $(PROJECT).gbs $(PROJECT).gbo \
+		$(PROJECT).gml $(PROJECT).txt \
 		$(PROJECT).gl2 $(PROJECT).gl3
 
 stencil:	$(PROJECT).bottom.gbr $(PROJECT).toppaste.gbr $(PROJECT).outline.gbr