From: Bdale Garbee <bdale@gag.com>
Date: Mon, 8 Aug 2022 17:49:35 +0000 (-0600)
Subject: working on v3.0 schematic, using 11u24 bga
X-Git-Tag: fab-v3.0~18
X-Git-Url: https://git.gag.com/?a=commitdiff_plain;h=8b058e859038ff3db317efb50aee2f048eb8f697;p=hw%2Ftelegps

working on v3.0 schematic, using 11u24 bga
---

diff --git a/telegps.sch b/telegps.sch
index 13faa43..92cb1ae 100644
--- a/telegps.sch
+++ b/telegps.sch
@@ -1,11 +1,11 @@
-v 20201211 2
+v 20220529 2
 C 40000 40000 0 0 0 title-D.sym
 T 68500 41700 9 48 1 0 0 0 1
 TeleGPS
 T 67600 40400 9 10 1 0 0 0 1
 telegps.sch
 T 72400 40400 9 10 1 0 0 0 1
-2.0c
+3.0
 T 69900 40400 9 10 1 0 0 0 1
 1
 T 70600 40400 9 10 1 0 0 0 1
@@ -58,7 +58,7 @@ T 57495 43695 5 10 0 1 0 0 1
 device=IC
 T 56895 42995 5 10 0 1 0 0 1
 footprint=SOT23-5
-T 57700 44200 5 10 1 1 0 0 1
+T 58700 44200 5 10 1 1 0 6 1
 value=TC2185-3.3
 }
 C 59200 42300 1 0 0 gnd.sym
@@ -161,7 +161,7 @@ T 61295 60895 5 10 1 1 0 0 1
 refdes=U5
 T 62395 60195 5 10 0 1 0 0 1
 device=IC
-T 63800 60900 5 10 1 1 0 0 1
+T 64600 60900 5 10 1 1 0 6 1
 value=MAX-8Q
 }
 N 62900 55400 62900 55600 4
@@ -251,44 +251,44 @@ N 55400 43900 55400 43300 4
 N 55400 42400 55400 41500 4
 C 54800 41200 1 0 0 gnd.sym
 C 60800 56100 1 0 0 gnd.sym
-C 42300 45400 1 0 0 3.3V-plus.sym
-N 43700 44300 43700 45400 4
-N 42500 45400 44100 45400 4
-N 43700 42700 44300 42700 4
+C 42300 45500 1 0 0 3.3V-plus.sym
+N 43700 44300 43700 45500 4
+N 42500 45500 44100 45500 4
+N 43700 42700 44700 42700 4
 {
-T 44300 42750 5 10 1 1 0 6 1
+T 44700 42750 5 10 1 1 0 6 1
 netname=cs_flash
 }
-N 41300 43900 40800 43900 4
+N 41300 43900 40600 43900 4
 {
-T 40800 43950 5 10 1 1 0 0 1
+T 40600 43950 5 10 1 1 0 0 1
 netname=sclk1
 }
-N 41300 43500 40800 43500 4
+N 41300 43500 40600 43500 4
 {
-T 40800 43550 5 10 1 1 0 0 1
+T 40600 43550 5 10 1 1 0 0 1
 netname=mosi1
 }
-N 41300 43100 40800 43100 4
+N 41300 43100 40600 43100 4
 {
-T 40800 43150 5 10 1 1 0 0 1
+T 40600 43150 5 10 1 1 0 0 1
 netname=miso1
 }
 C 42400 41600 1 0 0 gnd.sym
-C 44300 44500 1 90 0 capacitor.sym
+C 44300 44600 1 90 0 capacitor.sym
 {
-T 43600 44700 5 10 0 1 90 0 1
+T 43600 44800 5 10 0 1 90 0 1
 device=CAPACITOR
-T 43400 44700 5 10 0 1 90 0 1
+T 43400 44800 5 10 0 1 90 0 1
 symversion=0.1
-T 44300 44500 5 10 0 1 0 0 1
+T 44300 44600 5 10 0 1 0 0 1
 footprint=0402
-T 44500 45300 5 10 1 1 180 0 1
+T 44500 45400 5 10 1 1 180 0 1
 refdes=C4
-T 44200 44600 5 10 1 1 0 0 1
+T 44200 44700 5 10 1 1 0 0 1
 value=0.1uF
 }
-C 44000 44200 1 0 0 gnd.sym
+C 44000 44300 1 0 0 gnd.sym
 C 68600 60400 1 0 0 EMBEDDEDantenna.sym
 [
 L 68700 60800 68600 60900 3 0 0 0 -1 -1
@@ -362,7 +362,7 @@ T 49495 40995 5 10 0 1 0 0 1
 footprint=SOT23-5
 T 49795 44495 5 10 1 1 0 0 1
 refdes=U6
-T 50700 44500 5 10 1 1 0 0 1
+T 51600 44500 5 10 1 1 0 6 1
 value=MCP73831
 }
 N 47400 43900 47400 43200 4
@@ -480,44 +480,43 @@ T 41595 45195 5 10 1 1 0 0 1
 refdes=U1
 T 41300 41900 5 10 0 1 0 0 1
 footprint=SOIJ8
-T 41300 41900 5 10 1 1 0 0 1
+T 43400 45200 5 10 1 1 0 6 1
 value=W25Q16
 }
-C 41800 56100 1 90 0 resistor.sym
+C 42600 48000 1 90 0 resistor.sym
 {
-T 41400 56400 5 10 0 1 90 0 1
+T 42200 48300 5 10 0 1 90 0 1
 device=RESISTOR
-T 41800 56100 5 10 0 1 0 0 1
+T 42600 48000 5 10 0 1 0 0 1
 footprint=0402
-T 42300 56800 5 10 1 1 180 0 1
+T 42700 48500 5 10 1 1 0 0 1
 refdes=R11
-T 41900 56300 5 10 1 1 0 0 1
+T 42700 48200 5 10 1 1 0 0 1
 value=5.6k
 }
-C 41800 55000 1 90 0 resistor.sym
+C 42600 47100 1 90 0 resistor.sym
 {
-T 41400 55300 5 10 0 1 90 0 1
+T 42200 47400 5 10 0 1 90 0 1
 device=RESISTOR
-T 41800 55000 5 10 0 1 0 0 1
+T 42600 47100 5 10 0 1 0 0 1
 footprint=0402
-T 42300 55700 5 10 1 1 180 0 1
+T 42700 47600 5 10 1 1 0 0 1
 refdes=R12
-T 41900 55200 5 10 1 1 0 0 1
+T 42700 47300 5 10 1 1 0 0 1
 value=10k
 }
-N 41700 56100 41700 55900 4
-N 44200 56000 41700 56000 4
+N 44500 48000 42500 48000 4
 {
-T 42400 56100 5 10 1 1 0 0 1
-netname=v_batt
+T 44500 48100 5 10 1 1 0 6 1
+netname=sense_batt
 }
-N 41700 57000 40800 57000 4
+N 42500 48900 41600 48900 4
 {
-T 40800 57100 5 10 1 1 0 0 1
+T 41600 49000 5 10 1 1 0 0 1
 netname=v_lipo
 }
-C 41600 54700 1 0 0 gnd.sym
-T 40500 55800 9 10 1 0 0 0 2
+C 42400 46800 1 0 0 gnd.sym
+T 41100 47800 9 10 1 0 0 0 2
 Tolerate up to
 5V charging
 C 55100 43900 1 90 0 conn-2.sym
@@ -537,171 +536,27 @@ T 54100 45000 9 10 1 0 0 0 3
       optional
    power switch
 (cut trace to use)
-C 56400 50200 1 0 0 gnd.sym
-C 54400 51400 1 0 0 resistor.sym
+N 56300 59900 55000 59900 4
 {
-T 54700 51800 5 10 0 0 0 0 1
-device=RESISTOR
-T 54400 51400 5 10 0 1 0 0 1
-footprint=0402
-T 54550 51650 5 10 1 1 0 0 1
-refdes=R3
-T 54900 51650 5 10 1 1 0 0 1
-value=33
-}
-C 54400 50800 1 0 0 resistor.sym
-{
-T 54700 51200 5 10 0 0 0 0 1
-device=RESISTOR
-T 54400 50800 5 10 0 1 0 0 1
-footprint=0402
-T 54550 51050 5 10 1 1 0 0 1
-refdes=R4
-T 54900 51050 5 10 1 1 0 0 1
-value=33
-}
-N 55800 52100 56500 52100 4
-{
-T 55800 52200 5 10 1 1 0 0 1
-netname=v_usb
-}
-N 55300 51700 56500 51700 4
-N 55700 51300 56500 51300 4
-N 57000 49200 55500 49200 4
-{
-T 55700 49300 5 10 1 1 0 0 1
+T 55000 60000 5 10 1 1 0 0 1
 netname=reset_n
 }
-N 54800 48400 57000 48400 4
+N 55000 59100 56300 59100 4
 {
-T 55700 48500 5 10 1 1 0 0 1
+T 55000 59200 5 10 1 1 0 0 1
 netname=swclk
 }
-C 56400 49300 1 0 0 gnd.sym
-N 55100 48800 57000 48800 4
+C 55700 60000 1 0 0 gnd.sym
+N 55000 59500 56300 59500 4
 {
-T 55700 48900 5 10 1 1 0 0 1
+T 55000 59600 5 10 1 1 0 0 1
 netname=swdio
 }
-N 55100 48800 55100 49200 4
-C 43300 50400 1 0 0 gnd.sym
-C 45500 60500 1 0 0 capacitor.sym
-{
-T 45700 61200 5 10 0 1 0 0 1
-device=CAPACITOR
-T 45700 61400 5 10 0 1 0 0 1
-symversion=0.1
-T 45500 60500 5 10 0 1 0 0 1
-footprint=0402
-T 45600 60800 5 10 1 1 0 0 1
-refdes=C8
-T 46100 60800 5 10 1 1 0 0 1
-value=0.1uF
-}
-C 45500 59500 1 0 0 capacitor.sym
+N 55000 58700 56300 58700 4
 {
-T 45700 60200 5 10 0 1 0 0 1
-device=CAPACITOR
-T 45700 60400 5 10 0 1 0 0 1
-symversion=0.1
-T 45500 59500 5 10 0 1 0 0 1
-footprint=0402
-T 45600 59900 5 10 1 1 0 0 1
-refdes=C9
-T 46100 59900 5 10 1 1 0 0 1
-value=10nF
+T 55000 58750 5 10 1 1 0 0 1
+netname=force_loader
 }
-N 46400 60700 47900 60700 4
-N 47500 60700 47500 58900 4
-N 46400 59700 47100 59700 4
-N 47100 59700 47100 58900 4
-N 46400 59700 46400 61300 4
-C 46200 61300 1 0 0 3.3V-plus.sym
-N 45500 59700 45500 60700 4
-C 45400 59400 1 0 0 gnd.sym
-N 55300 50900 55700 50900 4
-N 55700 50900 55700 51300 4
-N 55300 51700 55300 51500 4
-C 48400 47000 1 0 0 gnd.sym
-C 44200 47300 1 0 0 STM32F042-28.sym
-{
-T 37800 45700 5 10 0 0 0 0 1
-device=IC
-T 44500 47600 5 10 0 1 0 0 1
-footprint=ufqfpn28
-T 51500 57800 5 10 1 1 0 0 1
-value=STM32F042G6U
-T 44500 58800 5 10 1 1 0 0 1
-refdes=U4
-}
-N 54400 48000 57000 48000 4
-N 54800 48400 54800 48600 4
-N 54800 48600 54400 48600 4
-N 47900 58900 47900 60700 4
-C 51900 60300 1 270 0 capacitor.sym
-{
-T 52600 60100 5 10 0 0 270 0 1
-device=CAPACITOR
-T 52800 60100 5 10 0 0 270 0 1
-symversion=0.1
-T 51900 60300 5 10 0 0 0 0 1
-footprint=0402
-T 52300 60000 5 10 1 1 0 0 1
-refdes=C6
-T 52300 59500 5 10 1 1 0 0 1
-value=22pF
-}
-C 49200 60300 1 270 0 capacitor.sym
-{
-T 49900 60100 5 10 0 0 270 0 1
-device=CAPACITOR
-T 50100 60100 5 10 0 0 270 0 1
-symversion=0.1
-T 49200 60300 5 10 0 0 0 0 1
-footprint=0402
-T 48900 60000 5 10 1 1 0 0 1
-refdes=C5
-T 48800 59500 5 10 1 1 0 0 1
-value=22pF
-}
-C 52000 59100 1 0 0 gnd.sym
-C 49300 59100 1 0 0 gnd.sym
-C 50400 59900 1 0 0 ABM8.sym
-{
-T 50400 59900 5 10 0 0 0 0 1
-footprint=ABM8
-T 50300 60500 5 10 1 1 0 0 1
-refdes=X2
-T 50800 60500 5 10 1 1 0 0 1
-value=16MHz
-}
-C 51000 59600 1 0 0 gnd.sym
-C 50300 59600 1 0 0 gnd.sym
-N 50400 60300 49400 60300 4
-N 51100 60300 52100 60300 4
-N 50100 60300 50100 58900 4
-N 50100 58900 50500 58900 4
-N 51400 60300 51400 58900 4
-N 51400 58900 50900 58900 4
-C 56500 50100 1 0 0 USBmicroB.sym
-{
-T 56855 50495 5 10 0 1 0 0 1
-footprint=11071
-T 56500 50100 5 10 0 0 0 6 1
-device=CONNECTOR
-T 56500 50100 5 10 0 0 0 6 1
-value=USBmicroB
-T 57495 52500 5 10 1 1 0 0 1
-refdes=J1
-}
-C 56000 50800 1 0 0 nc-left.sym
-{
-T 56000 51200 5 10 0 0 0 0 1
-value=NoConnection
-T 56000 51600 5 10 0 0 0 0 1
-device=DRC_Directive
-}
-N 54400 49200 55100 49200 4
 C 72500 45400 1 0 0 conn-2.sym
 {
 T 72100 46000 5 10 0 0 0 0 1
@@ -767,17 +622,6 @@ value=40mhz
 }
 C 69700 51600 1 0 0 gnd.sym
 C 69000 51600 1 0 0 gnd.sym
-C 62100 46500 1 0 0 CC1200.sym
-{
-T 62100 46500 5 10 0 1 0 0 1
-device=IC
-T 62100 46500 5 10 0 1 0 0 1
-footprint=TI-QFN32
-T 62100 47100 5 10 0 1 0 0 1
-value=CC1200
-T 62500 53500 5 10 1 1 0 0 1
-refdes=U3
-}
 C 65600 46400 1 0 0 gnd.sym
 C 66300 45700 1 90 0 inductor.sym
 {
@@ -1316,150 +1160,123 @@ Antenna
 T 71900 44100 9 10 1 0 0 0 2
   SMA is optional
 default is wire whip
-N 51200 47300 51200 47200 4
-N 51200 47200 55500 47200 4
-N 55500 47200 55500 49200 4
-N 44200 53000 43000 53000 4
+N 57600 52600 56100 52600 4
 {
-T 43000 53100 5 10 1 1 0 0 1
-netname=tx1
-}
-N 44200 52400 43000 52400 4
-{
-T 43000 52500 5 10 1 1 0 0 1
-netname=rx1
-}
-N 55900 53900 54400 53900 4
-{
-T 55500 54000 5 10 1 1 0 0 1
+T 57200 52700 5 10 1 1 0 0 1
 netname=sclk1
 }
-N 55900 53300 54400 53300 4
+N 57600 52000 56100 52000 4
 {
-T 55400 53400 5 10 1 1 0 0 1
+T 57100 52100 5 10 1 1 0 0 1
 netname=miso1
 }
-N 55900 52700 54400 52700 4
+N 57600 51400 56100 51400 4
 {
-T 55400 52900 5 10 1 1 0 0 1
+T 57100 51600 5 10 1 1 0 0 1
 netname=mosi1
 }
-N 54400 55700 55900 55700 4
+N 56100 54400 57600 54400 4
 {
-T 55600 55800 5 10 1 1 0 0 1
+T 57300 54500 5 10 1 1 0 0 1
 netname=tx2
 }
-N 54400 55100 55900 55100 4
+N 56100 53800 57600 53800 4
 {
-T 55600 55200 5 10 1 1 0 0 1
+T 57300 53900 5 10 1 1 0 0 1
 netname=rx2
 }
-C 57000 47100 1 0 0 conn-7.sym
+C 56300 57800 1 0 0 conn-7.sym
 {
-T 57355 49795 5 10 1 1 0 0 1
+T 56655 60495 5 10 1 1 0 0 1
 refdes=J2
-T 57200 46900 5 10 1 1 0 0 1
+T 56500 57600 5 10 1 1 0 0 1
 value=Debug
-T 57000 47100 5 10 0 1 0 0 1
+T 56300 57800 5 10 0 1 0 0 1
 device=CONNECTOR
-T 57000 47100 5 10 0 1 0 0 1
+T 56300 57800 5 10 0 1 0 0 1
 footprint=50mil7pin
-T 57000 47100 5 10 0 1 0 0 1
+T 56300 57800 5 10 0 1 0 0 1
 loadstatus=noload
 }
-N 57000 49600 56500 49600 4
-N 57000 47600 55900 47600 4
+N 56300 60300 55800 60300 4
+N 56300 58300 55000 58300 4
 {
-T 55900 47700 5 10 1 1 0 0 1
+T 55000 58400 5 10 1 1 0 0 1
 netname=tx1
 }
-N 57000 47200 55900 47200 4
+N 56300 57900 55000 57900 4
 {
-T 55900 47300 5 10 1 1 0 0 1
+T 55000 58000 5 10 1 1 0 0 1
 netname=rx1
 }
-N 43400 50700 43400 51900 4
-N 44200 51900 43400 51900 4
-N 54400 56300 55900 56300 4
+N 56100 55000 57600 55000 4
 {
-T 55200 56400 5 10 1 1 0 0 1
+T 56900 55100 5 10 1 1 0 0 1
 netname=cs_radio
 }
-N 54400 54500 55900 54500 4
+N 56100 53200 57600 53200 4
 {
-T 55200 54600 5 10 1 1 0 0 1
+T 56900 53300 5 10 1 1 0 0 1
 netname=radio_int
 }
-N 43000 56600 44200 56600 4
-{
-T 43000 56700 5 10 1 1 0 0 1
-netname=cs_flash
-}
-C 42500 53500 1 0 1 resistor.sym
+C 56200 55700 1 0 1 resistor.sym
 {
-T 42200 53900 5 10 0 0 0 6 1
+T 55900 56100 5 10 0 0 0 6 1
 device=RESISTOR
-T 42500 53500 5 10 0 0 90 2 1
+T 56200 55700 5 10 0 0 90 2 1
 footprint=0402
-T 42200 54000 5 10 1 1 180 6 1
+T 55900 56200 5 10 1 1 180 6 1
 refdes=R2
-T 41700 54000 5 10 1 1 180 6 1
+T 55400 56200 5 10 1 1 180 6 1
 value=1k
 }
-C 40700 53500 1 270 1 gnd.sym
-C 41400 53500 1 0 1 led.sym
+C 54400 55700 1 270 1 gnd.sym
+C 55100 55700 1 0 1 led.sym
 {
-T 41500 54100 5 10 0 0 0 6 1
+T 55200 56300 5 10 0 0 0 6 1
 device=LED
-T 41450 53500 5 10 0 1 0 6 1
+T 55150 55700 5 10 0 1 0 6 1
 footprint=0603diode
-T 41200 54050 5 10 1 1 180 6 1
+T 54900 56250 5 10 1 1 180 6 1
 refdes=D2
-T 40600 54100 5 10 1 1 180 6 1
+T 54300 56300 5 10 1 1 180 6 1
 value=green
 }
-N 41400 53600 41600 53600 4
-N 42500 53600 44200 53600 4
-C 43700 54100 1 0 0 nc-left.sym
-{
-T 43700 54500 5 10 0 0 0 0 1
-value=NoConnection
-T 43700 54900 5 10 0 0 0 0 1
-device=DRC_Directive
-}
-C 41900 48600 1 90 0 resistor.sym
+N 55100 55800 55300 55800 4
+N 56200 55800 57900 55800 4
+C 46300 48000 1 90 0 resistor.sym
 {
-T 41500 48900 5 10 0 1 90 0 1
+T 45900 48300 5 10 0 1 90 0 1
 device=RESISTOR
-T 41900 48600 5 10 0 1 0 0 1
+T 46300 48000 5 10 0 1 0 0 1
 footprint=0402
-T 41300 49200 5 10 1 1 0 0 1
+T 46000 48500 5 10 1 1 0 6 1
 refdes=R9
-T 41300 48800 5 10 1 1 0 0 1
+T 46000 48200 5 10 1 1 0 6 1
 value=10k
 }
-C 41900 47700 1 90 0 resistor.sym
+C 46300 47100 1 90 0 resistor.sym
 {
-T 41500 48000 5 10 0 1 90 0 1
+T 45900 47400 5 10 0 1 90 0 1
 device=RESISTOR
-T 41900 47700 5 10 0 1 0 0 1
+T 46300 47100 5 10 0 1 0 0 1
 footprint=0402
-T 41300 48300 5 10 1 1 0 0 1
+T 46000 47600 5 10 1 1 0 6 1
 refdes=R10
-T 41300 47900 5 10 1 1 0 0 1
+T 46000 47300 5 10 1 1 0 6 1
 value=10k
 }
-C 41700 47400 1 0 0 gnd.sym
-N 41800 49500 40900 49500 4
+C 46100 46800 1 0 0 gnd.sym
+N 46200 48900 45300 48900 4
 {
-T 40900 49600 5 10 1 1 0 0 1
+T 45300 49000 5 10 1 1 0 0 1
 netname=v_usb
 }
-N 41800 48600 42800 48600 4
-N 42800 48600 42800 54800 4
-N 42800 54800 44200 54800 4
-T 40100 49900 9 10 1 0 0 0 1
-Detect USB connection
+N 46200 48000 47600 48000 4
+{
+T 47600 48050 5 10 1 1 0 6 1
+netname=usb_detect
+}
 C 61600 52200 1 0 0 nc-left.sym
 {
 T 61600 52600 5 10 0 0 0 0 1
@@ -1467,13 +1284,193 @@ value=NoConnection
 T 61600 53000 5 10 0 0 0 0 1
 device=DRC_Directive
 }
-C 54400 56800 1 0 0 nc-right.sym
+T 66800 40800 9 10 1 0 0 0 2
+                Copyright 2022 by Bdale Garbee <bdale@gag.com>
+Licensed under the TAPR Open Hardware License, http://www.tapr.org/OHL
+C 45500 49800 1 0 0 lpc11u2x_bga.sym
+{
+T 45895 60000 5 10 0 0 0 0 1
+footprint=sot1155-2
+T 45895 59700 5 10 1 1 0 0 1
+refdes=U4
+T 51700 59700 5 10 1 1 0 6 1
+value=LPC11U24FET48/301
+T 45500 49800 5 10 0 1 0 0 1
+device=IC
+}
+N 53100 55200 52100 55200 4
+{
+T 53100 55250 5 10 1 1 0 6 1
+netname=swclk
+}
+N 53100 59200 52100 59200 4
+{
+T 53100 59250 5 10 1 1 0 6 1
+netname=reset_n
+}
+N 53100 53200 52100 53200 4
+{
+T 53100 53250 5 10 1 1 0 6 1
+netname=swdio
+}
+C 42600 50400 1 0 1 USBmicroB.sym
+{
+T 42245 50795 5 10 0 1 0 6 1
+footprint=11071
+T 42600 50400 5 10 0 0 0 0 1
+device=CONNECTOR
+T 42600 50400 5 10 0 0 0 0 1
+value=USBmicroB
+T 41605 52800 5 10 1 1 0 6 1
+refdes=J1
+}
+C 42500 50500 1 0 0 gnd.sym
+C 44000 51900 1 0 0 resistor.sym
+{
+T 44300 52300 5 10 0 0 0 0 1
+device=RESISTOR
+T 44000 51900 5 10 0 1 0 0 1
+footprint=0402
+T 44150 52150 5 10 1 1 0 0 1
+refdes=R3
+T 44600 52150 5 10 1 1 0 0 1
+value=33
+}
+C 44000 51500 1 0 0 resistor.sym
+{
+T 44300 51900 5 10 0 0 0 0 1
+device=RESISTOR
+T 44000 51500 5 10 0 1 0 0 1
+footprint=0402
+T 44150 51250 5 10 1 1 0 0 1
+refdes=R4
+T 44600 51250 5 10 1 1 0 0 1
+value=33
+}
+N 42600 52000 44000 52000 4
+N 42600 51600 44000 51600 4
+C 43800 50000 1 90 0 capacitor.sym
+{
+T 43100 50200 5 10 0 0 90 0 1
+device=CAPACITOR
+T 42900 50200 5 10 0 0 90 0 1
+symversion=0.1
+T 43800 50000 5 10 0 0 0 0 1
+footprint=0402
+T 43400 50800 5 10 1 1 180 0 1
+refdes=C8
+T 43000 50100 5 10 1 1 0 0 1
+value=0.1uF
+}
+C 44700 50000 1 90 0 capacitor.sym
 {
-T 54500 57300 5 10 0 0 0 0 1
+T 44000 50200 5 10 0 0 90 0 1
+device=CAPACITOR
+T 43800 50200 5 10 0 0 90 0 1
+symversion=0.1
+T 44700 50000 5 10 0 0 0 0 1
+footprint=0402
+T 44300 50800 5 10 1 1 180 0 1
+refdes=C9
+T 43900 50100 5 10 1 1 0 0 1
+value=0.1uF
+}
+C 43400 50900 1 0 0 3.3V-plus.sym
+C 44400 49700 1 0 0 gnd.sym
+C 42850 58800 1 270 0 capacitor.sym
+{
+T 43550 58600 5 10 0 0 270 0 1
+device=CAPACITOR
+T 43750 58600 5 10 0 0 270 0 1
+symversion=0.1
+T 42850 58800 5 10 0 0 0 0 1
+footprint=0402
+T 43250 58500 5 10 1 1 0 0 1
+refdes=C3
+T 43150 58000 5 10 1 1 0 0 1
+value=18pF
+}
+C 41550 58800 1 270 0 capacitor.sym
+{
+T 42250 58600 5 10 0 0 270 0 1
+device=CAPACITOR
+T 42450 58600 5 10 0 0 270 0 1
+symversion=0.1
+T 41550 58800 5 10 0 0 0 0 1
+footprint=0402
+T 41550 58500 5 10 1 1 0 6 1
+refdes=C2
+T 41250 58000 5 10 1 1 0 0 1
+value=18pF
+}
+C 42950 57600 1 0 0 gnd.sym
+C 41650 57600 1 0 0 gnd.sym
+C 42050 58400 1 0 0 ABM8.sym
+{
+T 42250 58900 5 10 0 0 0 0 1
+device=CRYSTAL
+T 42250 59100 5 10 0 0 0 0 1
+symversion=0.1
+T 42050 58400 5 10 0 0 0 0 1
+footprint=ABM8
+T 41950 58900 5 10 1 1 0 0 1
+refdes=X1
+T 42650 58900 5 10 1 1 0 0 1
+value=12MHz
+}
+C 42650 58100 1 0 0 gnd.sym
+C 41950 58100 1 0 0 gnd.sym
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 value=NoConnection
-T 54500 57500 5 10 0 0 0 0 1
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 device=DRC_Directive
 }
-T 66800 40800 9 10 1 0 0 0 2
-                Copyright 2021 by Bdale Garbee <bdale@gag.com>
-Licensed under the TAPR Open Hardware License, http://www.tapr.org/OHL
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+}
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+}
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