From: epetrich Date: Tue, 2 Mar 2004 04:52:37 +0000 (+0000) Subject: * src/ds390/ralloc.h, X-Git-Url: https://git.gag.com/?a=commitdiff_plain;h=7cafa742776543fdfa27fda1258ce8a8d64c7c9c;p=fw%2Fsdcc * src/ds390/ralloc.h, * src/ds390/ralloc.c (ds390_regWithIdx), * src/ds390/gen.c (emitcode), * src/ds390/main.h, * src/ds390/main.c (instructionSize, ds390newAsmLineNode, updateOpRW, ds390opcodeCompare, asmLineNodeFromLineNode, getInstructionSize, ds390operandCompare, getRegsRead, getRegsWritten, initializeAsmLineNode): customized instruction size calculation for ds390, started basis for some register optimizations * src/ds390/gen.c (gen390Code, emitcode): associate iCodes with corresponding assembly output * src/ds390/gen.c (genFunction, genEndFunction): added case to handle missing push/pop of r0/r1. Optimized push/pops git-svn-id: https://sdcc.svn.sourceforge.net/svnroot/sdcc/trunk/sdcc@3240 4a8a32a2-be11-0410-ad9d-d568d2c75423 --- diff --git a/ChangeLog b/ChangeLog index 57a230d5..ff929c69 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,19 @@ +2004-03-02 Erik Petrich + + * src/ds390/ralloc.h, + * src/ds390/ralloc.c (ds390_regWithIdx), + * src/ds390/gen.c (emitcode), + * src/ds390/main.h, + * src/ds390/main.c (instructionSize, ds390newAsmLineNode, updateOpRW, + ds390opcodeCompare, asmLineNodeFromLineNode, getInstructionSize, + ds390operandCompare, getRegsRead, getRegsWritten, + initializeAsmLineNode): customized instruction size calculation for + ds390, started basis for some register optimizations + * src/ds390/gen.c (gen390Code, emitcode): associate iCodes with + corresponding assembly output + * src/ds390/gen.c (genFunction, genEndFunction): added case to handle + missing push/pop of r0/r1. Optimized push/pops + 2004-03-01 Erik Petrich * src/mcs51/main.c (instructionSize): fixed ACALL size diff --git a/src/ds390/gen.c b/src/ds390/gen.c index 315f0642..c052d8a9 100644 --- a/src/ds390/gen.c +++ b/src/ds390/gen.c @@ -79,6 +79,7 @@ static struct short dptrInUse; short dptr1InUse; set *sendSet; + iCode *current_iCode; } _G; @@ -130,6 +131,9 @@ static unsigned char SRMask[] = emitcode ("","!tlabeldef",lbl->key+100); \ }} +static int _currentDPS; /* Current processor DPS. */ +static int _desiredDPS; /* DPS value compiler thinks we should be using. */ +static int _lazyDPS = 0; /* if non-zero, we are doing lazy evaluation of DPS changes. */ /*-----------------------------------------------------------------*/ /* emitcode - writes the code into a file : for now it is simple */ @@ -177,6 +181,8 @@ emitcode (char *inst, char *fmt,...) lineCurr->isInline = _G.inLine; lineCurr->isDebug = _G.debugLine; + lineCurr->ic = _G.current_iCode; + lineCurr->aln = ds390newAsmLineNode(_currentDPS); va_end (ap); } @@ -310,9 +316,6 @@ newAsmop (short type) return aop; } -static int _currentDPS; /* Current processor DPS. */ -static int _desiredDPS; /* DPS value compiler thinks we should be using. */ -static int _lazyDPS = 0; /* if non-zero, we are doing lazy evaluation of DPS changes. */ /*-----------------------------------------------------------------*/ /* genSetDPTR: generate code to select which DPTR is in use (zero */ @@ -3018,6 +3021,11 @@ genFunction (iCode * ic) emitcode ("push", "%s", ds390_regWithIdx (i)->dname); } } + else if (ds390_ptrRegReq) + { + emitcode ("push", "%s", ds390_regWithIdx (R0_IDX)->dname); + emitcode ("push", "%s", ds390_regWithIdx (R1_IDX)->dname); + } } else @@ -3146,6 +3154,12 @@ genFunction (iCode * ic) } } } + else if (ds390_ptrRegReq) + { + emitcode ("push", "%s", ds390_regWithIdx (R0_IDX)->dname); + emitcode ("push", "%s", ds390_regWithIdx (R1_IDX)->dname); + _G.nRegsSaved += 2; + } } } @@ -3242,6 +3256,11 @@ static void genEndFunction (iCode * ic) { symbol *sym = OP_SYMBOL (IC_LEFT (ic)); + lineNode *lnp = lineCurr; + bitVect *regsUsed; + bitVect *regsUsedPrologue; + bitVect *regsUnneeded; + int idx; D (emitcode (";", "genEndFunction ");); @@ -3338,6 +3357,11 @@ genEndFunction (iCode * ic) emitcode ("pop", "%s", ds390_regWithIdx (i)->dname); } } + else if (ds390_ptrRegReq) + { + emitcode ("pop", "%s", ds390_regWithIdx (R1_IDX)->dname); + emitcode ("pop", "%s", ds390_regWithIdx (R0_IDX)->dname); + } } else @@ -3433,6 +3457,11 @@ genEndFunction (iCode * ic) emitcode ("pop", "%s", ds390_regWithIdx (i)->dname); } } + else if (ds390_ptrRegReq) + { + emitcode ("pop", "%s", ds390_regWithIdx (R1_IDX)->dname); + emitcode ("pop", "%s", ds390_regWithIdx (R0_IDX)->dname); + } } @@ -3453,6 +3482,102 @@ genEndFunction (iCode * ic) emitcode ("ret", ""); } + if (!port->peep.getRegsRead || !port->peep.getRegsWritten) + return; + + /* If this was an interrupt handler using bank 0 that called another */ + /* function, then all registers must be saved; nothing to optimized. */ + if (IFFUNC_ISISR (sym->type) && IFFUNC_HASFCALL(sym->type) + && !FUNC_REGBANK(sym->type)) + return; + + /* Compute the registers actually used */ + regsUsed = newBitVect (ds390_nRegs); + regsUsedPrologue = newBitVect (ds390_nRegs); + while (lnp) + { + if (lnp->ic && lnp->ic->op == FUNCTION) + regsUsedPrologue = bitVectUnion (regsUsedPrologue, port->peep.getRegsWritten(lnp)); + else + regsUsed = bitVectUnion (regsUsed, port->peep.getRegsWritten(lnp)); + + if (lnp->ic && lnp->ic->op == FUNCTION && lnp->prev + && lnp->prev->ic && lnp->prev->ic->op != FUNCTION) + break; + if (!lnp->prev) + break; + lnp = lnp->prev; + } + + if (bitVectBitValue (regsUsedPrologue, DPS_IDX) + && !bitVectBitValue (regsUsed, DPS_IDX)) + { + bitVectUnSetBit (regsUsedPrologue, DPS_IDX); + } + + if (bitVectBitValue (regsUsedPrologue, CND_IDX) + && !bitVectBitValue (regsUsed, CND_IDX)) + { + regsUsed = bitVectUnion (regsUsed, regsUsedPrologue); + if (IFFUNC_ISISR (sym->type) && !FUNC_REGBANK(sym->type) + && !sym->stack) + bitVectUnSetBit (regsUsed, CND_IDX); + } + else + regsUsed = bitVectUnion (regsUsed, regsUsedPrologue); + + /* If this was an interrupt handler that called another function */ + /* function, then assume working registers may be modified by it. */ + if (IFFUNC_ISISR (sym->type) && IFFUNC_HASFCALL(sym->type)) + { + regsUsed = bitVectSetBit (regsUsed, AP_IDX); + regsUsed = bitVectSetBit (regsUsed, DPX1_IDX); + regsUsed = bitVectSetBit (regsUsed, DPL1_IDX); + regsUsed = bitVectSetBit (regsUsed, DPH1_IDX); + regsUsed = bitVectSetBit (regsUsed, DPX_IDX); + regsUsed = bitVectSetBit (regsUsed, DPL_IDX); + regsUsed = bitVectSetBit (regsUsed, DPH_IDX); + regsUsed = bitVectSetBit (regsUsed, DPS_IDX); + regsUsed = bitVectSetBit (regsUsed, B_IDX); + regsUsed = bitVectSetBit (regsUsed, A_IDX); + regsUsed = bitVectSetBit (regsUsed, CND_IDX); + } + + /* Remove the unneeded push/pops */ + regsUnneeded = newBitVect (ds390_nRegs); + while (lnp) + { + if (lnp->ic && (lnp->ic->op == FUNCTION || lnp->ic->op == ENDFUNCTION)) + { + if (!strncmp(lnp->line, "push", 4)) + { + idx = bitVectFirstBit (port->peep.getRegsRead(lnp)); + if (idx>=0 && !bitVectBitValue (regsUsed, idx)) + { + connectLine (lnp->prev, lnp->next); + regsUnneeded = bitVectSetBit (regsUnneeded, idx); + } + } + if (!strncmp(lnp->line, "pop", 3) || !strncmp(lnp->line, "mov", 3)) + { + idx = bitVectFirstBit (port->peep.getRegsWritten(lnp)); + if (idx>=0 && !bitVectBitValue (regsUsed, idx)) + { + connectLine (lnp->prev, lnp->next); + regsUnneeded = bitVectSetBit (regsUnneeded, idx); + } + } + } + lnp = lnp->next; + } + + for (idx = 0; idx < regsUnneeded->size; idx++) + if (bitVectBitValue (regsUnneeded, idx)) + emitcode ("", ";\teliminated unneeded push/pop %s", ds390_regWithIdx (idx)->dname); + + freeBitVect (regsUnneeded); + freeBitVect (regsUsed); + freeBitVect (regsUsedPrologue); } /*-----------------------------------------------------------------*/ @@ -13294,6 +13419,8 @@ gen390Code (iCode * lic) for (ic = lic; ic; ic = ic->next) { + _G.current_iCode = ic; + if (ic->lineno && cln != ic->lineno) { if (options.debug) diff --git a/src/ds390/main.c b/src/ds390/main.c index cc66e160..556447e1 100644 --- a/src/ds390/main.c +++ b/src/ds390/main.c @@ -338,6 +338,446 @@ oclsExpense (struct memmap *oclass) return 0; } +static int +instructionSize(char *inst, char *op1, char *op2) +{ + int isflat24 = (options.model == MODEL_FLAT24); + + #define ISINST(s) (strncmp(inst, (s), sizeof(s)-1) == 0) + #define IS_A(s) (*(s) == 'a' && *(s+1) == '\0') + #define IS_C(s) (*(s) == 'c' && *(s+1) == '\0') + #define IS_Rn(s) (*(s) == 'r' && *(s+1) >= '0' && *(s+1) <= '7') + #define IS_atRi(s) (*(s) == '@' && *(s+1) == 'r') + + /* Based on the current (2003-08-22) code generation for the + small library, the top instruction probability is: + + 57% mov/movx/movc + 6% push + 6% pop + 4% inc + 4% lcall + 4% add + 3% clr + 2% subb + */ + /* mov, push, & pop are the 69% of the cases. Check them first! */ + if (ISINST ("mov")) + { + if (*(inst+3)=='x') return 1; /* movx */ + if (*(inst+3)=='c') return 1; /* movc */ + if (IS_C (op1) || IS_C (op2)) return 2; + if (IS_A (op1)) + { + if (IS_Rn (op2) || IS_atRi (op2)) return 1; + return 2; + } + if (IS_Rn(op1) || IS_atRi(op1)) + { + if (IS_A(op2)) return 1; + return 2; + } + if (strcmp (op1, "dptr") == 0) return 3+isflat24; + if (IS_A (op2) || IS_Rn (op2) || IS_atRi (op2)) return 2; + return 3; + } + + if (ISINST ("push")) return 2; + if (ISINST ("pop")) return 2; + + if (ISINST ("lcall")) return 3+isflat24; + if (ISINST ("ret")) return 1; + if (ISINST ("ljmp")) return 3+isflat24; + if (ISINST ("sjmp")) return 2; + if (ISINST ("rlc")) return 1; + if (ISINST ("rrc")) return 1; + if (ISINST ("rl")) return 1; + if (ISINST ("rr")) return 1; + if (ISINST ("swap")) return 1; + if (ISINST ("jc")) return 2; + if (ISINST ("jnc")) return 2; + if (ISINST ("jb")) return 3; + if (ISINST ("jnb")) return 3; + if (ISINST ("jbc")) return 3; + if (ISINST ("jmp")) return 1; // always jmp @a+dptr + if (ISINST ("jz")) return 2; + if (ISINST ("jnz")) return 2; + if (ISINST ("cjne")) return 3; + if (ISINST ("mul")) return 1; + if (ISINST ("div")) return 1; + if (ISINST ("da")) return 1; + if (ISINST ("xchd")) return 1; + if (ISINST ("reti")) return 1; + if (ISINST ("nop")) return 1; + if (ISINST ("acall")) return 2+isflat24; + if (ISINST ("ajmp")) return 2+isflat24; + + + if (ISINST ("add") || ISINST ("addc") || ISINST ("subb") || ISINST ("xch")) + { + if (IS_Rn(op2) || IS_atRi(op2)) return 1; + return 2; + } + if (ISINST ("inc") || ISINST ("dec")) + { + if (IS_A(op1) || IS_Rn(op1) || IS_atRi(op1)) return 1; + if (strcmp(op1, "dptr") == 0) return 1; + return 2; + } + if (ISINST ("anl") || ISINST ("orl") || ISINST ("xrl")) + { + if (IS_C(op1)) return 2; + if (IS_A(op1)) + { + if (IS_Rn(op2) || IS_atRi(op2)) return 1; + return 2; + } + else + { + if (IS_A(op2)) return 2; + return 3; + } + } + if (ISINST ("clr") || ISINST ("setb") || ISINST ("cpl")) + { + if (IS_A(op1) || IS_C(op1)) return 1; + return 2; + } + if (ISINST ("djnz")) + { + if (IS_Rn(op1)) return 2; + return 3; + } + + /* If the instruction is unrecognized, we shouldn't try to optimize. */ + /* Return a large value to discourage optimization. */ + return 999; +} + +asmLineNode * +ds390newAsmLineNode (int currentDPS) +{ + asmLineNode *aln; + + aln = Safe_alloc ( sizeof (asmLineNode)); + aln->size = 0; + aln->regsRead = NULL; + aln->regsWritten = NULL; + aln->initialized = 0; + aln->currentDPS = currentDPS; + + return aln; +} + + +typedef struct ds390operanddata + { + char name[6]; + int regIdx1; + int regIdx2; + } +ds390operanddata; + +static ds390operanddata ds390operandDataTable[] = + { + {"_ap", AP_IDX, -1}, + {"a", A_IDX, -1}, + {"ab", A_IDX, B_IDX}, + {"ac", CND_IDX, -1}, + {"ap", AP_IDX, -1}, + {"acc", A_IDX, -1}, + {"ar0", R0_IDX, -1}, + {"ar1", R1_IDX, -1}, + {"ar2", R2_IDX, -1}, + {"ar3", R3_IDX, -1}, + {"ar4", R4_IDX, -1}, + {"ar5", R5_IDX, -1}, + {"ar6", R6_IDX, -1}, + {"ar7", R7_IDX, -1}, + {"b", B_IDX, -1}, + {"c", CND_IDX, -1}, + {"cy", CND_IDX, -1}, + {"dph", DPH_IDX, -1}, + {"dph0", DPH_IDX, -1}, + {"dph1", DPH1_IDX, -1}, + {"dpl", DPL_IDX, -1}, + {"dpl0", DPL_IDX, -1}, + {"dpl1", DPL1_IDX, -1}, +/* {"dptr", DPL_IDX, DPH_IDX}, */ /* dptr is special, based on currentDPS */ + {"dps", DPS_IDX, -1}, + {"dpx", DPX_IDX, -1}, + {"dpx0", DPX_IDX, -1}, + {"dpx1", DPX1_IDX, -1}, + {"f0", CND_IDX, -1}, + {"f1", CND_IDX, -1}, + {"ov", CND_IDX, -1}, + {"p", CND_IDX, -1}, + {"psw", CND_IDX, -1}, + {"r0", R0_IDX, -1}, + {"r1", R1_IDX, -1}, + {"r2", R2_IDX, -1}, + {"r3", R3_IDX, -1}, + {"r4", R4_IDX, -1}, + {"r5", R5_IDX, -1}, + {"r6", R6_IDX, -1}, + {"r7", R7_IDX, -1}, + }; + +static int +ds390operandCompare (const void *key, const void *member) +{ + return strcmp((const char *)key, ((ds390operanddata *)member)->name); +} + +static void +updateOpRW (asmLineNode *aln, char *op, char *optype, int currentDPS) +{ + ds390operanddata *opdat; + char *dot; + int regIdx1 = -1; + int regIdx2 = -1; + int regIdx3 = -1; + + dot = strchr(op, '.'); + if (dot) + *dot = '\0'; + + opdat = bsearch (op, ds390operandDataTable, + sizeof(ds390operandDataTable)/sizeof(ds390operanddata), + sizeof(ds390operanddata), ds390operandCompare); + + if (opdat) + { + regIdx1 = opdat->regIdx1; + regIdx2 = opdat->regIdx2; + } + if (!strcmp(op, "dptr")) + { + if (!currentDPS) + { + regIdx1 = DPL_IDX; + regIdx2 = DPH_IDX; + regIdx3 = DPX_IDX; + } + else + { + regIdx1 = DPL1_IDX; + regIdx2 = DPH1_IDX; + regIdx3 = DPX1_IDX; + } + } + + if (strchr(optype,'r')) + { + if (regIdx1 >= 0) + aln->regsRead = bitVectSetBit (aln->regsRead, regIdx1); + if (regIdx2 >= 0) + aln->regsRead = bitVectSetBit (aln->regsRead, regIdx2); + if (regIdx3 >= 0) + aln->regsRead = bitVectSetBit (aln->regsRead, regIdx3); + } + if (strchr(optype,'w')) + { + if (regIdx1 >= 0) + aln->regsWritten = bitVectSetBit (aln->regsWritten, regIdx1); + if (regIdx2 >= 0) + aln->regsWritten = bitVectSetBit (aln->regsWritten, regIdx2); + if (regIdx3 >= 0) + aln->regsWritten = bitVectSetBit (aln->regsWritten, regIdx3); + } + if (op[0] == '@') + { + if (!strcmp(op, "@r0")) + aln->regsRead = bitVectSetBit (aln->regsRead, R0_IDX); + if (!strcmp(op, "@r1")) + aln->regsRead = bitVectSetBit (aln->regsRead, R1_IDX); + if (strstr(op, "dptr")) + { + if (!currentDPS) + { + aln->regsRead = bitVectSetBit (aln->regsRead, DPL_IDX); + aln->regsRead = bitVectSetBit (aln->regsRead, DPH_IDX); + aln->regsRead = bitVectSetBit (aln->regsRead, DPX_IDX); + } + else + { + aln->regsRead = bitVectSetBit (aln->regsRead, DPL1_IDX); + aln->regsRead = bitVectSetBit (aln->regsRead, DPH1_IDX); + aln->regsRead = bitVectSetBit (aln->regsRead, DPX1_IDX); + } + } + if (strstr(op, "a+")) + aln->regsRead = bitVectSetBit (aln->regsRead, A_IDX); + } +} + +typedef struct ds390opcodedata + { + char name[6]; + char class[3]; + char pswtype[3]; + char op1type[3]; + char op2type[3]; + } +ds390opcodedata; + +static ds390opcodedata ds390opcodeDataTable[] = + { + {"acall","j", "", "", ""}, + {"ajmp", "j", "", "", ""}, + {"add", "", "w", "rw", "r"}, + {"addc", "", "rw", "rw", "r"}, + {"anl", "", "", "rw", "r"}, + {"cjne", "j", "w", "r", "r"}, + {"clr", "", "", "w", ""}, + {"cpl", "", "", "rw", ""}, + {"da", "", "rw", "rw", ""}, + {"dec", "", "", "rw", ""}, + {"div", "", "w", "rw", ""}, + {"djnz", "j", "", "rw", ""}, + {"inc", "", "", "rw", ""}, + {"jb", "j", "", "r", ""}, + {"jbc", "j", "", "rw", ""}, + {"jc", "j", "", "", ""}, + {"jmp", "j", "", "", ""}, + {"jnb", "j", "", "r", ""}, + {"jnc", "j", "", "", ""}, + {"jnz", "j", "", "", ""}, + {"jz", "j", "", "", ""}, + {"lcall","j", "", "", ""}, + {"ljmp", "j", "", "", ""}, + {"mov", "", "", "w", "r"}, + {"movc", "", "", "w", "r"}, + {"movx", "", "", "w", "r"}, + {"mul", "", "w", "rw", ""}, + {"nop", "", "", "", ""}, + {"orl", "", "", "rw", "r"}, + {"pop", "", "", "w", ""}, + {"push", "", "", "r", ""}, + {"ret", "j", "", "", ""}, + {"reti", "j", "", "", ""}, + {"rl", "", "", "rw", ""}, + {"rlc", "", "rw", "rw", ""}, + {"rr", "", "", "rw", ""}, + {"rrc", "", "rw", "rw", ""}, + {"setb", "", "", "w", ""}, + {"sjmp", "j", "", "", ""}, + {"subb", "", "rw", "rw", "r"}, + {"swap", "", "", "rw", ""}, + {"xch", "", "", "rw", "rw"}, + {"xchd", "", "", "rw", "rw"}, + {"xrl", "", "", "rw", "r"}, + }; + +static int +ds390opcodeCompare (const void *key, const void *member) +{ + return strcmp((const char *)key, ((ds390opcodedata *)member)->name); +} + +static asmLineNode * +asmLineNodeFromLineNode (lineNode *ln, int currentDPS) +{ + asmLineNode *aln = ds390newAsmLineNode(currentDPS); + char *op, op1[256], op2[256]; + int opsize; + const char *p; + char inst[8]; + ds390opcodedata *opdat; + + aln->initialized = 1; + + p = ln->line; + + while (*p && isspace(*p)) p++; + for (op = inst, opsize=1; *p; p++) + { + if (isspace(*p) || *p == ';' || *p == ':' || *p == '=') + break; + else + if (opsize < sizeof(inst)) + *op++ = tolower(*p), opsize++; + } + *op = '\0'; + + if (*p == ';' || *p == ':' || *p == '=') + return aln; + + while (*p && isspace(*p)) p++; + if (*p == '=') + return aln; + + for (op = op1, opsize=1; *p && *p != ','; p++) + { + if (!isspace(*p) && opsize < sizeof(op1)) + *op++ = tolower(*p), opsize++; + } + *op = '\0'; + + if (*p == ',') p++; + for (op = op2, opsize=1; *p && *p != ','; p++) + { + if (!isspace(*p) && opsize < sizeof(op2)) + *op++ = tolower(*p), opsize++; + } + *op = '\0'; + + aln->size = instructionSize(inst, op1, op2); + + aln->regsRead = newBitVect (END_IDX); + aln->regsWritten = newBitVect (END_IDX); + + opdat = bsearch (inst, ds390opcodeDataTable, + sizeof(ds390opcodeDataTable)/sizeof(ds390opcodedata), + sizeof(ds390opcodedata), ds390opcodeCompare); + + if (opdat) + { + updateOpRW (aln, op1, opdat->op1type, currentDPS); + updateOpRW (aln, op2, opdat->op2type, currentDPS); + if (strchr(opdat->pswtype,'r')) + aln->regsRead = bitVectSetBit (aln->regsRead, CND_IDX); + if (strchr(opdat->pswtype,'w')) + aln->regsWritten = bitVectSetBit (aln->regsWritten, CND_IDX); + } + + return aln; +} + +static void +initializeAsmLineNode (lineNode *line) +{ + if (!line->aln) + line->aln = asmLineNodeFromLineNode (line, 0); + else if (line->aln && !line->aln->initialized) + { + int currentDPS = line->aln->currentDPS; + free(line->aln); + line->aln = asmLineNodeFromLineNode (line, currentDPS); + } +} + +static int +getInstructionSize (lineNode *line) +{ + initializeAsmLineNode (line); + return line->aln->size; +} + +static bitVect * +getRegsRead (lineNode *line) +{ + initializeAsmLineNode (line); + return line->aln->regsRead; +} + +static bitVect * +getRegsWritten (lineNode *line) +{ + initializeAsmLineNode (line); + return line->aln->regsWritten; +} + /** $1 is always the basename. $2 is always the output file. @@ -385,7 +825,10 @@ PORT ds390_port = 1 }, { - _defaultRules + _defaultRules, + getInstructionSize, + getRegsRead, + getRegsWritten }, { /* Sizes: char, short, int, long, ptr, fptr, gptr, bit, float, max */ @@ -680,7 +1123,10 @@ PORT tininative_port = 1 }, { - _defaultRules + _defaultRules, + getInstructionSize, + getRegsRead, + getRegsWritten }, { /* Sizes: char, short, int, long, ptr, fptr, gptr, bit, float, max */ @@ -892,7 +1338,10 @@ PORT ds400_port = 1 }, { - _defaultRules + _defaultRules, + getInstructionSize, + getRegsRead, + getRegsWritten }, { /* Sizes: char, short, int, long, ptr, fptr, gptr, bit, float, max */ diff --git a/src/ds390/main.h b/src/ds390/main.h index 65552254..e3e8c123 100644 --- a/src/ds390/main.h +++ b/src/ds390/main.h @@ -1,8 +1,19 @@ #ifndef MAIN_INCLUDE #define MAIN_INCLUDE +typedef struct asmLineNode + { + int size; + int currentDPS; + unsigned initialized:1; + bitVect *regsRead; + bitVect *regsWritten; + } +asmLineNode; + bool x_parseOptions (char **argv, int *pargc); void x_setDefaultOptions (void); void x_finaliseOptions (void); +asmLineNode * ds390newAsmLineNode (int currentDPS); #endif diff --git a/src/ds390/ralloc.c b/src/ds390/ralloc.c index 008e7e07..1af7fdea 100644 --- a/src/ds390/ralloc.c +++ b/src/ds390/ralloc.c @@ -77,7 +77,13 @@ regs regs390[] = {REG_GPR, X10_IDX, REG_GPR, "x10", "x10", "xreg", 2, 0, 0}, {REG_GPR, X11_IDX, REG_GPR, "x11", "x11", "xreg", 3, 0, 0}, {REG_GPR, X12_IDX, REG_GPR, "x12", "x12", "xreg", 4, 0, 0}, - {REG_CND, CND_IDX, REG_GPR, "C", "C", "xreg", 0, 0, 0}, + {REG_CND, CND_IDX, REG_GPR, "C", "psw", "xreg", 0, 0, 0}, + {0, DPL1_IDX, 0, "dpl1", "dpl1", "dpl1", 0, 0, 0}, + {0, DPH1_IDX, 0, "dph1", "dph1", "dph1", 0, 0, 0}, + {0, DPX1_IDX, 0, "dpx1", "dpx1", "dpx1", 0, 0, 0}, + {0, DPS_IDX, 0, "dps", "dps", "dps", 0, 0, 0}, + {0, A_IDX, 0, "a", "acc", "acc", 0, 0, 0}, + {0, AP_IDX, 0, "ap", "ap", "ap", 0, 0, 0}, }; int ds390_nRegs = 13; static void spillThis (symbol *); @@ -130,7 +136,7 @@ ds390_regWithIdx (int idx) { int i; - for (i = 0; i < ds390_nRegs; i++) + for (i = 0; i < sizeof(regs390)/sizeof(regs); i++) if (regs390[i].rIdx == idx) return ®s390[i]; diff --git a/src/ds390/ralloc.h b/src/ds390/ralloc.h index 4dde61b6..ff7edb42 100644 --- a/src/ds390/ralloc.h +++ b/src/ds390/ralloc.h @@ -34,7 +34,10 @@ enum R0_IDX, R1_IDX, DPL_IDX, DPH_IDX, DPX_IDX, B_IDX, X8_IDX, X9_IDX, X10_IDX, X11_IDX, - X12_IDX, CND_IDX + X12_IDX, CND_IDX , + A_IDX, DPL1_IDX, DPH1_IDX, + DPX1_IDX, DPS_IDX, AP_IDX, + END_IDX };