From: maartenbrock Date: Thu, 30 Jun 2005 18:03:33 +0000 (+0000) Subject: * doc/sdccman.lyx: documented sfr16/sfr32, X-Git-Url: https://git.gag.com/?a=commitdiff_plain;h=69e754f12a02df9b381d11f0b7a1d31434e90ad5;p=fw%2Fsdcc * doc/sdccman.lyx: documented sfr16/sfr32, added example for using storage class with function pointers * src/mcs51/gen.c (genPlusIncr): optimized small offsets from dptr git-svn-id: https://sdcc.svn.sourceforge.net/svnroot/sdcc/trunk/sdcc@3791 4a8a32a2-be11-0410-ad9d-d568d2c75423 --- diff --git a/ChangeLog b/ChangeLog index e58d4d90..72e64b97 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,9 @@ +2005-06-30 Maarten Brock + + * doc/sdccman.lyx: documented sfr16/sfr32, + added example for using storage class with function pointers + * src/mcs51/gen.c (genPlusIncr): optimized small offsets from dptr + 2005-06-28 Maarten Brock * device/lib/_gptrget.c: also push/pop _PSBANK, added # to 0x03 diff --git a/doc/sdccman.lyx b/doc/sdccman.lyx index 83becfc4..772e52a5 100644 --- a/doc/sdccman.lyx +++ b/doc/sdccman.lyx @@ -8934,6 +8934,26 @@ sfr \begin_inset LatexCommand \index{\_\_sfr} +\end_inset + + / sfr16 +\begin_inset LatexCommand \index{sfr16} + +\end_inset + + +\begin_inset LatexCommand \index{\_\_sfr16} + +\end_inset + + / sfr32 +\begin_inset LatexCommand \index{sfr32} + +\end_inset + + +\begin_inset LatexCommand \index{\_\_sfr32} + \end_inset / sbit @@ -8946,10 +8966,10 @@ sfr Like the bit keyword, \emph on -sfr / sbit +sfr / sfr16 / sfr32 / sbit \emph default -signifies both a data-type and storage class, they are used to describe - the +signify both a data-type and storage class, they are used to describe the + \emph on s \emph default @@ -8987,6 +9007,23 @@ sfr at 0x80 P0;\SpecialChar ~ /* special function register P0 at location 0x80 */ \newline +/* 16 bit special function register combination for timer 0 */ +\newline +/* with the high byte at location 0x8C and the low byte at location 0x8A + */ +\newline +sfr16 at +\begin_inset LatexCommand \index{at} + +\end_inset + + +\begin_inset LatexCommand \index{\_\_at} + +\end_inset + + 0x8C8A TMR0; +\newline sbit at 0xd7 CY; /* CY (Carry Flag \begin_inset LatexCommand \index{Flags} @@ -9006,6 +9043,19 @@ Special function registers which are located on an address dividable by sbit \emph default addresses a specific bit within these sfr. +\newline +16 Bit and 32 bit special function register combinations which require a + certain access order are better not declared using +\emph on +sfr16 +\emph default + or +\emph on +sfr32. + +\emph default + Allthough SDCC usually accesses them Least Significant Byte (LSB) first, + this is not guaranteed. \layout Subsubsection Pointers @@ -9063,6 +9113,13 @@ code unsigned char * code p; */ \newline char * xdata p; +\newline + +\newline +/* the following is a function pointer physically located in data space + */ +\newline +char (* data fp)(void); \layout Standard Well you get the idea. diff --git a/src/mcs51/gen.c b/src/mcs51/gen.c index ebf6a532..23ac57d7 100644 --- a/src/mcs51/gen.c +++ b/src/mcs51/gen.c @@ -3573,6 +3573,29 @@ genPlusIncr (iCode * ic) return TRUE; } + /* if result is dptr */ + if ((AOP_TYPE (IC_RESULT (ic)) == AOP_STR) && + (AOP_SIZE (IC_RESULT (ic)) == 2) && + !strncmp(AOP (IC_RESULT (ic))->aopu.aop_str[0], "dpl", 4) && + !strncmp(AOP (IC_RESULT (ic))->aopu.aop_str[1], "dph", 4)) + { + if (aopGetUsesAcc (IC_LEFT (ic), 0)) + return FALSE; + + if (icount > 9) + return FALSE; + + if ((AOP_TYPE (IC_LEFT (ic)) != AOP_DIR) && (icount > 5)) + return FALSE; + + aopPut (IC_RESULT (ic), aopGet (IC_LEFT (ic), 0, FALSE, FALSE), 0, FALSE); + aopPut (IC_RESULT (ic), aopGet (IC_LEFT (ic), 1, FALSE, FALSE), 1, FALSE); + while (icount--) + emitcode ("inc", "dptr"); + + return TRUE; + } + /* if the sizes are greater than 1 then we cannot */ if (AOP_SIZE (IC_RESULT (ic)) > 1 || AOP_SIZE (IC_LEFT (ic)) > 1)