From: sandeep Date: Sun, 23 Sep 2001 00:44:04 +0000 (+0000) Subject: Fixed bug-463702 X-Git-Url: https://git.gag.com/?a=commitdiff_plain;h=5d300e8e6ba1957072a5d795a06771ad1eaa89cc;p=fw%2Fsdcc Fixed bug-463702 git-svn-id: https://sdcc.svn.sourceforge.net/svnroot/sdcc/trunk/sdcc@1297 4a8a32a2-be11-0410-ad9d-d568d2c75423 --- diff --git a/src/SDCCBBlock.c b/src/SDCCBBlock.c index 15470f19..2d83d9f3 100644 --- a/src/SDCCBBlock.c +++ b/src/SDCCBBlock.c @@ -162,31 +162,6 @@ dumpLiveRanges (int id, hTab * liveRanges) fprintf (file, "}{ sir@ %s", sym->usl.spillLoc->rname); } fprintf (file, "}"); - - /* if assigned to registers */ - if (sym->nRegs) - { - if (sym->isspilt) - { - if (!sym->remat) - if (sym->usl.spillLoc) - fprintf (file, "[%s]", (sym->usl.spillLoc->rname[0] ? - sym->usl.spillLoc->rname : - sym->usl.spillLoc->name)); - else - fprintf (file, "[err]"); - else - fprintf (file, "[remat]"); - } - else - { - int i; - fprintf (file, "["); - for (i = 0; i < sym->nRegs; i++) - fprintf (file, "%s ", port->getRegName (sym->regs[i])); - fprintf (file, "]"); - } - } fprintf (file, "\n"); } diff --git a/src/SDCClrange.c b/src/SDCClrange.c index c3922ce0..6d0a3cb9 100644 --- a/src/SDCClrange.c +++ b/src/SDCClrange.c @@ -545,35 +545,42 @@ markLiveRanges (eBBlock * ebp, eBBlock ** ebbs, int count) void rlivePoint (eBBlock ** ebbs, int count) { - int i; - - /* for all blocks do */ - for (i = 0; i < count; i++) - { - iCode *ic; - - /* for all instruction in the block do */ - for (ic = ebbs[i]->sch; ic; ic = ic->next) - { - symbol *lrange; - int k; - - ic->rlive = newBitVect (operandKey); - /* for all symbols in the liverange table */ - for (lrange = hTabFirstItem (liveRanges, &k); lrange; - lrange = hTabNextItem (liveRanges, &k)) - { - - /* if it is live then add the lrange to ic->rlive */ - if (lrange->liveFrom <= ic->seq && - lrange->liveTo >= ic->seq) - { - lrange->isLiveFcall |= (ic->op == CALL || ic->op == PCALL || ic->op == SEND); - ic->rlive = bitVectSetBit (ic->rlive, lrange->key); + int i; + + /* for all blocks do */ + for (i = 0; i < count; i++) { + iCode *ic; + + /* for all instruction in the block do */ + for (ic = ebbs[i]->sch; ic; ic = ic->next) { + symbol *lrange; + int k; + + ic->rlive = newBitVect (operandKey); + /* for all symbols in the liverange table */ + for (lrange = hTabFirstItem (liveRanges, &k); lrange; + lrange = hTabNextItem (liveRanges, &k)) { + + /* if it is live then add the lrange to ic->rlive */ + if (lrange->liveFrom <= ic->seq && + lrange->liveTo >= ic->seq) { + lrange->isLiveFcall |= (ic->op == CALL || ic->op == PCALL || ic->op == SEND); + ic->rlive = bitVectSetBit (ic->rlive, lrange->key); + } + } + /* overlapping live ranges should be eliminated */ + if (ASSIGN_ITEMP_TO_ITEMP (ic)) { + + if (SPIL_LOC(IC_RIGHT(ic)) == SPIL_LOC(IC_RESULT(ic)) && /* left & right share the same spil location */ + OP_SYMBOL(IC_RESULT(ic))->isreqv && /* left of assign is a register requivalent */ + !OP_SYMBOL(IC_RIGHT(ic))->isreqv && /* right side is not */ + OP_SYMBOL(IC_RIGHT(ic))->liveTo > ic->key && /* right side live beyond this point */ + bitVectnBitsOn(OP_DEFS(IC_RESULT(ic))) > 1 ) { /* left has multiple definitions */ + SPIL_LOC(IC_RIGHT(ic)) = NULL; /* then cannot share */ + } + } } - } } - } } diff --git a/src/avr/gen.c b/src/avr/gen.c index 3bed205b..cd262f6e 100644 --- a/src/avr/gen.c +++ b/src/avr/gen.c @@ -4639,16 +4639,17 @@ genAddrOf (iCode * ic) int size, offset; aopOp (IC_RESULT (ic), ic, FALSE); - + assert(AOP_SIZE(IC_RESULT(ic)) >= 2); /* if the operand is on the stack then we need to get the stack offset of this variable */ if (sym->onStack) { /* if it has an offset then we need to compute it */ if (sym->stack) { - emitcode ("mov", "a,_bp"); - emitcode ("add", "a,#0x%02x", +#if 0 + if (AOP_ISHIGHREG(AOP( ((char) sym->stack & 0xff)); +#endif aopPut (AOP (IC_RESULT (ic)), "a", 0); } else { diff --git a/src/z80/ralloc.c b/src/z80/ralloc.c index d15e042c..ac7fe0e7 100644 --- a/src/z80/ralloc.c +++ b/src/z80/ralloc.c @@ -2602,8 +2602,10 @@ z80_assignRegisters (eBBlock ** ebbs, int count) _G.dataExtend = 0; } - if (options.dump_rassgn) + if (options.dump_rassgn) { dumpEbbsToFileExt (DUMP_RASSGN, ebbs, count); + dumpLiveRanges (DUMP_LRANGE, liveRanges); + } /* after that create the register mask for each of the instruction */