From: Simon Wright <simon@pushface.org>
Date: Fri, 23 Jan 2015 20:43:32 +0000 (+0000)
Subject: Merge branch 'master' of https://github.com/texane/stlink
X-Git-Url: https://git.gag.com/?a=commitdiff_plain;h=5a722e32100257b4ea70f23fb766cff748c21b59;hp=-c;p=fw%2Fstlink

Merge branch 'master' of https://github.com/texane/stlink
---

5a722e32100257b4ea70f23fb766cff748c21b59
diff --combined gdbserver/gdb-server.c
index 2753709,f0e9653..daacb85
--- a/gdbserver/gdb-server.c
+++ b/gdbserver/gdb-server.c
@@@ -310,34 -310,12 +310,35 @@@ static const char* const memory_map_tem
      "    <property name=\"blocksize\">0x20000</property>"                   //128kB
      "  </memory>"
      "  <memory type=\"ram\" start=\"0x40000000\" length=\"0x1fffffff\"/>"   // peripheral regs
+     "  <memory type=\"ram\" start=\"0x60000000\" length=\"0x7fffffff\"/>"   // AHB3 Peripherals
      "  <memory type=\"ram\" start=\"0xe0000000\" length=\"0x1fffffff\"/>"   // cortex regs
      "  <memory type=\"rom\" start=\"0x1fff0000\" length=\"0x7800\"/>"       // bootrom
      "  <memory type=\"rom\" start=\"0x1fffc000\" length=\"0x10\"/>"         // option byte area
      "</memory-map>";
  
 +static const char* const memory_map_template_F4_HD =
 +    "<?xml version=\"1.0\"?>"
 +    "<!DOCTYPE memory-map PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\""
 +    "     \"http://sourceware.org/gdb/gdb-memory-map.dtd\">"
 +    "<memory-map>"
 +    "  <memory type=\"rom\" start=\"0x00000000\" length=\"0x100000\"/>"     // code = sram, bootrom or flash; flash is bigger
 +    "  <memory type=\"ram\" start=\"0x10000000\" length=\"0x10000\"/>"      // ccm ram
 +    "  <memory type=\"ram\" start=\"0x20000000\" length=\"0x30000\"/>"      // sram
 +    "  <memory type=\"flash\" start=\"0x08000000\" length=\"0x10000\">"     //Sectors 0..3
 +    "    <property name=\"blocksize\">0x4000</property>"                    //16kB
 +    "  </memory>"
 +    "  <memory type=\"flash\" start=\"0x08010000\" length=\"0x10000\">"     //Sector 4
 +    "    <property name=\"blocksize\">0x10000</property>"                   //64kB
 +    "  </memory>"
 +    "  <memory type=\"flash\" start=\"0x08020000\" length=\"0xE0000\">"     //Sectors 5..11
 +    "    <property name=\"blocksize\">0x20000</property>"                   //128kB
 +    "  </memory>"
 +    "  <memory type=\"ram\" start=\"0x40000000\" length=\"0x1fffffff\"/>"   // peripheral regs
 +    "  <memory type=\"ram\" start=\"0xe0000000\" length=\"0x1fffffff\"/>"   // cortex regs
 +    "  <memory type=\"rom\" start=\"0x1fff0000\" length=\"0x7800\"/>"       // bootrom
 +    "  <memory type=\"rom\" start=\"0x1fffc000\" length=\"0x10\"/>"         // option byte area
 +    "</memory-map>";
 +
  static const char* const memory_map_template =
      "<?xml version=\"1.0\"?>"
      "<!DOCTYPE memory-map PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\""
@@@ -359,10 -337,8 +360,10 @@@ char* make_memory_map(stlink_t *sl) 
      char* map = malloc(4096);
      map[0] = '\0';
  
 -    if(sl->chip_id==STM32_CHIPID_F4 || sl->chip_id==STM32_CHIPID_F4_HD) {
 +    if(sl->chip_id==STM32_CHIPID_F4) {
          strcpy(map, memory_map_template_F4);
 +    } else if(sl->chip_id==STM32_CHIPID_F4_HD) {
 +        strcpy(map, memory_map_template_F4_HD);
      } else {
          snprintf(map, 4096, memory_map_template,
                  sl->flash_size,
diff --combined src/stlink-common.h
index 17e488d,ca50c91..aeeaa85
--- a/src/stlink-common.h
+++ b/src/stlink-common.h
@@@ -108,7 -108,7 +108,7 @@@ extern "C" 
  #define STM32_CHIPID_L0             0x417
  #define STM32_CHIPID_F1_CONN        0x418
  #define STM32_CHIPID_F4_HD          0x419
- #define STM32_CHIPID_F1_VL_MEDIUM   0x420
+ #define STM32_CHIPID_F1_VL_MEDIUM_LOW 0x420
  
  #define STM32_CHIPID_F3             0x422
  #define STM32_CHIPID_F4_LP          0x423
@@@ -132,6 -132,8 +132,8 @@@
  
  #define STM32_CHIPID_F0_SMALL       0x444
  
+ #define STM32_CHIPID_F04            0x445
+ 
  #define STM32_CHIPID_F0_CAN         0x448
  
      /*
@@@ -209,7 -211,7 +211,7 @@@
              .description = "F42x and F43x device",
              .flash_size_reg = 0x1FFF7A22,  /* As in rm0090 since Rev 2*/
              .flash_pagesize = 0x4000,
 -            .sram_size = 0x30000,
 +            .sram_size = 0x40000,
              .bootrom_base = 0x1fff0000,
              .bootrom_size = 0x7800
          },
@@@ -296,12 -298,12 +298,12 @@@
              .bootrom_base = 0x1fffb000,
              .bootrom_size = 0x4800
          },
-         {
-             .chip_id = STM32_CHIPID_F1_VL_MEDIUM,
-             .description = "F1 Medium-density Value Line device",
+         {//Low and Medium density VL have same chipid. RM0041 25.6.1
+             .chip_id = STM32_CHIPID_F1_VL_MEDIUM_LOW,
+             .description = "F1 Medium/Low-density Value Line device",
              .flash_size_reg = 0x1ffff7e0,
              .flash_pagesize = 0x400,
-             .sram_size = 0x2000,
+             .sram_size = 0x2000,//0x1000 for low density devices
              .bootrom_base = 0x1ffff000,
              .bootrom_size = 0x800
          },
@@@ -367,6 -369,17 +369,17 @@@
              .bootrom_base = 0x1fffec00,		// "System memory" starting address from Table 2
              .bootrom_size = 0xC00 		// "System memory" byte size in hex from Table 2
          },
+         {
+             //Use this as an example for mapping future chips:
+             //RM0091 document was used to find these paramaters
+             .chip_id = STM32_CHIPID_F04,
+             .description = "F04x device",
+             .flash_size_reg = 0x1ffff7cc,	// "Flash size data register" (pg735)
+             .flash_pagesize = 0x400,		// Page sizes listed in Table 4
+             .sram_size = 0x1000,		// "SRAM" byte size in hex from Table 2
+             .bootrom_base = 0x1fffec00,		// "System memory" starting address from Table 2
+             .bootrom_size = 0xC00 		// "System memory" byte size in hex from Table 2
+         },
          {
              //Use this as an example for mapping future chips:
              //RM0091 document was used to find these paramaters