From: Bdale Garbee <bdale@gag.com>
Date: Mon, 4 Aug 2025 19:10:15 +0000 (-0600)
Subject: add pcb_drc function to do 'c r' equivalent and fail if anything is wrong
X-Git-Url: https://git.gag.com/?a=commitdiff_plain;h=50c308df0b9846576fa29a8ebc5e67e3ab27d1d2;p=hw%2Faltusmetrum

add pcb_drc function to do 'c r' equivalent and fail if anything is wrong
---

diff --git a/pcb-rnd.mk b/pcb-rnd.mk
index b2f6ff3..830777d 100644
--- a/pcb-rnd.mk
+++ b/pcb-rnd.mk
@@ -66,6 +66,10 @@ pcb:	$(SCHEMATICS) Makefile $(CONFIG)
 		pcb-rnd --gui batch $(PROJECT).lht
 #	echo "Run pcb-rnd and import $(PROJECT).tdx"
 
+define pcb_drc
+	echo "Atomic(Save); DeleteRats(AllRats); Atomic(Restore); AddRats(AllRats); Atomic(Close)" | pcb-rnd --gui batch $(PROJECT).lht | grep "The layout is complete and has no shorted nets."
+endef
+
 define emit_xyrs
 	pcb-rnd -x XY $(PROJECT).lht
 endef
@@ -73,6 +77,7 @@ endef
 ac: $(PROJECT)-ac-pcb.zip $(PROJECT)-ac-asy.zip
 
 $(PROJECT)-ac-pcb.zip:  $(PROJECT).lht $(CONFIG)
+	$(call pcb_drc)
 	pcb-rnd -x cam gerber:universal --outfile out/$(PROJECT) $(PROJECT).lht
 	rm -f $@ && zip -j $@ out/*
 
@@ -84,6 +89,7 @@ $(PROJECT)-ac-asy.zip:  $(PROJECT)-ac-pcb.zip partslist.csv
 oshpark: $(PROJECT)-oshpark.zip
 
 $(PROJECT)-oshpark.zip:	$(PROJECT).lht $(CONFIG)
+	$(call pcb_drc)
 	pcb-rnd -x cam gerber:OSH_Park --outfile out/$(PROJECT) $(PROJECT).lht
 	$(call emit_xyrs)
 	rm -f $@ && zip -j $@ out/* $(PROJECT).xy
@@ -91,6 +97,7 @@ $(PROJECT)-oshpark.zip:	$(PROJECT).lht $(CONFIG)
 seeed: $(PROJECT)-seeed.zip $(PROJECT)-seeed.csv
 
 $(PROJECT)-seeed.zip:	$(PROJECT).lht $(CONFIG) $(PROJECT)-sch.pdf $(SEEED_EXTRA)
+	$(call pcb_drc)
 	pcb-rnd -x cam doc_pnp_gerber --outfile out/$(PROJECT) $(PROJECT).lht
 	pcb-rnd -x cam gerber:Seeed --outfile out/$(PROJECT) $(PROJECT).lht
 	$(call emit_xyrs)
@@ -99,6 +106,7 @@ $(PROJECT)-seeed.zip:	$(PROJECT).lht $(CONFIG) $(PROJECT)-sch.pdf $(SEEED_EXTRA)
 jlcpcb: $(PROJECT)-jlcpcb.zip 
 
 $(PROJECT)-jlcpcb.zip:	$(PROJECT).lht $(CONFIG)
+	$(call pcb_drc)
 	pcb-rnd -x cam gerber:JLC_PCB --outfile out/$(PROJECT) $(PROJECT).lht
 	$(call emit_xyrs)
 	rm -f $@ && zip -j $@ out/* $(PROJECT).xy
@@ -106,6 +114,7 @@ $(PROJECT)-jlcpcb.zip:	$(PROJECT).lht $(CONFIG)
 jlcpcba: $(PROJECT)-jlcpcba.zip 
 
 $(PROJECT)-jlcpcba.zip:	$(PROJECT).lht $(CONFIG) $(PROJECT)-jlcpcb.csv
+	$(call pcb_drc)
 	pcb-rnd -x cam gerber:JLC_PCB --outfile out/$(PROJECT) $(PROJECT).lht
 	$(call emit_xyrs)
 	rm -f $@ && zip -j $@ out/* $(PROJECT).xy $(PROJECT)-jlcpcb.csv