From: eb Date: Wed, 17 Jan 2007 22:44:13 +0000 (+0000) Subject: Applied patch from Brett Trotter that stuffs zeros into the head of X-Git-Url: https://git.gag.com/?a=commitdiff_plain;h=4b5e1238492fe40727d19abefe22ae448c720419;p=debian%2Fgnuradio Applied patch from Brett Trotter that stuffs zeros into the head of the tx signal processing pipeline when the Tx FIFO is empty. This results in the DACs outputing zeros when there's no data, unless the tx pipeline is disabled on the host. git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@4287 221aa14e-8319-0410-a670-987f0aec2ac5 --- diff --git a/usrp/fpga/rbf/rev2/std_2rxhb_2tx.rbf b/usrp/fpga/rbf/rev2/std_2rxhb_2tx.rbf index 44fd06f7..966bae86 100755 Binary files a/usrp/fpga/rbf/rev2/std_2rxhb_2tx.rbf and b/usrp/fpga/rbf/rev2/std_2rxhb_2tx.rbf differ diff --git a/usrp/fpga/rbf/rev2/std_4rx_0tx.rbf b/usrp/fpga/rbf/rev2/std_4rx_0tx.rbf index e8a8b6ee..a5a5cf99 100755 Binary files a/usrp/fpga/rbf/rev2/std_4rx_0tx.rbf and b/usrp/fpga/rbf/rev2/std_4rx_0tx.rbf differ diff --git a/usrp/fpga/rbf/rev4/std_2rxhb_2tx.rbf b/usrp/fpga/rbf/rev4/std_2rxhb_2tx.rbf index 44fd06f7..966bae86 100755 Binary files a/usrp/fpga/rbf/rev4/std_2rxhb_2tx.rbf and b/usrp/fpga/rbf/rev4/std_2rxhb_2tx.rbf differ diff --git a/usrp/fpga/rbf/rev4/std_4rx_0tx.rbf b/usrp/fpga/rbf/rev4/std_4rx_0tx.rbf index e8a8b6ee..a5a5cf99 100755 Binary files a/usrp/fpga/rbf/rev4/std_4rx_0tx.rbf and b/usrp/fpga/rbf/rev4/std_4rx_0tx.rbf differ diff --git a/usrp/fpga/sdr_lib/tx_buffer.v b/usrp/fpga/sdr_lib/tx_buffer.v index ff8fd839..63202c9d 100644 --- a/usrp/fpga/sdr_lib/tx_buffer.v +++ b/usrp/fpga/sdr_lib/tx_buffer.v @@ -66,20 +66,20 @@ module tx_buffer load_next <= #1 4'd0; end else - if((load_next != channels) & !tx_empty) + if(load_next != channels) begin load_next <= #1 load_next + 4'd1; case(load_next) - 4'd0 : tx_i_0 <= #1 fifodata; - 4'd1 : tx_q_0 <= #1 fifodata; - 4'd2 : tx_i_1 <= #1 fifodata; - 4'd3 : tx_q_1 <= #1 fifodata; - 4'd4 : tx_i_2 <= #1 fifodata; - 4'd5 : tx_q_2 <= #1 fifodata; - 4'd6 : tx_i_3 <= #1 fifodata; - 4'd7 : tx_q_3 <= #1 fifodata; + 4'd0 : tx_i_0 <= #1 tx_empty ? 16'd0 : fifodata; + 4'd1 : tx_q_0 <= #1 tx_empty ? 16'd0 : fifodata; + 4'd2 : tx_i_1 <= #1 tx_empty ? 16'd0 : fifodata; + 4'd3 : tx_q_1 <= #1 tx_empty ? 16'd0 : fifodata; + 4'd4 : tx_i_2 <= #1 tx_empty ? 16'd0 : fifodata; + 4'd5 : tx_q_2 <= #1 tx_empty ? 16'd0 : fifodata; + 4'd6 : tx_i_3 <= #1 tx_empty ? 16'd0 : fifodata; + 4'd7 : tx_q_3 <= #1 tx_empty ? 16'd0 : fifodata; endcase // case(load_next) - end // if ((load_next != channels) & !tx_empty) + end // if (load_next != channels) else if(txstrobe & (load_next == channels)) begin load_next <= #1 4'd0; diff --git a/usrp/fpga/toplevel/usrp_std/usrp_std.qsf b/usrp/fpga/toplevel/usrp_std/usrp_std.qsf index 1503c8cc..8297f0f7 100644 --- a/usrp/fpga/toplevel/usrp_std/usrp_std.qsf +++ b/usrp/fpga/toplevel/usrp_std/usrp_std.qsf @@ -27,7 +27,7 @@ # ======================== set_global_assignment -name ORIGINAL_QUARTUS_VERSION 3.0 set_global_assignment -name PROJECT_CREATION_TIME_DATE "00:14:04 JULY 13, 2003" -set_global_assignment -name LAST_QUARTUS_VERSION "6.0 SP1" +set_global_assignment -name LAST_QUARTUS_VERSION 6.1 # Pin & Location Assignments # ==========================