From: tecodev Date: Fri, 27 Apr 2007 22:03:51 +0000 (+0000) Subject: * src/pic16/pcode.c (pBlockRemoveUnusedLabels,pic16_pBlockAddInval, X-Git-Url: https://git.gag.com/?a=commitdiff_plain;h=32f9639457392ae2dbf9def01371c95754bf0e46;p=fw%2Fsdcc * src/pic16/pcode.c (pBlockRemoveUnusedLabels,pic16_pBlockAddInval, createReachingDefinitions,assignValnums,pic16_destructDF, pic16_createDF,pic16_vcg_dumpedges,pic16_vcg_dump_default): prevent NULL pointer dereferences * device/lib/pic/libdev/pic16f886.c, * device/lib/pic/libdev/pic16f887.c: svn mv'ed to disabled_* to prevent building them, gputils do not really support them yet git-svn-id: https://sdcc.svn.sourceforge.net/svnroot/sdcc/trunk/sdcc@4774 4a8a32a2-be11-0410-ad9d-d568d2c75423 --- diff --git a/ChangeLog b/ChangeLog index 1cefc888..767387cf 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,13 @@ +2007-04-27 Raphael Neider + + * src/pic16/pcode.c (pBlockRemoveUnusedLabels,pic16_pBlockAddInval, + createReachingDefinitions,assignValnums,pic16_destructDF, + pic16_createDF,pic16_vcg_dumpedges,pic16_vcg_dump_default): + prevent NULL pointer dereferences + * device/lib/pic/libdev/pic16f886.c, + * device/lib/pic/libdev/pic16f887.c: svn mv'ed to disabled_* to + prevent building them, gputils do not really support them yet + 2007-03-27 Frieder Ferlemann * device/lib/_ltoa.c: 36 bytes less __data mem. This really diff --git a/device/lib/pic/libdev/disabled_pic16f886.c b/device/lib/pic/libdev/disabled_pic16f886.c new file mode 100644 index 00000000..67139b80 --- /dev/null +++ b/device/lib/pic/libdev/disabled_pic16f886.c @@ -0,0 +1,130 @@ +/* Register definitions for pic16f886. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + * + * Rename this file if your gputils in fact support this device. + */ +#include + +__data __at (INDF_ADDR) volatile char INDF; +__sfr __at (TMR0_ADDR) TMR0; +__data __at (PCL_ADDR) volatile char PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PORTE_ADDR) PORTE; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (CCPR2L_ADDR) CCPR2L; +__sfr __at (CCPR2H_ADDR) CCPR2H; +__sfr __at (CCP2CON_ADDR) CCP2CON; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (TRISE_ADDR) TRISE; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (OSCCON_ADDR) OSCCON; +__sfr __at (OSCTUNE_ADDR) OSCTUNE; +__sfr __at (SSPCON2_ADDR) SSPCON2; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (WPUB_ADDR) WPUB; +__sfr __at (IOCB_ADDR) IOCB; +__sfr __at (VRCON_ADDR) VRCON; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (SPBRGH_ADDR) SPBRGH; +__sfr __at (PWM1CON_ADDR) PWM1CON; +__sfr __at (ECCPAS_ADDR) ECCPAS; +__sfr __at (PSTRCON_ADDR) PSTRCON; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (WDTCON_ADDR) WDTCON; +__sfr __at (CM1CON0_ADDR) CM1CON0; +__sfr __at (CM2CON0_ADDR) CM2CON0; +__sfr __at (CM2CON1_ADDR) CM2CON1; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (EEDATH_ADDR) EEDATH; +__sfr __at (EEADRH_ADDR) EEADRH; +__sfr __at (SRCON_ADDR) SRCON; +__sfr __at (BAUDCTL_ADDR) BAUDCTL; +__sfr __at (ANSEL_ADDR) ANSEL; +__sfr __at (ANSELH_ADDR) ANSELH; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits; +volatile __ANSELH_bits_t __at(ANSELH_ADDR) ANSELH_bits; +volatile __BAUDCTL_bits_t __at(BAUDCTL_ADDR) BAUDCTL_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; +volatile __CM1CON0_bits_t __at(CM1CON0_ADDR) CM1CON0_bits; +volatile __CM2CON0_bits_t __at(CM2CON0_ADDR) CM2CON0_bits; +volatile __CM2CON1_bits_t __at(CM2CON1_ADDR) CM2CON1_bits; +volatile __ECCPAS_bits_t __at(ECCPAS_ADDR) ECCPAS_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __IOCB_bits_t __at(IOCB_ADDR) IOCB_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; +volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; +volatile __PSTRCON_bits_t __at(PSTRCON_ADDR) PSTRCON_bits; +volatile __PWM1CON_bits_t __at(PWM1CON_ADDR) PWM1CON_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __SPBRG_bits_t __at(SPBRG_ADDR) SPBRG_bits; +volatile __SPBRGH_bits_t __at(SPBRGH_ADDR) SPBRGH_bits; +volatile __SRCON_bits_t __at(SRCON_ADDR) SRCON_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; +volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; +volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; +volatile __WPUB_bits_t __at(WPUB_ADDR) WPUB_bits; + diff --git a/device/lib/pic/libdev/disabled_pic16f887.c b/device/lib/pic/libdev/disabled_pic16f887.c new file mode 100644 index 00000000..b091ee35 --- /dev/null +++ b/device/lib/pic/libdev/disabled_pic16f887.c @@ -0,0 +1,134 @@ +/* Register definitions for pic16f887. + * This file was automatically generated by: + * inc2h.pl V4585 + * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved + * + * Rename this file if your gputils in fact support this device. + */ +#include + +__data __at (INDF_ADDR) volatile char INDF; +__sfr __at (TMR0_ADDR) TMR0; +__data __at (PCL_ADDR) volatile char PCL; +__sfr __at (STATUS_ADDR) STATUS; +__sfr __at (FSR_ADDR) FSR; +__sfr __at (PORTA_ADDR) PORTA; +__sfr __at (PORTB_ADDR) PORTB; +__sfr __at (PORTC_ADDR) PORTC; +__sfr __at (PORTD_ADDR) PORTD; +__sfr __at (PORTE_ADDR) PORTE; +__sfr __at (PCLATH_ADDR) PCLATH; +__sfr __at (INTCON_ADDR) INTCON; +__sfr __at (PIR1_ADDR) PIR1; +__sfr __at (PIR2_ADDR) PIR2; +__sfr __at (TMR1L_ADDR) TMR1L; +__sfr __at (TMR1H_ADDR) TMR1H; +__sfr __at (T1CON_ADDR) T1CON; +__sfr __at (TMR2_ADDR) TMR2; +__sfr __at (T2CON_ADDR) T2CON; +__sfr __at (SSPBUF_ADDR) SSPBUF; +__sfr __at (SSPCON_ADDR) SSPCON; +__sfr __at (CCPR1L_ADDR) CCPR1L; +__sfr __at (CCPR1H_ADDR) CCPR1H; +__sfr __at (CCP1CON_ADDR) CCP1CON; +__sfr __at (RCSTA_ADDR) RCSTA; +__sfr __at (TXREG_ADDR) TXREG; +__sfr __at (RCREG_ADDR) RCREG; +__sfr __at (CCPR2L_ADDR) CCPR2L; +__sfr __at (CCPR2H_ADDR) CCPR2H; +__sfr __at (CCP2CON_ADDR) CCP2CON; +__sfr __at (ADRESH_ADDR) ADRESH; +__sfr __at (ADCON0_ADDR) ADCON0; +__sfr __at (OPTION_REG_ADDR) OPTION_REG; +__sfr __at (TRISA_ADDR) TRISA; +__sfr __at (TRISB_ADDR) TRISB; +__sfr __at (TRISC_ADDR) TRISC; +__sfr __at (TRISD_ADDR) TRISD; +__sfr __at (TRISE_ADDR) TRISE; +__sfr __at (PIE1_ADDR) PIE1; +__sfr __at (PIE2_ADDR) PIE2; +__sfr __at (PCON_ADDR) PCON; +__sfr __at (OSCCON_ADDR) OSCCON; +__sfr __at (OSCTUNE_ADDR) OSCTUNE; +__sfr __at (SSPCON2_ADDR) SSPCON2; +__sfr __at (PR2_ADDR) PR2; +__sfr __at (SSPADD_ADDR) SSPADD; +__sfr __at (SSPSTAT_ADDR) SSPSTAT; +__sfr __at (WPUB_ADDR) WPUB; +__sfr __at (IOCB_ADDR) IOCB; +__sfr __at (VRCON_ADDR) VRCON; +__sfr __at (TXSTA_ADDR) TXSTA; +__sfr __at (SPBRG_ADDR) SPBRG; +__sfr __at (SPBRGH_ADDR) SPBRGH; +__sfr __at (PWM1CON_ADDR) PWM1CON; +__sfr __at (ECCPAS_ADDR) ECCPAS; +__sfr __at (PSTRCON_ADDR) PSTRCON; +__sfr __at (ADRESL_ADDR) ADRESL; +__sfr __at (ADCON1_ADDR) ADCON1; +__sfr __at (WDTCON_ADDR) WDTCON; +__sfr __at (CM1CON0_ADDR) CM1CON0; +__sfr __at (CM2CON0_ADDR) CM2CON0; +__sfr __at (CM2CON1_ADDR) CM2CON1; +__sfr __at (EEDATA_ADDR) EEDATA; +__sfr __at (EEADR_ADDR) EEADR; +__sfr __at (EEDATH_ADDR) EEDATH; +__sfr __at (EEADRH_ADDR) EEADRH; +__sfr __at (SRCON_ADDR) SRCON; +__sfr __at (BAUDCTL_ADDR) BAUDCTL; +__sfr __at (ANSEL_ADDR) ANSEL; +__sfr __at (ANSELH_ADDR) ANSELH; +__sfr __at (EECON1_ADDR) EECON1; +__sfr __at (EECON2_ADDR) EECON2; + +// +// bitfield definitions +// +volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; +volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; +volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits; +volatile __ANSELH_bits_t __at(ANSELH_ADDR) ANSELH_bits; +volatile __BAUDCTL_bits_t __at(BAUDCTL_ADDR) BAUDCTL_bits; +volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; +volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; +volatile __CM1CON0_bits_t __at(CM1CON0_ADDR) CM1CON0_bits; +volatile __CM2CON0_bits_t __at(CM2CON0_ADDR) CM2CON0_bits; +volatile __CM2CON1_bits_t __at(CM2CON1_ADDR) CM2CON1_bits; +volatile __ECCPAS_bits_t __at(ECCPAS_ADDR) ECCPAS_bits; +volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; +volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; +volatile __IOCB_bits_t __at(IOCB_ADDR) IOCB_bits; +volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; +volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; +volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; +volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; +volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; +volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; +volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; +volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; +volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; +volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; +volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; +volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits; +volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; +volatile __PSTRCON_bits_t __at(PSTRCON_ADDR) PSTRCON_bits; +volatile __PWM1CON_bits_t __at(PWM1CON_ADDR) PWM1CON_bits; +volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; +volatile __SPBRG_bits_t __at(SPBRG_ADDR) SPBRG_bits; +volatile __SPBRGH_bits_t __at(SPBRGH_ADDR) SPBRGH_bits; +volatile __SRCON_bits_t __at(SRCON_ADDR) SRCON_bits; +volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; +volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; +volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; +volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; +volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; +volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; +volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; +volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; +volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; +volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits; +volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; +volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; +volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; +volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; +volatile __WPUB_bits_t __at(WPUB_ADDR) WPUB_bits; + diff --git a/device/lib/pic/libdev/pic16f886.c b/device/lib/pic/libdev/pic16f886.c deleted file mode 100644 index dcac6378..00000000 --- a/device/lib/pic/libdev/pic16f886.c +++ /dev/null @@ -1,128 +0,0 @@ -/* Register definitions for pic16f886. - * This file was automatically generated by: - * inc2h.pl V4585 - * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved - */ -#include - -__data __at (INDF_ADDR) volatile char INDF; -__sfr __at (TMR0_ADDR) TMR0; -__data __at (PCL_ADDR) volatile char PCL; -__sfr __at (STATUS_ADDR) STATUS; -__sfr __at (FSR_ADDR) FSR; -__sfr __at (PORTA_ADDR) PORTA; -__sfr __at (PORTB_ADDR) PORTB; -__sfr __at (PORTC_ADDR) PORTC; -__sfr __at (PORTE_ADDR) PORTE; -__sfr __at (PCLATH_ADDR) PCLATH; -__sfr __at (INTCON_ADDR) INTCON; -__sfr __at (PIR1_ADDR) PIR1; -__sfr __at (PIR2_ADDR) PIR2; -__sfr __at (TMR1L_ADDR) TMR1L; -__sfr __at (TMR1H_ADDR) TMR1H; -__sfr __at (T1CON_ADDR) T1CON; -__sfr __at (TMR2_ADDR) TMR2; -__sfr __at (T2CON_ADDR) T2CON; -__sfr __at (SSPBUF_ADDR) SSPBUF; -__sfr __at (SSPCON_ADDR) SSPCON; -__sfr __at (CCPR1L_ADDR) CCPR1L; -__sfr __at (CCPR1H_ADDR) CCPR1H; -__sfr __at (CCP1CON_ADDR) CCP1CON; -__sfr __at (RCSTA_ADDR) RCSTA; -__sfr __at (TXREG_ADDR) TXREG; -__sfr __at (RCREG_ADDR) RCREG; -__sfr __at (CCPR2L_ADDR) CCPR2L; -__sfr __at (CCPR2H_ADDR) CCPR2H; -__sfr __at (CCP2CON_ADDR) CCP2CON; -__sfr __at (ADRESH_ADDR) ADRESH; -__sfr __at (ADCON0_ADDR) ADCON0; -__sfr __at (OPTION_REG_ADDR) OPTION_REG; -__sfr __at (TRISA_ADDR) TRISA; -__sfr __at (TRISB_ADDR) TRISB; -__sfr __at (TRISC_ADDR) TRISC; -__sfr __at (TRISE_ADDR) TRISE; -__sfr __at (PIE1_ADDR) PIE1; -__sfr __at (PIE2_ADDR) PIE2; -__sfr __at (PCON_ADDR) PCON; -__sfr __at (OSCCON_ADDR) OSCCON; -__sfr __at (OSCTUNE_ADDR) OSCTUNE; -__sfr __at (SSPCON2_ADDR) SSPCON2; -__sfr __at (PR2_ADDR) PR2; -__sfr __at (SSPADD_ADDR) SSPADD; -__sfr __at (SSPSTAT_ADDR) SSPSTAT; -__sfr __at (WPUB_ADDR) WPUB; -__sfr __at (IOCB_ADDR) IOCB; -__sfr __at (VRCON_ADDR) VRCON; -__sfr __at (TXSTA_ADDR) TXSTA; -__sfr __at (SPBRG_ADDR) SPBRG; -__sfr __at (SPBRGH_ADDR) SPBRGH; -__sfr __at (PWM1CON_ADDR) PWM1CON; -__sfr __at (ECCPAS_ADDR) ECCPAS; -__sfr __at (PSTRCON_ADDR) PSTRCON; -__sfr __at (ADRESL_ADDR) ADRESL; -__sfr __at (ADCON1_ADDR) ADCON1; -__sfr __at (WDTCON_ADDR) WDTCON; -__sfr __at (CM1CON0_ADDR) CM1CON0; -__sfr __at (CM2CON0_ADDR) CM2CON0; -__sfr __at (CM2CON1_ADDR) CM2CON1; -__sfr __at (EEDATA_ADDR) EEDATA; -__sfr __at (EEADR_ADDR) EEADR; -__sfr __at (EEDATH_ADDR) EEDATH; -__sfr __at (EEADRH_ADDR) EEADRH; -__sfr __at (SRCON_ADDR) SRCON; -__sfr __at (BAUDCTL_ADDR) BAUDCTL; -__sfr __at (ANSEL_ADDR) ANSEL; -__sfr __at (ANSELH_ADDR) ANSELH; -__sfr __at (EECON1_ADDR) EECON1; -__sfr __at (EECON2_ADDR) EECON2; - -// -// bitfield definitions -// -volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; -volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; -volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits; -volatile __ANSELH_bits_t __at(ANSELH_ADDR) ANSELH_bits; -volatile __BAUDCTL_bits_t __at(BAUDCTL_ADDR) BAUDCTL_bits; -volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; -volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; -volatile __CM1CON0_bits_t __at(CM1CON0_ADDR) CM1CON0_bits; -volatile __CM2CON0_bits_t __at(CM2CON0_ADDR) CM2CON0_bits; -volatile __CM2CON1_bits_t __at(CM2CON1_ADDR) CM2CON1_bits; -volatile __ECCPAS_bits_t __at(ECCPAS_ADDR) ECCPAS_bits; -volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; -volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; -volatile __IOCB_bits_t __at(IOCB_ADDR) IOCB_bits; -volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; -volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; -volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; -volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; -volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; -volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; -volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; -volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; -volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; -volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; -volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; -volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; -volatile __PSTRCON_bits_t __at(PSTRCON_ADDR) PSTRCON_bits; -volatile __PWM1CON_bits_t __at(PWM1CON_ADDR) PWM1CON_bits; -volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; -volatile __SPBRG_bits_t __at(SPBRG_ADDR) SPBRG_bits; -volatile __SPBRGH_bits_t __at(SPBRGH_ADDR) SPBRGH_bits; -volatile __SRCON_bits_t __at(SRCON_ADDR) SRCON_bits; -volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; -volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; -volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; -volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; -volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; -volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; -volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; -volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; -volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; -volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; -volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; -volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; -volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; -volatile __WPUB_bits_t __at(WPUB_ADDR) WPUB_bits; - diff --git a/device/lib/pic/libdev/pic16f887.c b/device/lib/pic/libdev/pic16f887.c deleted file mode 100644 index 4fce9d2f..00000000 --- a/device/lib/pic/libdev/pic16f887.c +++ /dev/null @@ -1,132 +0,0 @@ -/* Register definitions for pic16f887. - * This file was automatically generated by: - * inc2h.pl V4585 - * Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved - */ -#include - -__data __at (INDF_ADDR) volatile char INDF; -__sfr __at (TMR0_ADDR) TMR0; -__data __at (PCL_ADDR) volatile char PCL; -__sfr __at (STATUS_ADDR) STATUS; -__sfr __at (FSR_ADDR) FSR; -__sfr __at (PORTA_ADDR) PORTA; -__sfr __at (PORTB_ADDR) PORTB; -__sfr __at (PORTC_ADDR) PORTC; -__sfr __at (PORTD_ADDR) PORTD; -__sfr __at (PORTE_ADDR) PORTE; -__sfr __at (PCLATH_ADDR) PCLATH; -__sfr __at (INTCON_ADDR) INTCON; -__sfr __at (PIR1_ADDR) PIR1; -__sfr __at (PIR2_ADDR) PIR2; -__sfr __at (TMR1L_ADDR) TMR1L; -__sfr __at (TMR1H_ADDR) TMR1H; -__sfr __at (T1CON_ADDR) T1CON; -__sfr __at (TMR2_ADDR) TMR2; -__sfr __at (T2CON_ADDR) T2CON; -__sfr __at (SSPBUF_ADDR) SSPBUF; -__sfr __at (SSPCON_ADDR) SSPCON; -__sfr __at (CCPR1L_ADDR) CCPR1L; -__sfr __at (CCPR1H_ADDR) CCPR1H; -__sfr __at (CCP1CON_ADDR) CCP1CON; -__sfr __at (RCSTA_ADDR) RCSTA; -__sfr __at (TXREG_ADDR) TXREG; -__sfr __at (RCREG_ADDR) RCREG; -__sfr __at (CCPR2L_ADDR) CCPR2L; -__sfr __at (CCPR2H_ADDR) CCPR2H; -__sfr __at (CCP2CON_ADDR) CCP2CON; -__sfr __at (ADRESH_ADDR) ADRESH; -__sfr __at (ADCON0_ADDR) ADCON0; -__sfr __at (OPTION_REG_ADDR) OPTION_REG; -__sfr __at (TRISA_ADDR) TRISA; -__sfr __at (TRISB_ADDR) TRISB; -__sfr __at (TRISC_ADDR) TRISC; -__sfr __at (TRISD_ADDR) TRISD; -__sfr __at (TRISE_ADDR) TRISE; -__sfr __at (PIE1_ADDR) PIE1; -__sfr __at (PIE2_ADDR) PIE2; -__sfr __at (PCON_ADDR) PCON; -__sfr __at (OSCCON_ADDR) OSCCON; -__sfr __at (OSCTUNE_ADDR) OSCTUNE; -__sfr __at (SSPCON2_ADDR) SSPCON2; -__sfr __at (PR2_ADDR) PR2; -__sfr __at (SSPADD_ADDR) SSPADD; -__sfr __at (SSPSTAT_ADDR) SSPSTAT; -__sfr __at (WPUB_ADDR) WPUB; -__sfr __at (IOCB_ADDR) IOCB; -__sfr __at (VRCON_ADDR) VRCON; -__sfr __at (TXSTA_ADDR) TXSTA; -__sfr __at (SPBRG_ADDR) SPBRG; -__sfr __at (SPBRGH_ADDR) SPBRGH; -__sfr __at (PWM1CON_ADDR) PWM1CON; -__sfr __at (ECCPAS_ADDR) ECCPAS; -__sfr __at (PSTRCON_ADDR) PSTRCON; -__sfr __at (ADRESL_ADDR) ADRESL; -__sfr __at (ADCON1_ADDR) ADCON1; -__sfr __at (WDTCON_ADDR) WDTCON; -__sfr __at (CM1CON0_ADDR) CM1CON0; -__sfr __at (CM2CON0_ADDR) CM2CON0; -__sfr __at (CM2CON1_ADDR) CM2CON1; -__sfr __at (EEDATA_ADDR) EEDATA; -__sfr __at (EEADR_ADDR) EEADR; -__sfr __at (EEDATH_ADDR) EEDATH; -__sfr __at (EEADRH_ADDR) EEADRH; -__sfr __at (SRCON_ADDR) SRCON; -__sfr __at (BAUDCTL_ADDR) BAUDCTL; -__sfr __at (ANSEL_ADDR) ANSEL; -__sfr __at (ANSELH_ADDR) ANSELH; -__sfr __at (EECON1_ADDR) EECON1; -__sfr __at (EECON2_ADDR) EECON2; - -// -// bitfield definitions -// -volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits; -volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits; -volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits; -volatile __ANSELH_bits_t __at(ANSELH_ADDR) ANSELH_bits; -volatile __BAUDCTL_bits_t __at(BAUDCTL_ADDR) BAUDCTL_bits; -volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits; -volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits; -volatile __CM1CON0_bits_t __at(CM1CON0_ADDR) CM1CON0_bits; -volatile __CM2CON0_bits_t __at(CM2CON0_ADDR) CM2CON0_bits; -volatile __CM2CON1_bits_t __at(CM2CON1_ADDR) CM2CON1_bits; -volatile __ECCPAS_bits_t __at(ECCPAS_ADDR) ECCPAS_bits; -volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits; -volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits; -volatile __IOCB_bits_t __at(IOCB_ADDR) IOCB_bits; -volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits; -volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits; -volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits; -volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits; -volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits; -volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits; -volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits; -volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits; -volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits; -volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits; -volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits; -volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits; -volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits; -volatile __PSTRCON_bits_t __at(PSTRCON_ADDR) PSTRCON_bits; -volatile __PWM1CON_bits_t __at(PWM1CON_ADDR) PWM1CON_bits; -volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits; -volatile __SPBRG_bits_t __at(SPBRG_ADDR) SPBRG_bits; -volatile __SPBRGH_bits_t __at(SPBRGH_ADDR) SPBRGH_bits; -volatile __SRCON_bits_t __at(SRCON_ADDR) SRCON_bits; -volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits; -volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits; -volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits; -volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits; -volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits; -volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits; -volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits; -volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits; -volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits; -volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits; -volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits; -volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits; -volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits; -volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits; -volatile __WPUB_bits_t __at(WPUB_ADDR) WPUB_bits; - diff --git a/src/pic16/pcode.c b/src/pic16/pcode.c index 9cb878fe..a65789b0 100644 --- a/src/pic16/pcode.c +++ b/src/pic16/pcode.c @@ -6724,7 +6724,7 @@ static void pBlockRemoveUnusedLabels(pBlock *pb) { pCode *pc; pCodeLabel *pcl; - if(!pb) + if(!pb || !pb->pcHead) return; for(pc = pb->pcHead; (pc=pic16_findNextInstruction(pc->next)) != NULL; ) { @@ -10103,6 +10103,8 @@ static defmap_t *pic16_pBlockAddInval (pBlock *pb, symbol_t sym) { defmap_t *map; pCodeFlow *pcfl; + assert(pb); + pcfl = PCI(pic16_findNextInstruction (pb->pcHead))->pcflow; /* find initial value (assigning pc == NULL) */ @@ -11301,6 +11303,8 @@ static void createReachingDefinitions (pBlock *pb) { set *todo; set *blacklist; + if (!pb) return; + /* initialize out_vals to unique'fied defmaps per pCodeFlow */ for (pc = pic16_findNextInstruction (pb->pcHead); pc; pc = pic16_findNextInstruction (pc->next)) { if (isPCFL(pc)) { @@ -11810,6 +11814,8 @@ static void assignValnums (pCode *pc) { static void pic16_destructDF (pBlock *pb) { pCode *pc, *next; + if (!pb) return; + /* remove old defmaps */ pc = pic16_findNextInstruction (pb->pcHead); while (pc) { @@ -11835,6 +11841,8 @@ static void pic16_destructDF (pBlock *pb) { static int pic16_pBlockHasAsmdirs (pBlock *pb) { pCode *pc; + if (!pb) return 0; + pc = pic16_findNextInstruction (pb->pcHead); while (pc) { if (isPCAD(pc)) return 1; @@ -11922,6 +11930,8 @@ static void pic16_createDF (pBlock *pb) { pCode *pc, *next; int change=0; + if (!pb) return; + //fprintf (stderr, "creating DF for pb %p (%s)\n", pb, pic16_pBlockGetFunctionName (pb)); pic16_destructDF (pb); @@ -12215,6 +12225,8 @@ static void pic16_vcg_dumpedges (pCode *pc, FILE *of) { static void pic16_vcg_dump (FILE *of, pBlock *pb) { pCode *pc; + if (!pb) return; + /* check pBlock: do not analyze pBlocks with ASMDIRs (for now...) */ if (pic16_pBlockHasAsmdirs (pb)) { //fprintf (stderr, "%s: pBlock contains ASMDIRs -- data flow analysis not performed!\n", __FUNCTION__); @@ -12235,6 +12247,8 @@ static void pic16_vcg_dump_default (pBlock *pb) { char buf[BUF_SIZE]; pCode *pc; + if (!pb) return; + /* get function name */ pc = pb->pcHead; while (pc && !isPCF(pc)) pc = pc->next;