From: kbongers <kbongers@4a8a32a2-be11-0410-ad9d-d568d2c75423>
Date: Tue, 10 Jul 2001 20:44:09 +0000 (+0000)
Subject: update 80C517 s0con
X-Git-Url: https://git.gag.com/?a=commitdiff_plain;h=238134186c7dfc7fa07e8ec35650f03086d17104;p=fw%2Fsdcc

update 80C517 s0con


git-svn-id: https://sdcc.svn.sourceforge.net/svnroot/sdcc/trunk/sdcc@1050 4a8a32a2-be11-0410-ad9d-d568d2c75423
---

diff --git a/device/include/mcs51reg.h b/device/include/mcs51reg.h
index 438f6694..313e3660 100644
--- a/device/include/mcs51reg.h
+++ b/device/include/mcs51reg.h
@@ -2977,6 +2977,22 @@ sfr at 0x98 S0CON ; // serial channel 0 control register P80C552 specific
 //sbit at 0x9F SM0  ;
 #endif
  
+#ifdef S0CON__SM0__SM1__SM20__REN0__TB80__RB80__TI0__RI0
+#undef S0CON__SM0__SM1__SM20__REN0__TB80__RB80__TI0__RI0
+// serial channel 0 buffer register SAB80517 specific(same as stock SCON)
+sfr at 0x98 S0CON ;
+sbit at 0x98 RI0  ;
+sbit at 0x99 TI0  ;
+sbit at 0x9A RB80 ;
+sbit at 0x9B TB80  ;
+sbit at 0x9C REN0  ;
+sbit at 0x9D SM20  ;
+sbit at 0x9E SM1  ;
+sbit at 0x9F SM0  ;
+
+#endif
+
+
 #ifdef S0RELL
 #undef S0RELL
 sfr at 0xAA S0RELL ; // serial channel 0 reload register low byte SAB80517 specific
@@ -3582,4 +3598,4 @@ sfr at 0x91 XPAGE     ; // Page Address Register for Extended On-Chip Ram - Infi
 #define COMPARE_VECTOR 19       // 0x9B compare
 #endif
 
-#endif	// End of the header -> #ifndef MCS51REG_H
\ No newline at end of file
+#endif	// End of the header -> #ifndef MCS51REG_H