From: drdani Date: Mon, 6 Nov 2000 08:52:34 +0000 (+0000) Subject: 0.2.38-pre1 implements AVR instructions X-Git-Url: https://git.gag.com/?a=commitdiff_plain;h=0ad8c78844ada3a7591fc0b355c19c06c4a069b0;p=fw%2Fsdcc 0.2.38-pre1 implements AVR instructions git-svn-id: https://sdcc.svn.sourceforge.net/svnroot/sdcc/trunk/sdcc@488 4a8a32a2-be11-0410-ad9d-d568d2c75423 --- diff --git a/sim/ucsim/.version b/sim/ucsim/.version index aa049997..4381ddad 100644 --- a/sim/ucsim/.version +++ b/sim/ucsim/.version @@ -1 +1 @@ -0.2.37 +0.2.38-pre1 diff --git a/sim/ucsim/avr.src/Makefile.in b/sim/ucsim/avr.src/Makefile.in index 12345689..d1cefecc 100644 --- a/sim/ucsim/avr.src/Makefile.in +++ b/sim/ucsim/avr.src/Makefile.in @@ -43,7 +43,7 @@ OBJECTS = savr.o glob.o \ AVRASM = tavrasm TEST_OBJ = test_bit.hex test_dis.hex test_mov.hex test_jmp.hex \ - test_arith.hex + test_arith.hex test_call.hex # Compiling entire program or any subproject diff --git a/sim/ucsim/avr.src/arith_cl.h b/sim/ucsim/avr.src/arith_cl.h index 24bc86ee..8d43b88f 100644 --- a/sim/ucsim/avr.src/arith_cl.h +++ b/sim/ucsim/avr.src/arith_cl.h @@ -23,5 +23,5 @@ virtual int dec_Rd(t_mem code); virtual int mul_Rd_Rr(t_mem code); virtual int adiw_Rdl_K(t_mem code); - + virtual int sbiw_Rdl_K(t_mem code); /* End of avr.src/arith_cl.h */ diff --git a/sim/ucsim/avr.src/arith_inst.cc b/sim/ucsim/avr.src/arith_inst.cc index 11f7e168..566797d0 100644 --- a/sim/ucsim/avr.src/arith_inst.cc +++ b/sim/ucsim/avr.src/arith_inst.cc @@ -29,23 +29,153 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA #include "regsavr.h" +/* + * Compare with Immediate + * CPI Rd,K 16<=d<=31, 0<=K<=255 + * 0011 KKKK dddd KKKK + *____________________________________________________________________________ + */ + int cl_avr::cpi_Rd_K(t_mem code) { + t_addr d; + t_mem D, K, result, res; + + d= 16+(code&0xf0)>>4; + K= (code&0xf) | ((code&0xf00)>>8); + D= ram->read(d); + + if (K & 0x80) + K|= ~0xff; + if (D & 0x80) + D|= ~0xff; + t_mem sreg= ram->get(SREG); + (signed)result= (signed)D-(signed)K; + res= result & 0xff; + + sreg= sreg & ~(BIT_H|BIT_S|BIT_V|BIT_N|BIT_C|BIT_Z); + if (0x08 & (((~D)&K) | (K&res) | (res&(~D)))) + sreg|= BIT_H; + int n= 0, v= 0; + if (0x80 & ((D&(~K)&(~res)) | ((~D)&K&res))) + { + sreg|= BIT_V; + v= 1; + } + if (res & 0x80) + { + sreg|= BIT_N; + n= 1; + } + if ((n ^ v) & 1) + sreg|= BIT_S; + if (!res) + sreg|= BIT_Z; + if (0x80 & (((~D)&K) | (K&res) | (res&(~D)))) + sreg|= BIT_C; + ram->set(SREG, sreg); return(resGO); } +/* + * Substract Immediate with Carry + * SBCI Rd,K 16<=d<=31, 0<=K<=255 + * 0100 KKKK dddd KKKK + *____________________________________________________________________________ + */ + int cl_avr::sbci_Rd_K(t_mem code) { + t_addr d; + t_mem D, K, result, res; + + d= 16+(code&0xf0)>>4; + K= (code&0xf) | ((code&0xf00)>>8); + D= ram->read(d); + + if (K & 0x80) + K|= ~0xff; + if (D & 0x80) + D|= ~0xff; + t_mem sreg= ram->get(SREG); + (signed)result= (signed)D-(signed)K-(sreg&BIT_C)?1:0; + res= result & 0xff; + ram->write(d, &res); + + sreg= sreg & ~(BIT_H|BIT_S|BIT_V|BIT_N|BIT_C); + if (0x08 & (((~D)&K) | (K&res) | (res&(~D)))) + sreg|= BIT_H; + int n= 0, v= 0; + if (0x80 & ((D&(~K)&(~res)) | ((~D)&K&res))) + { + sreg|= BIT_V; + v= 1; + } + if (res & 0x80) + { + sreg|= BIT_N; + n= 1; + } + if ((n ^ v) & 1) + sreg|= BIT_S; + if (res) + sreg&= ~BIT_Z; + if (0x80 & (((~D)&K) | (K&res) | (res&(~D)))) + sreg|= BIT_C; + ram->set(SREG, sreg); return(resGO); } +/* + * Substract Immediate + * SUBI Rd,K 16<=d<=31, 0<=K<=255 + * 0101 KKKK dddd KKKK + *____________________________________________________________________________ + */ + int cl_avr::subi_Rd_K(t_mem code) { + t_addr d; + t_mem D, K, result, res; + + d= 16+(code&0xf0)>>4; + K= (code&0xf) | ((code&0xf00)>>8); + D= ram->read(d); + + if (K & 0x80) + K|= ~0xff; + if (D & 0x80) + D|= ~0xff; + (signed)result= (signed)D-(signed)K; + res= result & 0xff; + ram->write(d, &res); + + t_mem sreg= ram->get(SREG) & ~(BIT_H|BIT_S|BIT_V|BIT_N|BIT_Z|BIT_C); + if (0x08 & (((~D)&K) | (K&res) | (res&(~D)))) + sreg|= BIT_H; + int n= 0, v= 0; + if (0x80 & ((D&(~K)&(~res)) | ((~D)&K&res))) + { + sreg|= BIT_V; + v= 1; + } + if (res & 0x80) + { + sreg|= BIT_N; + n= 1; + } + if ((n ^ v) & 1) + sreg|= BIT_S; + if (!res) + sreg|= BIT_Z; + if (0x80 & (((~D)&K) | (K&res) | (res&(~D)))) + sreg|= BIT_C; + ram->set(SREG, sreg); return(resGO); } @@ -85,16 +215,103 @@ cl_avr::fmulsu_Rd_Rr(t_mem code) } +/* + * Compare with Carry + * CPC Rd,Rr 0<=d<=31, 0<=r<=31 + * 0000 01rd dddd rrrr + *____________________________________________________________________________ + */ + int cl_avr::cpc_Rd_Rr(t_mem code) { + t_addr r, d; + t_mem R, D, result, res; + + d= (code&0x1f0)>>4; + r= ((code&0x200)>>5)|(code&0xf); + R= ram->read(r); + D= ram->read(d); + if (R & 0x80) + R|= ~0xff; + if (D & 0x80) + D|= ~0xff; + t_mem sreg= ram->get(SREG); + (signed)result= (signed)D-(signed)R-(sreg&BIT_C)?1:0; + res= result & 0xff; + + sreg= sreg & ~(BIT_H|BIT_S|BIT_V|BIT_N|BIT_C); + if (0x08 & (((~D)&R) | (R&res) | (res&(~D)))) + sreg|= BIT_H; + int n= 0, v= 0; + if (0x80 & ((D&(~R)&(~res)) | ((~D)&R&res))) + { + sreg|= BIT_V; + v= 1; + } + if (res & 0x80) + { + sreg|= BIT_N; + n= 1; + } + if ((n ^ v) & 1) + sreg|= BIT_S; + if (res) + sreg&= ~BIT_Z; + if (0x80 & (((~D)&R) | (R&res) | (res&(~D)))) + sreg|= BIT_C; + ram->set(SREG, sreg); return(resGO); } +/* + * Substract with Carry + * SBC Rd,Rr 0<=d<=31, 0<=r<=31 + * 0000 10rd dddd rrrr + *____________________________________________________________________________ + */ + int cl_avr::sbc_Rd_Rr(t_mem code) { + t_addr r, d; + t_mem R, D, result, res; + + d= (code&0x1f0)>>4; + r= ((code&0x200)>>5)|(code&0xf); + R= ram->read(r); + D= ram->read(d); + if (R & 0x80) + R|= ~0xff; + if (D & 0x80) + D|= ~0xff; + t_mem sreg= ram->get(SREG); + (signed)result= (signed)D-(signed)R-(sreg&BIT_C)?1:0; + res= result & 0xff; + ram->write(d, &res); + + sreg= sreg & ~(BIT_H|BIT_S|BIT_V|BIT_N|BIT_C); + if (0x08 & (((~D)&R) | (R&res) | (res&(~D)))) + sreg|= BIT_H; + int n= 0, v= 0; + if (0x80 & ((D&(~R)&(~res)) | ((~D)&R&res))) + { + sreg|= BIT_V; + v= 1; + } + if (res & 0x80) + { + sreg|= BIT_N; + n= 1; + } + if ((n ^ v) & 1) + sreg|= BIT_S; + if (res) + sreg&= ~BIT_Z; + if (0x80 & (((~D)&R) | (R&res) | (res&(~D)))) + sreg|= BIT_C; + ram->set(SREG, sreg); return(resGO); } @@ -151,16 +368,101 @@ cl_avr::add_Rd_Rr(t_mem code) } +/* + * Compare + * CP Rd,Rr 0<=d<=31, 0<=r<=31 + * 0001 01rd dddd rrrr + *____________________________________________________________________________ + */ + int cl_avr::cp_Rd_Rr(t_mem code) { + t_addr r, d; + t_mem R, D, result, res; + + d= (code&0x1f0)>>4; + r= ((code&0x200)>>5)|(code&0xf); + R= ram->read(r); + D= ram->read(d); + if (R & 0x80) + R|= ~0xff; + if (D & 0x80) + D|= ~0xff; + (signed)result= (signed)D-(signed)R; + res= result & 0xff; + + t_mem sreg= ram->get(SREG) & ~(BIT_H|BIT_S|BIT_V|BIT_N|BIT_Z|BIT_C); + if (0x08 & (((~D)&R) | (R&res) | (res&(~D)))) + sreg|= BIT_H; + int n= 0, v= 0; + if (0x80 & ((D&(~R)&(~res)) | ((~D)&R&res))) + { + sreg|= BIT_V; + v= 1; + } + if (res & 0x80) + { + sreg|= BIT_N; + n= 1; + } + if ((n ^ v) & 1) + sreg|= BIT_S; + if (!res) + sreg|= BIT_Z; + if (0x80 & (((~D)&R) | (R&res) | (res&(~D)))) + sreg|= BIT_C; + ram->set(SREG, sreg); return(resGO); } +/* + * Substract without Carry + * SUB Rd,Rr 0<=d<=31, 0<=r<=31 + * 0001 10rd dddd rrrr + *____________________________________________________________________________ + */ + int cl_avr::sub_Rd_Rr(t_mem code) { + t_addr r, d; + t_mem R, D, result, res; + + d= (code&0x1f0)>>4; + r= ((code&0x200)>>5)|(code&0xf); + R= ram->read(r); + D= ram->read(d); + if (R & 0x80) + R|= ~0xff; + if (D & 0x80) + D|= ~0xff; + (signed)result= (signed)D-(signed)R; + res= result & 0xff; + ram->write(d, &res); + + t_mem sreg= ram->get(SREG) & ~(BIT_H|BIT_S|BIT_V|BIT_N|BIT_Z|BIT_C); + if (0x08 & (((~D)&R) | (R&res) | (res&(~D)))) + sreg|= BIT_H; + int n= 0, v= 0; + if (0x80 & ((D&(~R)&(~res)) | ((~D)&R&res))) + { + sreg|= BIT_V; + v= 1; + } + if (res & 0x80) + { + sreg|= BIT_N; + n= 1; + } + if ((n ^ v) & 1) + sreg|= BIT_S; + if (!res) + sreg|= BIT_Z; + if (0x80 & (((~D)&R) | (R&res) | (res&(~D)))) + sreg|= BIT_C; + ram->set(SREG, sreg); return(resGO); } @@ -217,16 +519,90 @@ cl_avr::adc_Rd_Rr(t_mem code) } +/* + * One's Complement + * COM Rd 0<=d<=31 + * 1001 010d dddd 0000 + *____________________________________________________________________________ + */ + int cl_avr::com_Rd(t_mem code) { + t_addr d; + t_mem D, result, res; + + d= (code&0x1f0)>>4; + D= ram->read(d); + result= ~D; + res= result & 0xff; + ram->write(d, &res); + + t_mem sreg= ram->get(SREG); + if (!res) + sreg|= BIT_Z; + else + sreg&= ~BIT_Z; + sreg&= ~BIT_V; + if (res & 0x80) + sreg|= (BIT_N|BIT_S); + else + sreg&= ~(BIT_N|BIT_S); + sreg|= BIT_C; + ram->set(SREG, sreg); + return(resGO); } +/* + * Two's Complement + * NEG Rd 0<=d<=31 + * 1001 010d dddd 0001 + *____________________________________________________________________________ + */ + int cl_avr::neg_Rd(t_mem code) { + t_addr d; + t_mem D, result, res; + + d= (code&0x1f0)>>4; + D= ram->read(d); + result= (~D)+1; + res= result & 0xff; + ram->write(d, &res); + + t_mem sreg= ram->get(SREG); + if (res & (~d) & 0x08) + sreg|= BIT_H; + else + sreg&= ~BIT_H; + if (res > 0x80) + sreg|= BIT_S; + else + sreg&= ~BIT_S; + if (!res) + { + sreg|= BIT_Z; + sreg&= ~BIT_C; + } + else + { + sreg&= ~BIT_Z; + sreg|= BIT_C; + } + if (res == 0x80) + sreg|= BIT_V; + else + sreg&= ~BIT_V; + if (res & 0x80) + sreg|= (BIT_N); + else + sreg&= ~BIT_N; + ram->set(SREG, sreg); + return(resGO); } @@ -277,37 +653,202 @@ cl_avr::inc_Rd(t_mem code) } +/* + * Arithmetic Shift Right + * ASR Rd 0<=d<=31 + * 1001 010d dddd 0101 + *____________________________________________________________________________ + */ + int cl_avr::asr_Rd(t_mem code) { + t_addr d; + t_mem D, result, res; + + d= (code&0x1f0)>>4; + D= ram->read(d); + t_mem sreg= ram->read(SREG) & ~(BIT_S|BIT_V|BIT_N|BIT_Z|BIT_C); + int n=0, v= 0, c= 0; + if (D & 1) + { + sreg|= BIT_C; + c= 1; + } + result= D>>1; + if (result & 0x40) + result|= 0x80; + res= result & 0xff; + ram->write(d, &res); + if (res & 0x80) + { + sreg|= BIT_N; + n= 1; + } + if ((n ^ c) & 1) + { + sreg|= BIT_V; + v= 1; + } + if ((n ^ v) & 1) + sreg|= BIT_S; + if (!res) + sreg|= BIT_Z; + ram->write(SREG, &sreg); return(resGO); } +/* + * Logical Shift Right + * LSR Rd 0<=d<=31 + * 1001 010d dddd 0110 + *____________________________________________________________________________ + */ + int cl_avr::lsr_Rd(t_mem code) { + t_addr d; + t_mem D, result, res; + + d= (code &0x1f0)>>4; + D= ram->read(d); + t_mem sreg= ram->read(SREG) & ~(BIT_S|BIT_V|BIT_N|BIT_Z|BIT_C); + if (D & 1) + sreg|= (BIT_C|BIT_V|BIT_S); + result= D >> 1; + res= result & 0xff; + ram->write(d, &res); + if (!res) + sreg|= BIT_Z; + ram->write(SREG, &sreg); return(resGO); } +/* + * Rotate Right trough Carry + * ROR Rd 0<=d<=31 + * 1001 010d dddd 0111 + *____________________________________________________________________________ + */ + int cl_avr::ror_Rd(t_mem code) { + t_addr d; + t_mem D, result, res; + + d= (code&0x1f0)>>4; + D= ram->read(d); + t_mem sreg= ram->read(SREG); + int oldc= sreg & BIT_C; + sreg= sreg & ~(BIT_S|BIT_V|BIT_N|BIT_Z|BIT_C); + int n= 0, v= 0, c= 0; + if (D & 1) + { + sreg|= BIT_C; + c= 1; + } + result= (D >> 1) | oldc?0x80:0; + res= result & 0xff; + ram->write(d, &res); + if (res & 0x80) + { + sreg|= BIT_N; + n= 1; + } + if ((n ^ c) & 1) + { + sreg|= BIT_V; + v= 1; + } + if ((n ^ v) & 1) + sreg|= BIT_S; + if (!res) + sreg|= BIT_Z; + ram->write(SREG, &sreg); return(resGO); } +/* + * Decrement + * DEC Rd 0<=d<=31 + * 1001 010d dddd 1010 + *____________________________________________________________________________ + */ + int cl_avr::dec_Rd(t_mem code) { + t_addr d; + t_mem D, result, res; + + d= (code&0x1f0)>>4; + D= ram->read(d); + result= D-1; + res= result & 0xff; + ram->write(d, &res); + + t_mem sreg= ram->get(SREG); + if (!res) + sreg|= BIT_Z; + else + sreg&= ~BIT_Z; + int n= 0, v= 0; + if (res & 0x80) + { + sreg|= BIT_N; + n= 1; + } + else + sreg&= ~BIT_N; + if (D == 0x80) + { + sreg|= BIT_V; + v= 1; + } + else + sreg&= ~BIT_V; + if ((n ^ v) & 1) + sreg|= BIT_S; + else + sreg&= ~BIT_S; + ram->set(SREG, sreg); + return(resGO); } +/* + * Multiply + * MUL Rd,Rr 0<=d<=31, 0<=r<=31 + * 1001 11rd dddd rrrr + *____________________________________________________________________________ + */ + int cl_avr::mul_Rd_Rr(t_mem code) { + t_addr d, r; + t_mem D, R, result, resl, resh; + + d= (code>>4) & 0x1f; + r= ((code&0x200)>>5) | (code&0xf); + D= ram->read(d); + R= ram->read(r); + result= R*D; + resl= result & 0xff; + resh= (result>>8) & 0xff; + ram->write(0, &resl); + ram->write(1, &resh); + t_mem sreg= ram->read(SREG) & ~BIT_C; + if (resh & 0x80) + sreg|= BIT_C; + ram->write(SREG, &sreg); + tick(1); return(resGO); } @@ -361,4 +902,55 @@ cl_avr::adiw_Rdl_K(t_mem code) } +/* + * Substract Immediate from Word + * SBIW Rdl,K dl={24,26,28,30}, 0<=K<=63 + * 1001 0111 KK dd KKKK + *____________________________________________________________________________ + */ + +int +cl_avr::sbiw_Rdl_K(t_mem code) +{ + t_addr dl; + t_mem D, K, result, res; + + dl= 24+(2*((code&0x30)>>4)); + K= ((code&0xc0)>>2)|(code&0xf); + D= ram->read(dl+1)*256 + ram->read(dl); + if (K & 0x20) + K|= ~0x3f; + if (D & 0x8000) + D|= ~0xffff; + (signed)result= (signed)D-(signed)K; + res= result & 0xffff; + t_mem resl= res&0xff, resh= (res>>8)&0xff; + ram->write(dl+1, &resh); + ram->write(dl, &resl); + + t_mem sreg= ram->get(SREG) & ~(BIT_S|BIT_V|BIT_N|BIT_Z|BIT_C); + int n= 0, v= 0; + if (0x8000 & D & (~res)) + { + sreg|= BIT_V; + v= 1; + } + if (res & 0x8000) + { + sreg|= BIT_N; + n= 1; + } + if ((n ^ v) & 1) + sreg|= BIT_S; + if (!res) + sreg|= BIT_Z; + if (0x8000 & res & (~D)) + sreg|= BIT_C; + ram->set(SREG, sreg); + tick(1); + + return(resGO); +} + + /* End of avr.src/arith_inst.cc */ diff --git a/sim/ucsim/avr.src/avr.cc b/sim/ucsim/avr.src/avr.cc index 950bd824..6e330f5b 100644 --- a/sim/ucsim/avr.src/avr.cc +++ b/sim/ucsim/avr.src/avr.cc @@ -53,6 +53,7 @@ cl_avr::cl_avr(class cl_sim *asim): cl_uc(asim) { type= CPU_AVR; + sleep_executed= 0; } int @@ -84,7 +85,8 @@ cl_avr::get_mem_size(enum mem_class type) case MEM_IRAM: return(0x10000); default: return(0); } - return(cl_uc::get_mem_size(type)); + //return(0); + //return(cl_uc::get_mem_size(type)); } int @@ -471,6 +473,8 @@ cl_avr::exec_inst(void) return(ijmp(code)); if ((code & 0xff00) == 0x9600) return(adiw_Rdl_K(code)); + if ((code & 0xff00) == 0x9700) + return(sbiw_Rdl_K(code)); switch (code & 0xfc00) { case 0x9000: @@ -571,6 +575,91 @@ cl_avr::exec_inst(void) } +/* + */ + +int +cl_avr::push_data(t_mem data) +{ + t_addr sp; + t_mem spl, sph; + + spl= ram->read(SPL); + sph= ram->read(SPH); + sp= 0xffff & (256*sph + spl); + ram->write(sp, &data); + sp= 0xffff & (sp-1); + spl= sp & 0xff; + sph= (sp>>8) & 0xff; + ram->write(SPL, &spl); + ram->write(SPH, &sph); + return(resGO); +} + +int +cl_avr::push_addr(t_addr addr) +{ + t_addr sp; + t_mem spl, sph, al, ah; + + spl= ram->read(SPL); + sph= ram->read(SPH); + sp= 0xffff & (256*sph + spl); + al= addr & 0xff; + ah= (addr>>8) & 0xff; + ram->write(sp, &ah); + sp= 0xffff & (sp-1); + ram->write(sp, &al); + sp= 0xffff & (sp-1); + spl= sp & 0xff; + sph= (sp>>8) & 0xff; + ram->write(SPL, &spl); + ram->write(SPH, &sph); + return(resGO); +} + +int +cl_avr::pop_data(t_mem *data) +{ + t_addr sp; + t_mem spl, sph; + + spl= ram->read(SPL); + sph= ram->read(SPH); + sp= 256*sph + spl; + sp= 0xffff & (sp+1); + *data= ram->read(sp); + spl= sp & 0xff; + sph= (sp>>8) & 0xff; + ram->write(SPL, &spl); + ram->write(SPH, &sph); + + return(resGO); +} + +int +cl_avr::pop_addr(t_addr *addr) +{ + t_addr sp; + t_mem spl, sph, al, ah; + + spl= ram->read(SPL); + sph= ram->read(SPH); + sp= 256*sph + spl; + sp= 0xffff & (sp+1); + al= ram->read(sp); + sp= 0xffff & (sp+1); + ah= ram->read(sp); + *addr= ah*256 + al; + spl= sp & 0xff; + sph= (sp>>8) & 0xff; + ram->write(SPL, &spl); + ram->write(SPH, &sph); + + return(resGO); +} + + /* * Set Z, N, V, S bits of SREG after logic instructions and some others */ diff --git a/sim/ucsim/avr.src/avrcl.h b/sim/ucsim/avr.src/avrcl.h index 34fdc3ed..73e7f43f 100644 --- a/sim/ucsim/avr.src/avrcl.h +++ b/sim/ucsim/avr.src/avrcl.h @@ -40,6 +40,7 @@ class cl_avr: public cl_uc public: cl_mem *ram; cl_mem *rom; + int sleep_executed; public: cl_avr(class cl_sim *asim); virtual int init(void); @@ -58,6 +59,11 @@ public: virtual int exec_inst(void); + virtual int push_data(t_mem data); + virtual int push_addr(t_addr addr); + virtual int pop_data(t_mem *data); + virtual int pop_addr(t_addr *addr); + void set_zn0s(t_mem data); #include "arith_cl.h" #include "logic_cl.h" diff --git a/sim/ucsim/avr.src/inst.cc b/sim/ucsim/avr.src/inst.cc index 32809dec..3e9382c9 100644 --- a/sim/ucsim/avr.src/inst.cc +++ b/sim/ucsim/avr.src/inst.cc @@ -46,16 +46,32 @@ cl_avr::nop(t_mem code) } +/* + * Sleep + * SLEEP + * 1001 0101 100X 1000 + *____________________________________________________________________________ + */ + int cl_avr::sleep(t_mem code) { + sleep_executed= 1; return(resGO); } +/* + * Watchdog Reset + * WDR + * 1001 0101 101X 1000 + *____________________________________________________________________________ + */ + int cl_avr::wdr(t_mem code) { + //FIXME return(resGO); } diff --git a/sim/ucsim/avr.src/jump_inst.cc b/sim/ucsim/avr.src/jump_inst.cc index 4b300b3a..706b6935 100644 --- a/sim/ucsim/avr.src/jump_inst.cc +++ b/sim/ucsim/avr.src/jump_inst.cc @@ -43,6 +43,7 @@ cl_avr::ijmp(t_mem code) z= ram->get(ZH)*256 + ram->get(ZL); PC= ((PC & ~0xffff) | z) % rom->size; + //FIXME: analyze return(resGO); } @@ -54,9 +55,26 @@ cl_avr::eijmp(t_mem code) } +/* + * Indirect Call to Subroutine + * ICALL + * 1001 0101 XXXX 1001 + *____________________________________________________________________________ + */ + int cl_avr::icall(t_mem code) { + t_mem zl, zh; + t_addr z; + + push_addr(PC); + zl= ram->read(ZL); + zh= ram->read(ZH); + z= zh*256 + zl; + PC= (PC & ~0xffff) | (z & 0xffff); + //FIXME: analyze + tick(2); return(resGO); } @@ -68,16 +86,43 @@ cl_avr::eicall(t_mem code) } +/* + * Return from Subroutine + * RET + * 1001 0101 0XX0 1000 + *____________________________________________________________________________ + */ + int cl_avr::ret(t_mem code) { + t_addr a; + + pop_addr(&a); + PC= a % rom->size; + tick(3); return(resGO); } +/* + * Return from Interrupt + * RETI + * 1001 0101 0XX1 1000 + *____________________________________________________________________________ + */ + int cl_avr::reti(t_mem code) { + t_addr a; + + pop_addr(&a); + PC= a % rom->size; + t_mem sreg= ram->read(SREG); + sreg|= BIT_I; + ram->write(SREG, &sreg); + tick(3); return(resGO); } @@ -105,9 +150,26 @@ cl_avr::rjmp_k(t_mem code) } +/* + * Relative Call to Subroutine + * RCALL k + * 1101 kkkk kkkk kkkk -1K<=k<=+1k + *____________________________________________________________________________ + */ + int cl_avr::rcall_k(t_mem code) { + t_addr k; + + push_addr(PC); + k= code & 0xfff; + if (k & 0x800) + k|= ~0xfff; + PC= (signed)PC + (signed)k; + PC= PC % rom->size; + tick(2); + return(resGO); } @@ -161,8 +223,7 @@ cl_avr::jmp_k(t_mem code) k= ((code&0x1f0)>>3)|(code&1); k= (k<<16)|fetch(); - PC= k; - //FIXME: analyze + PC= k % rom->size; tick(2); return(resGO); } @@ -183,7 +244,8 @@ cl_avr::call_k(t_mem code) k= (((code&0x1f0)>>3)|(code&1))*0x10000; k= k + fetch(); - + push_addr(PC); + PC= k % rom->size; tick(3); return(resGO); } @@ -209,7 +271,7 @@ cl_avr::brbs_s_k(t_mem code) { if (code&0x200) k|= -128; - PC= (PC+k) % get_mem_size(MEM_ROM); + PC= (PC+k) % rom->size; tick(1); } return(resGO); @@ -236,7 +298,7 @@ cl_avr::brbc_s_k(t_mem code) { if (code&0x200) k|= -128; - PC= (PC+k) % get_mem_size(MEM_ROM); + PC= (PC+k) % rom->size; tick(1); } return(resGO); @@ -266,7 +328,7 @@ cl_avr::sbrc_Rr_b(t_mem code) i++; if (dt[i].mnemonic != NULL) { - PC= (PC + dt[i].length) % get_mem_size(MEM_ROM); + PC= (PC + dt[i].length) % rom->size; tick(1); } else @@ -299,7 +361,7 @@ cl_avr::sbrs_Rr_b(t_mem code) i++; if (dt[i].mnemonic != NULL) { - PC= (PC + dt[i].length) % get_mem_size(MEM_ROM); + PC= (PC + dt[i].length) % rom->size; tick(1); } else diff --git a/sim/ucsim/avr.src/move_inst.cc b/sim/ucsim/avr.src/move_inst.cc index b8271f5a..7ad3a005 100644 --- a/sim/ucsim/avr.src/move_inst.cc +++ b/sim/ucsim/avr.src/move_inst.cc @@ -411,9 +411,24 @@ cl_avr::ld_Rd_$X(t_mem code) } +/* + * Pop Register from Stack + * POP Rd 0<=d<=31 + * 1001 000d dddd 1111 + *____________________________________________________________________________ + */ + int cl_avr::pop_Rd(t_mem code) { + t_addr d; + t_mem D; + + d= (code&0x1f0)>>4; + pop_data(&D); + ram->write(d, &D); + tick(1); + return(resGO); } @@ -609,9 +624,24 @@ cl_avr::st_$X_Rr(t_mem code) } +/* + * Push register on Stack + * PUSH Rr 0<=r<=31 + * 1001 001d dddd 1111 + *____________________________________________________________________________ + */ + int cl_avr::push_Rr(t_mem code) { + t_addr d; + t_mem D; + + d= (code&0x1f0)>>4; + D= ram->read(d); + push_data(D); + tick(1); + return(resGO); } diff --git a/sim/ucsim/avr.src/savr.cc b/sim/ucsim/avr.src/savr.cc index f092b65d..9b3d7ca2 100644 --- a/sim/ucsim/avr.src/savr.cc +++ b/sim/ucsim/avr.src/savr.cc @@ -35,7 +35,7 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA int main(int argc, char *argv[]) { - simulator= new cl_simavr(0, argc, argv); + simulator= new cl_simavr(argc, argv); simulator->init(); simulator->main(); delete simulator; diff --git a/sim/ucsim/avr.src/simavr.cc b/sim/ucsim/avr.src/simavr.cc index b125f7d6..bb885512 100644 --- a/sim/ucsim/avr.src/simavr.cc +++ b/sim/ucsim/avr.src/simavr.cc @@ -26,14 +26,80 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA /*@1@*/ +#include + #include "simavrcl.h" #include "avrcl.h" -cl_simavr::cl_simavr(char *more_args, int iargc, char *iargv[]): - cl_sim(more_args, iargc, iargv) +cl_simavr::cl_simavr(int iargc, char *iargv[]): + cl_sim("h", iargc, iargv) {} + +static void +print_help(char *name) +{ + printf("%s: %s\n", name, VERSIONSTR); + printf("Usage: %s [-hHVvP] [-p prompt] [-t CPU] [-X freq[k|M]]\n" + " [-c file] [-s file] [-S optionlist]" +#ifdef SOCKET_AVAIL + " [-Z portnum]" +#endif + "\n" + " [files...]\n", name); + printf + ( + "Options:\n" + " -t CPU Type of CPU: etc.\n" + " -X freq[k|M] XTAL frequency\n" + " -c file Open command console on `file'\n" +#ifdef SOCKET_AVAIL + " -Z portnum Use localhost:portnumber for command console\n" +#endif + " -s file Connect serial interface to `file'\n" + " -S options `options' is a comma separated list of options\n" + " according to serial interface. Know options are:\n" + " in=file serial input will be read from file named `file'\n" + " out=file serial output will be written to `file'\n" + " -p prompt Specify string for prompt\n" + " -P Prompt is a null ('\\0') character\n" + " -V Verbose mode\n" + " -v Print out version number\n" + " -H Print out types of known CPUs\n" + " -h Print out this help\n" + ); +} + + +int +cl_simavr::proc_arg(char optopt, char *optarg) +{ + switch (optopt) + { + + case 'h': + + print_help("savr"); + exit(0); + break; + + case '?': + + if (isprint(optopt)) + fprintf(stderr, "Unknown option `-%c'.\n", optopt); + else + fprintf(stderr, "Unknown option character `\\x%x'.\n", optopt); + return(1); + break; + + default: + // should never happen... + abort(); + } +} + + class cl_uc * cl_simavr::mk_controller(void) { diff --git a/sim/ucsim/avr.src/simavrcl.h b/sim/ucsim/avr.src/simavrcl.h index b7e2af78..34bbe94a 100644 --- a/sim/ucsim/avr.src/simavrcl.h +++ b/sim/ucsim/avr.src/simavrcl.h @@ -34,7 +34,8 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA class cl_simavr: public cl_sim { public: - cl_simavr(char *more_args, int iargc, char *iargv[]); + cl_simavr(int iargc, char *iargv[]); + virtual int proc_arg(char optopt, char *optarg); virtual class cl_uc *mk_controller(void); }; diff --git a/sim/ucsim/avr.src/test_call.asm b/sim/ucsim/avr.src/test_call.asm new file mode 100644 index 00000000..753a686a --- /dev/null +++ b/sim/ucsim/avr.src/test_call.asm @@ -0,0 +1,14 @@ + nop + ldi r16,$ff + out $3d,r16 + ldi r16,$01 + out $3e,r16 + nop + call sub1 + nop + +sub1: nop + ret + +copyright: + .db "(c) 2000 talker Bt." diff --git a/sim/ucsim/cmd.src/(c).1 b/sim/ucsim/cmd.src/(c).1 index d673f9fd..3fbc0394 100644 --- a/sim/ucsim/cmd.src/(c).1 +++ b/sim/ucsim/cmd.src/(c).1 @@ -1,5 +1,5 @@ /* - * Simulator of microcontrollers (@@F@@) + * Simulator of microcontrollers (cmd.src/@@F@@) * * Copyright (C) @@S@@,@@Y@@ Drotos Daniel, Talker Bt. * diff --git a/sim/ucsim/cmd.src/Makefile.in b/sim/ucsim/cmd.src/Makefile.in index 09344f23..da32d8bb 100644 --- a/sim/ucsim/cmd.src/Makefile.in +++ b/sim/ucsim/cmd.src/Makefile.in @@ -1,5 +1,5 @@ # -# S51 mcs51/Makefile +# ucsim cmd.src/Makefile # # (c) Drotos Daniel, Talker Bt. 1997 # @@ -114,4 +114,4 @@ checkconf: $(MAKE) -f conf.mk srcdir="$(srcdir)" PRJDIR="$(PRJDIR)" freshconf;\ fi -# End of mcs51/Makefile.in +# End of cmd.src/Makefile.in diff --git a/sim/ucsim/cmd.src/bp.cc b/sim/ucsim/cmd.src/bp.cc index d926e325..51c7ed68 100644 --- a/sim/ucsim/cmd.src/bp.cc +++ b/sim/ucsim/cmd.src/bp.cc @@ -1,5 +1,5 @@ /* - * Simulator of microcontrollers (bp.cc) + * Simulator of microcontrollers (cmd.src/bp.cc) * * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. * @@ -116,4 +116,4 @@ cl_clear_cmd::do_work(class cl_cmdline *cmdline, class cl_console *con) } -/* End of bp.cc */ +/* End of cmd.src/bp.cc */ diff --git a/sim/ucsim/cmd.src/clean.mk b/sim/ucsim/cmd.src/clean.mk index 68b48723..49029345 100644 --- a/sim/ucsim/cmd.src/clean.mk +++ b/sim/ucsim/cmd.src/clean.mk @@ -1,3 +1,7 @@ +# +# ucsim cmd.src/clean.mk +# + # Deleting all files created by building the program # -------------------------------------------------- clean: @@ -21,3 +25,5 @@ mostlyclean: clean # everything deleted by distclean plus files created by bison, etc. # ----------------------------------------------------------------------- realclean: distclean + +# End of cmd.src/clean.mk diff --git a/sim/ucsim/cmd.src/cmdset.cc b/sim/ucsim/cmd.src/cmdset.cc index 68a8e1ef..d9496996 100644 --- a/sim/ucsim/cmd.src/cmdset.cc +++ b/sim/ucsim/cmd.src/cmdset.cc @@ -1,5 +1,5 @@ /* - * Simulator of microcontrollers (cmdset.cc) + * Simulator of microcontrollers (cmd.src/cmdset.cc) * * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. * @@ -464,4 +464,4 @@ cl_kill_cmd::do_work(class cl_cmdline */*cmdline*/, class cl_console */*con*/) } -/* End of cmdset.cc */ +/* End of cmd.src/cmdset.cc */ diff --git a/sim/ucsim/cmd.src/cmdsetcl.h b/sim/ucsim/cmd.src/cmdsetcl.h index b6202693..fd243432 100644 --- a/sim/ucsim/cmd.src/cmdsetcl.h +++ b/sim/ucsim/cmd.src/cmdsetcl.h @@ -1,5 +1,5 @@ /* - * Simulator of microcontrollers (cmdsetcl.h) + * Simulator of microcontrollers (cmd.src/cmdsetcl.h) * * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. * @@ -25,8 +25,8 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ /*@1@*/ -#ifndef CMDSETCL_HEADER -#define CMDSETCL_HEADER +#ifndef CMD_CMDSETCL_HEADER +#define CMD_CMDSETCL_HEADER #include "newcmdcl.h" @@ -337,4 +337,4 @@ public: #endif -/* End of cmdsetcl.h */ +/* End of cmd.src/cmdsetcl.h */ diff --git a/sim/ucsim/cmd.src/cmdutil.cc b/sim/ucsim/cmd.src/cmdutil.cc index 90bb15dc..84c2be54 100644 --- a/sim/ucsim/cmd.src/cmdutil.cc +++ b/sim/ucsim/cmd.src/cmdutil.cc @@ -1,5 +1,5 @@ /* - * Simulator of microcontrollers (cmdutil.cc) + * Simulator of microcontrollers (cmd.src/cmdutil.cc) * * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. * @@ -86,18 +86,18 @@ make_server_socket(unsigned short int port) * Printing out an integer in binary format */ -void -print_bin(long data, int bits, FILE *f) +/*void +print_bin(long data, int bits, class cl_console *con) { long mask= 1; mask= mask << ((bits >= 1)?(bits-1):0); while (bits--) { - fprintf(f, "%c", (data&mask)?'1':'0'); + con->printf("%c", (data&mask)?'1':'0'); mask>>= 1; } -} +}*/ /* @@ -283,4 +283,4 @@ proc_escape(char *string, int *len) } -/* End of cmdutil.cc */ +/* End of cmd.src/cmdutil.cc */ diff --git a/sim/ucsim/cmd.src/cmdutil.h b/sim/ucsim/cmd.src/cmdutil.h index 8bc02d2a..679e6967 100644 --- a/sim/ucsim/cmd.src/cmdutil.h +++ b/sim/ucsim/cmd.src/cmdutil.h @@ -1,5 +1,5 @@ /* - * Simulator of microcontrollers (cmdutil.h) + * Simulator of microcontrollers (cmd.src/cmdutil.h) * * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. * @@ -25,8 +25,8 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ /*@1@*/ -#ifndef CMDUTIL_HEADER -#define CMDUTIL_HEADER +#ifndef CMD_CMDUTIL_HEADER +#define CMD_CMDUTIL_HEADER #include "ddconfig.h" @@ -34,7 +34,7 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA extern int make_server_socket(unsigned short int port); -extern void print_bin(long data, int bits, FILE *f); +//extern void print_bin(long data, int bits, class cl_console *con); extern struct name_entry *get_name_entry(struct name_entry tabl[], char *name, class cl_uc *uc); @@ -47,4 +47,4 @@ extern char *proc_escape(char *string, int *len); #endif -/* End of cmdutil.h */ +/* End of cmd.src/cmdutil.h */ diff --git a/sim/ucsim/cmd.src/conf.mk b/sim/ucsim/cmd.src/conf.mk index 879e9bc8..4bb2a6e2 100644 --- a/sim/ucsim/cmd.src/conf.mk +++ b/sim/ucsim/cmd.src/conf.mk @@ -1,4 +1,6 @@ # +# ucsim cmd.src/conf.mk +# # Makefile targets to remake configuration # @@ -7,4 +9,4 @@ freshconf: Makefile Makefile: $(srcdir)/Makefile.in $(PRJDIR)/configure.in cd $(PRJDIR) && $(SHELL) ./config.status -# End of conf.mk +# End of cmd.src/conf.mk diff --git a/sim/ucsim/cmd.src/get.cc b/sim/ucsim/cmd.src/get.cc index ab2888bc..8fa1bb27 100644 --- a/sim/ucsim/cmd.src/get.cc +++ b/sim/ucsim/cmd.src/get.cc @@ -1,5 +1,5 @@ /* - * Simulator of microcontrollers (get.cc) + * Simulator of microcontrollers (cmd.src/get.cc) * * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. * @@ -76,4 +76,4 @@ cl_get_cmd::timer(class cl_cmdline *cmdline, class cl_console *con) } -/* End of get.cc */ +/* End of cmd.src/get.cc */ diff --git a/sim/ucsim/cmd.src/info.cc b/sim/ucsim/cmd.src/info.cc index f53f8701..f21fc966 100644 --- a/sim/ucsim/cmd.src/info.cc +++ b/sim/ucsim/cmd.src/info.cc @@ -1,5 +1,5 @@ /* - * Simulator of microcontrollers (info.cc) + * Simulator of microcontrollers (cmd.src/info.cc) * * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. * @@ -153,4 +153,4 @@ cl_info_hw_cmd::do_work(class cl_cmdline *cmdline, class cl_console *con) } -/* End of info.cc */ +/* End of cmd.src/info.cc */ diff --git a/sim/ucsim/cmd.src/infocl.h b/sim/ucsim/cmd.src/infocl.h index 5b3af267..87d65015 100644 --- a/sim/ucsim/cmd.src/infocl.h +++ b/sim/ucsim/cmd.src/infocl.h @@ -1,5 +1,5 @@ /* - * Simulator of microcontrollers (infocl.h) + * Simulator of microcontrollers (cmd.src/infocl.h) * * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. * @@ -25,8 +25,8 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ /*@1@*/ -#ifndef INFOCL_HEADER -#define INFOCL_HEADER +#ifndef CMD_INFOCL_HEADER +#define CMD_INFOCL_HEADER #include "newcmdcl.h" @@ -70,4 +70,4 @@ public: #endif -/* End of infocl.h */ +/* End of cmd.src/infocl.h */ diff --git a/sim/ucsim/cmd.src/newcmd.cc b/sim/ucsim/cmd.src/newcmd.cc index a401bc54..be85ad80 100644 --- a/sim/ucsim/cmd.src/newcmd.cc +++ b/sim/ucsim/cmd.src/newcmd.cc @@ -1,5 +1,5 @@ /* - * Simulator of microcontrollers (newcmd.cc) + * Simulator of microcontrollers (cmd.src/newcmd.cc) * * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. * @@ -1122,4 +1122,4 @@ cl_commander::proc_input(void) } -/* End of newcmd.cc */ +/* End of cmd.src/newcmd.cc */ diff --git a/sim/ucsim/cmd.src/newcmdcl.h b/sim/ucsim/cmd.src/newcmdcl.h index 255a8578..19512133 100644 --- a/sim/ucsim/cmd.src/newcmdcl.h +++ b/sim/ucsim/cmd.src/newcmdcl.h @@ -1,5 +1,5 @@ /* - * Simulator of microcontrollers (cmdcl.h) + * Simulator of microcontrollers (cmd.src/cmdcl.h) * * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. * @@ -25,8 +25,8 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ /*@1@*/ -#ifndef CMDCL_HEADER -#define CMDCL_HEADER +#ifndef CMD_NEWCMDCL_HEADER +#define CMD_NEWCMDCL_HEADER #include "ddconfig.h" @@ -136,9 +136,11 @@ public: class cl_console: public cl_base { + friend class cl_commander; +protected: + FILE *in, *out; public: class cl_sim *sim; - FILE *in, *out; char *last_command; int flags; // See CONS_XXXX char *prompt; @@ -227,4 +229,4 @@ public: #endif -/* End of cmdcl.h */ +/* End of cmd.src/cmdcl.h */ diff --git a/sim/ucsim/cmd.src/set.cc b/sim/ucsim/cmd.src/set.cc index 26ed424b..0ea5509e 100644 --- a/sim/ucsim/cmd.src/set.cc +++ b/sim/ucsim/cmd.src/set.cc @@ -1,5 +1,5 @@ /* - * Simulator of microcontrollers (set.cc) + * Simulator of microcontrollers (cmd.src/set.cc) * * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. * @@ -70,4 +70,4 @@ cl_set_cmd::timer(class cl_cmdline *cmdline, class cl_console *con) } -/* End of set.cc */ +/* End of cmd.src/set.cc */ diff --git a/sim/ucsim/cmd.src/syntax.cc b/sim/ucsim/cmd.src/syntax.cc index 76841e25..d99f09b5 100644 --- a/sim/ucsim/cmd.src/syntax.cc +++ b/sim/ucsim/cmd.src/syntax.cc @@ -1,5 +1,5 @@ /* - * Simulator of microcontrollers (syntax.cc) + * Simulator of microcontrollers (cmd.src/syntax.cc) * * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. * @@ -28,4 +28,4 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA // local #include "syntaxcl.h" -/* End of syntax.cc */ +/* End of cmd.src/syntax.cc */ diff --git a/sim/ucsim/cmd.src/syntaxcl.h b/sim/ucsim/cmd.src/syntaxcl.h index 57a2e015..c49d047a 100644 --- a/sim/ucsim/cmd.src/syntaxcl.h +++ b/sim/ucsim/cmd.src/syntaxcl.h @@ -1,5 +1,5 @@ /* - * Simulator of microcontrollers (syntaxcl.h) + * Simulator of microcontrollers (cmd.src/syntaxcl.h) * * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. * @@ -25,9 +25,9 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ /*@1@*/ -#ifndef SYNTAXCL_HEADER -#define SYNTAXCL_HEADER +#ifndef CMD_SYNTAXCL_HEADER +#define CMD_SYNTAXCL_HEADER #endif -/* End of syntaxcl.h */ +/* End of cmd.src/syntaxcl.h */ diff --git a/sim/ucsim/cmd.src/timer.cc b/sim/ucsim/cmd.src/timer.cc index 51f88748..90f87960 100644 --- a/sim/ucsim/cmd.src/timer.cc +++ b/sim/ucsim/cmd.src/timer.cc @@ -1,5 +1,5 @@ /* - * Simulator of microcontrollers (timer.cc) + * Simulator of microcontrollers (cmd.src/timer.cc) * * Copyright (C) 1999,99 Drotos Daniel, Talker Bt. * @@ -263,4 +263,4 @@ cl_timer_cmd::val(class cl_cmdline *cmdline, class cl_console *con) } -/* End of timer.cc */ +/* End of cmd.src/timer.cc */ diff --git a/sim/ucsim/configure b/sim/ucsim/configure index 95b548d5..c32c027c 100755 --- a/sim/ucsim/configure +++ b/sim/ucsim/configure @@ -2112,13 +2112,13 @@ fi -echo $ac_n "checking for type of accept's length pointer parameter""... $ac_c" 1>&6 -echo "configure:2117: checking for type of accept's length pointer parameter" >&5 -if eval "test \"`echo '$''{'dxpc_cv_accept_length_type'+set}'`\" = set"; then +echo $ac_n "checking for type of length pointer parameter of accept""... $ac_c" 1>&6 +echo "configure:2117: checking for type of length pointer parameter of accept" >&5 +if eval "test \"`echo '$''{'s51_cv_accept_length_type'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else ac_save_CPPFLAGS="$CPPFLAGS" - dxpc_cv_accept_length_type=no + s51_cv_accept_length_type=no for ac_val in int size_t socklen_t; do CPPFLAGS="$ac_save_CPPFLAGS -DACCEPT_SOCKLEN_T=$ac_val" cat > conftest.$ac_ext <&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* - dxpc_cv_accept_length_type=$ac_val; break + s51_cv_accept_length_type=$ac_val; break else echo "configure: failed program was:" >&5 cat conftest.$ac_ext >&5 @@ -2142,11 +2142,11 @@ rm -f conftest* CPPFLAGS="$ac_save_CPPFLAGS" fi -echo "$ac_t""$dxpc_cv_accept_length_type" 1>&6 +echo "$ac_t""$s51_cv_accept_length_type" 1>&6 - if test $dxpc_cv_accept_length_type != no; then + if test $s51_cv_accept_length_type != no; then cat >> confdefs.h < #include ], [struct sockaddr a; $ac_val len; accept (0, &a, &len);], - [dxpc_cv_accept_length_type=$ac_val; break]) + [s51_cv_accept_length_type=$ac_val; break]) done CPPFLAGS="$ac_save_CPPFLAGS"]) - if test $dxpc_cv_accept_length_type != no; then - AC_DEFINE_UNQUOTED(ACCEPT_SOCKLEN_T, $dxpc_cv_accept_length_type, - [Define to be the type of accept's length parameter (without -the \*').]) + if test $s51_cv_accept_length_type != no; then + AC_DEFINE_UNQUOTED(ACCEPT_SOCKLEN_T, $s51_cv_accept_length_type, + [Define to be the type of length parameter of accept (without the \*').]) fi ] ) -dxpc_ACCEPT_LENGTH_T +s51_ACCEPT_LENGTH_T # Macro definitions ################### diff --git a/sim/ucsim/s51.src/cmd.cc b/sim/ucsim/s51.src/cmd.cc index 5be88f2c..cf4af454 100644 --- a/sim/ucsim/s51.src/cmd.cc +++ b/sim/ucsim/s51.src/cmd.cc @@ -94,9 +94,9 @@ cmd_get_option(char *cmd, class cl_uc *uc, class cl_sim *sim) if (!s || !strcmp(s, o->id)) { - fprintf(sim->cmd_out(), "%s ", o->id); - o->print(sim->cmd_out()); - fprintf(sim->cmd_out(), " %s\n", o->help); + sim->cmd->printf("%s ", o->id); + o->print(sim->cmd->actual_console); + sim->cmd->printf(" %s\n", o->help); } } return(DD_FALSE); @@ -116,12 +116,12 @@ cmd_set_option(char *cmd, class cl_uc *uc, class cl_sim *sim) if ((id= strtok(NULL, delimiters)) == NULL) { - fprintf(sim->cmd_out(), "Name of option has not given.\n"); + sim->cmd->printf("Name of option has not given.\n"); return(DD_FALSE); } if ((s= strtok(NULL, delimiters)) == NULL) { - fprintf(sim->cmd_out(), "Value has not given.\n"); + sim->cmd->printf("Value has not given.\n"); return(DD_FALSE); } for (i= 0; i < uc->options->count; i++) diff --git a/sim/ucsim/s51.src/cmd51.cc b/sim/ucsim/s51.src/cmd51.cc index 5dd3c939..8bc9bdba 100644 --- a/sim/ucsim/s51.src/cmd51.cc +++ b/sim/ucsim/s51.src/cmd51.cc @@ -97,7 +97,7 @@ cl_51cons::interpret(char *cmd) i++; if (cmd_table[i].name == NULL) { - fprintf(sim->cmd_out(), "Unknown command.\n"); + sim->cmd->printf("Unknown command.\n"); if (last_command) { free(last_command); diff --git a/sim/ucsim/s51.src/cmd_brk.cc b/sim/ucsim/s51.src/cmd_brk.cc index 0602cd49..700b4d16 100644 --- a/sim/ucsim/s51.src/cmd_brk.cc +++ b/sim/ucsim/s51.src/cmd_brk.cc @@ -192,16 +192,16 @@ cmd_brk_dele(char *cmd, class t_uc51 *uc, class cl_sim *sim) if ((id= strtok(NULL, delimiters)) == NULL) { - fprintf(sim->cmd_out(), "Event has not given.\n"); + sim->cmd->printf("Event has not given.\n"); return(DD_FALSE); } if ((s= strtok(NULL, delimiters)) == NULL) - fprintf(sim->cmd_out(), "Address has not given.\n"); + sim->cmd->printf("Address has not given.\n"); else { addr= (uint)strtol(s, NULL, 0); if (uc->ebrk_at(addr, id) == NULL) - fprintf(sim->cmd_out(), "No %s breakpoint at %06x\n", id, addr); + sim->cmd->printf("No %s breakpoint at %06x\n", id, addr); else uc->rm_ebrk(addr, id); } diff --git a/sim/ucsim/s51.src/dump.cc b/sim/ucsim/s51.src/dump.cc index 8ff7743f..11318323 100644 --- a/sim/ucsim/s51.src/dump.cc +++ b/sim/ucsim/s51.src/dump.cc @@ -46,7 +46,7 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA void dump_memory(cl_mem *mem, - t_addr *start, t_addr stop, int bpl, FILE *f, + t_addr *start, t_addr stop, int bpl, class cl_console *con, class cl_sim *sim) { int i; @@ -54,7 +54,7 @@ dump_memory(cl_mem *mem, while ((*start <= stop) && (*start < mem->size)) { - sim->cmd->printf("%06x ", *start); + con->printf("%06x ", *start); for (i= 0; (i < bpl) && (*start+i < mem->size) && (*start+i <= stop); @@ -62,20 +62,20 @@ dump_memory(cl_mem *mem, { char format[10]; sprintf(format, "%%0%dx ", mem->width/4); - fprintf(f, format/*"%02x "*/, mem->get(*start+i)); + con->printf(format/*"%02x "*/, mem->get(*start+i)); } while (i < bpl) { - fprintf(f, " "); + con->printf(" "); i++; } for (i= 0; (i < bpl) && (*start+i < mem->size) && (*start+i <= stop); i++) - fprintf(f, "%c", - isprint(mem->get(*start+i))?(char)mem->get(*start+i):'.'); - fprintf(f, "\n"); + con->printf("%c", + isprint(mem->get(*start+i))?(char)mem->get(*start+i):'.'); + con->printf("\n"); (*start)+= bpl; } } @@ -144,66 +144,68 @@ cmd_dump_port(char *cmd, class t_uc51 *uc, class cl_sim *sim) { uchar data; + if (sim->cmd->actual_console == 0) + return(DD_FALSE); data= uc->get_mem(MEM_SFR, P0); sim->cmd->printf("P0 "); - print_bin(data, 8, sim->cmd_out()); + sim->cmd->actual_console->print_bin(data, 8); sim->cmd->printf(" 0x%02x %3d %c", data, data, isprint(data)?data:'.'); data= uc->get_mem(MEM_SFR, P1); sim->cmd->printf(" P1 "); - print_bin(data, 8, sim->cmd_out()); + sim->cmd->actual_console->print_bin(data, 8); sim->cmd->printf(" 0x%02x %3d %c\n", data, data, isprint(data)?data:'.'); data= uc->port_pins[0]; sim->cmd->printf("Pin0 "); - print_bin(data, 8, sim->cmd_out()); + sim->cmd->actual_console->print_bin(data, 8); sim->cmd->printf(" 0x%02x %3d %c", data, data, isprint(data)?data:'.'); data= uc->port_pins[1]; sim->cmd->printf(" Pin1 "); - print_bin(data, 8, sim->cmd_out()); + sim->cmd->actual_console->print_bin(data, 8); sim->cmd->printf(" 0x%02x %3d %c\n", data, data, isprint(data)?data:'.'); data= uc->port_pins[0] & uc->get_mem(MEM_SFR, P0); sim->cmd->printf("Port0 "); - print_bin(data, 8, sim->cmd_out()); + sim->cmd->actual_console->print_bin(data, 8); sim->cmd->printf(" 0x%02x %3d %c", data, data, isprint(data)?data:'.'); data= uc->port_pins[1] & uc->get_mem(MEM_SFR, P1); sim->cmd->printf(" Port1 "); - print_bin(data, 8, sim->cmd_out()); + sim->cmd->actual_console->print_bin(data, 8); sim->cmd->printf(" 0x%02x %3d %c\n", data, data, isprint(data)?data:'.'); sim->cmd->printf("\n"); data= uc->get_mem(MEM_SFR, P2); sim->cmd->printf("P2 "); - print_bin(data, 8, sim->cmd_out()); + sim->cmd->actual_console->print_bin(data, 8); sim->cmd->printf(" 0x%02x %3d %c", data, data, isprint(data)?data:'.'); data= uc->get_mem(MEM_SFR, P3); sim->cmd->printf(" P3 "); - print_bin(data, 8, sim->cmd_out()); + sim->cmd->actual_console->print_bin(data, 8); sim->cmd->printf(" 0x%02x %3d %c\n", data, data, isprint(data)?data:'.'); data= uc->port_pins[2]; sim->cmd->printf("Pin2 "); - print_bin(data, 8, sim->cmd_out()); + sim->cmd->actual_console->print_bin(data, 8); sim->cmd->printf(" 0x%02x %3d %c", data, data, isprint(data)?data:'.'); data= uc->port_pins[3]; sim->cmd->printf(" Pin3 "); - print_bin(data, 8, sim->cmd_out()); + sim->cmd->actual_console->print_bin(data, 8); sim->cmd->printf(" 0x%02x %3d %c\n", data, data, isprint(data)?data:'.'); data= uc->port_pins[2] & uc->get_mem(MEM_SFR, P2); sim->cmd->printf("Port2 "); - print_bin(data, 8, sim->cmd_out()); + sim->cmd->actual_console->print_bin(data, 8); sim->cmd->printf(" 0x%02x %3d %c", data, data, isprint(data)?data:'.'); data= uc->port_pins[3] & uc->get_mem(MEM_SFR, P3); sim->cmd->printf(" Port3 "); - print_bin(data, 8, sim->cmd_out()); + sim->cmd->actual_console->print_bin(data, 8); sim->cmd->printf(" 0x%02x %3d %c\n", data, data, isprint(data)?data:'.'); return(DD_FALSE); @@ -243,7 +245,8 @@ cmd_dump_sfr(char *cmd, class t_uc51 *uc, class cl_sim *sim) } else // dump all - dump_memory(uc->mem(MEM_SFR), &start, 255, 16, sim->cmd_out(), sim); + dump_memory(uc->mem(MEM_SFR), &start, 255, 16, sim->cmd->actual_console, + sim); return(DD_FALSE); } diff --git a/sim/ucsim/s51.src/dump.h b/sim/ucsim/s51.src/dump.h index 6350782e..9d0319ce 100644 --- a/sim/ucsim/s51.src/dump.h +++ b/sim/ucsim/s51.src/dump.h @@ -38,7 +38,8 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA extern void dump_memory(cl_mem *mem, t_addr *start, t_addr stop, - int bpl, FILE *f, class cl_sim *sim); + int bpl, class cl_console *con, + class cl_sim *sim); extern bool cmd_disass(char *cmd, class t_uc51 *uc, class cl_sim *sim); extern bool cmd_dump_port(char *cmd, class t_uc51 *uc, class cl_sim *sim); diff --git a/sim/ucsim/s51.src/go.cc b/sim/ucsim/s51.src/go.cc index d7b3289c..704aa7dc 100644 --- a/sim/ucsim/s51.src/go.cc +++ b/sim/ucsim/s51.src/go.cc @@ -54,8 +54,7 @@ cmd_go(char *cmd, class t_uc51 *uc, class cl_sim *sim) if (sim->state & SIM_GO) { - fprintf(sim->cmd_out(), - "Execution is already running.\n"); + sim->cmd->printf("Execution is already running.\n"); return(0); } if ((start_str= strtok(NULL, delimiters)) != NULL) @@ -68,15 +67,14 @@ cmd_go(char *cmd, class t_uc51 *uc, class cl_sim *sim) { if (!uc->inst_at(start) && uc->debug) - fprintf(sim->cmd_out(), - "Warning: maybe not instruction at 0x%06lx\n", start); + sim->cmd->printf("Warning: maybe not instruction at 0x%06lx\n", start); uc->PC= start; } if (stop >= 0) { if (start == (t_addr)stop) { - fprintf(sim->cmd_out(), "Addresses must be different.\n"); + sim->cmd->printf("Addresses must be different.\n"); return(DD_FALSE); } if ((b= uc->fbrk_at(stop))) @@ -200,15 +198,14 @@ cmd_pc(char *cmd, class t_uc51 *uc, class cl_sim *sim) if (p && ((p == s) || *p)) - fprintf(sim->cmd_out(), "Wrong parameter, PC unchanged.\n"); + sim->cmd->printf("Wrong parameter, PC unchanged.\n"); else { if (pc >= EROM_SIZE) pc= 0; if (!uc->inst_at(pc) && uc->debug) - fprintf(sim->cmd_out(), - "Warning: maybe not instruction at %06lx\n", pc); + sim->cmd->printf("Warning: maybe not instruction at %06lx\n", pc); uc->PC= pc; uc->print_disass(uc->PC, sim->cmd->actual_console); } diff --git a/sim/ucsim/s51.src/set.cc b/sim/ucsim/s51.src/set.cc index d8bc2e3f..09a3deac 100644 --- a/sim/ucsim/s51.src/set.cc +++ b/sim/ucsim/s51.src/set.cc @@ -59,7 +59,7 @@ set_memory(cl_mem *mem, t_addr first, if ((s= strtok(NULL, delimiters)) == NULL) { - fprintf(sim->cmd_out(), "Address has not given.\n"); + sim->cmd->printf("Address has not given.\n"); return; } if (tabl) @@ -72,28 +72,26 @@ set_memory(cl_mem *mem, t_addr first, if (p && *p) { - fprintf(sim->cmd_out(), "Bad address.\n"); + sim->cmd->printf("Bad address.\n"); return; } } start= addr; if (start >= mem->size) { - fprintf(sim->cmd_out(), - "Address %ld(0x%lx) is bigger than %ld(0x%lx).\n", - start, start, mem->size-1, mem->size-1); + sim->cmd->printf("Address %ld(0x%lx) is bigger than %ld(0x%lx).\n", + start, start, mem->size-1, mem->size-1); return; } if (!(start >= first)) { - fprintf(sim->cmd_out(), - "Address %ld(0x%lx) is less than %ld(0x%lx).\n", - start, start, first, first); + sim->cmd->printf("Address %ld(0x%lx) is less than %ld(0x%lx).\n", + start, start, first, first); return; } if ((s= strtok(NULL, " \t\v")) == NULL) { - fprintf(sim->cmd_out(), "Data has not given.\n"); + sim->cmd->printf("Data has not given.\n"); return; } while (s && @@ -105,7 +103,7 @@ set_memory(cl_mem *mem, t_addr first, if (p && *p) { - fprintf(sim->cmd_out(), "Bad data %s\n", s); + sim->cmd->printf("Bad data %s\n", s); break; } mem->set(addr, data); @@ -142,7 +140,7 @@ set_memory(cl_mem *mem, t_addr first, } s= strtok(NULL, " \t\v"); } - dump_memory(mem, &start, addr-1, 16, sim->cmd_out(), sim); + dump_memory(mem, &start, addr-1, 16, sim->cmd->actual_console, sim); } @@ -209,25 +207,25 @@ cmd_set_bit(char *cmd, class cl_uc *uc, class cl_sim *sim) if ((s= strtok(NULL, delimiters)) == NULL) { - fprintf(sim->cmd_out(), "Address has not given.\n"); + sim->cmd->printf("Address has not given.\n"); return(DD_FALSE); } if (!interpret_bitname(s, uc, &cell, &addr, &bitaddr, &bitmask, NULL)) { - fprintf(sim->cmd_out(), "Bad address %s\n", s); + sim->cmd->printf("Bad address %s\n", s); return(DD_FALSE); } if ((s= strtok(NULL, delimiters)) == NULL) { - fprintf(sim->cmd_out(), "Data has not given.\n"); + sim->cmd->printf("Data has not given.\n"); return(DD_FALSE); } while (s) { if (!isdigit(*s)) { - fprintf(sim->cmd_out(), "Bad data %s\n", s); + sim->cmd->printf("Bad data %s\n", s); return(DD_FALSE); } if (*s == '0') @@ -254,26 +252,26 @@ cmd_set_port(char *cmd, class cl_uc *uc, class cl_sim *sim) if ((s= strtok(NULL, delimiters)) == NULL) { - fprintf(sim->cmd_out(), "Port number has not given.\n"); + sim->cmd->printf("Port number has not given.\n"); return(DD_FALSE); } port= strtol(s, &p, 0); if ((p && *p) || (port > 3)) { - fprintf(sim->cmd_out(), "Port number %s is wrong.\n", s); + sim->cmd->printf("Port number %s is wrong.\n", s); return(DD_FALSE); } if ((s= strtok(NULL, delimiters)) == NULL) { - fprintf(sim->cmd_out(), "Date has not given.\n"); + sim->cmd->printf("Date has not given.\n"); return(DD_FALSE); } data= strtol(s, &p, 0); if (p && *p) { - fprintf(sim->cmd_out(), "Data %s is wrong.\n", s); + sim->cmd->printf("Data %s is wrong.\n", s); return(DD_FALSE); } uc->port_pins[port]= data; @@ -300,7 +298,7 @@ fill_memory(uchar *what, int size, int first, class cl_uc *uc, (start < 0) || (start < first) || (start >= size)) - fprintf(sim->cmd_out(), "Start address %s is wrong.\n", s); + sim->cmd->printf("Start address %s is wrong.\n", s); if ((s= strtok(NULL, delimiters)) == NULL) return; @@ -308,13 +306,13 @@ fill_memory(uchar *what, int size, int first, class cl_uc *uc, if ((p && *p) || (stop < start) || (stop >= size)) - fprintf(sim->cmd_out(), "Stop address %s is wrong.\n", s); + sim->cmd->printf("Stop address %s is wrong.\n", s); if ((s= strtok(NULL, delimiters)) == NULL) return; data= strtol(s, &p, 0); if (p && *p) - fprintf(sim->cmd_out(), "Data %s is wrong.\n", s); + sim->cmd->printf("Data %s is wrong.\n", s); while (start <= stop) { diff --git a/sim/ucsim/s51.src/show.cc b/sim/ucsim/s51.src/show.cc index ef29bcd5..7bf7f429 100644 --- a/sim/ucsim/s51.src/show.cc +++ b/sim/ucsim/s51.src/show.cc @@ -328,17 +328,15 @@ cmd_show(char *cmd, class cl_uc *uc, class cl_sim *sim) if ((s= strtok(NULL, delimiters)) == NULL) { - fprintf(sim->cmd_out(), "Parameter is not given.\n"); + sim->cmd->printf("Parameter is not given.\n"); return(DD_FALSE); } if (*s == 'c') - { - fprintf(sim->cmd_out(), "%s\n", copying); - } + sim->cmd->printf("%s\n", copying); else if (*s == 'w') - fprintf(sim->cmd_out(), "%s\n", warranty); + sim->cmd->printf("%s\n", warranty); else - fprintf(sim->cmd_out(), "Unknown parameter.\n"); + sim->cmd->printf("Unknown parameter.\n"); return(DD_FALSE); } diff --git a/sim/ucsim/s51.src/uc51.cc b/sim/ucsim/s51.src/uc51.cc index eab37892..b7b13a48 100644 --- a/sim/ucsim/s51.src/uc51.cc +++ b/sim/ucsim/s51.src/uc51.cc @@ -405,7 +405,7 @@ t_uc51::print_regs(class cl_console *con) uchar data; start= sfr->get(PSW) & 0x18; - dump_memory(iram, &start, start+7, 8, sim->cmd_out(), sim); + dump_memory(iram, &start, start+7, 8, /*sim->cmd_out()*/con, sim); start= sfr->get(PSW) & 0x18; data= iram->get(iram->get(start)); con->printf("%06x %02x %c", diff --git a/sim/ucsim/s51.src/where.cc b/sim/ucsim/s51.src/where.cc index ba5d3b7d..ab305f31 100644 --- a/sim/ucsim/s51.src/where.cc +++ b/sim/ucsim/s51.src/where.cc @@ -70,7 +70,7 @@ where_memory(cl_mem *mem, bool cs, class cl_sim *sim) found= str[i] == (cs?mem->get(start+i):toupper(mem->get(start+i))); if (found) { - dump_memory(mem, &tmp, start+len-1, 8, sim->cmd_out(), sim); + dump_memory(mem, &tmp, start+len-1, 8, sim->cmd->actual_console,sim); start+= len; } else diff --git a/sim/ucsim/sim.src/option.cc b/sim/ucsim/sim.src/option.cc index 47cce11f..ff151da1 100644 --- a/sim/ucsim/sim.src/option.cc +++ b/sim/ucsim/sim.src/option.cc @@ -70,12 +70,12 @@ cl_bool_opt::cl_bool_opt(bool *opt, char *Iid, char *Ihelp): {} void -cl_bool_opt::print(FILE *f) +cl_bool_opt::print(class cl_console *con) { if (*(bool *)option) - fprintf(f, "TRUE"); + con->printf("TRUE"); else - fprintf(f, "FALSE"); + con->printf("FALSE"); } bool @@ -121,13 +121,13 @@ cl_cons_debug_opt::cl_cons_debug_opt(class cl_sim *Asim, } void -cl_cons_debug_opt::print(FILE *f) +cl_cons_debug_opt::print(class cl_console *con) { if (sim->cmd->actual_console && sim->cmd->actual_console->flags & CONS_DEBUG) - fprintf(f, "TRUE"); + con->printf("TRUE"); else - fprintf(f, "FALSE"); + con->printf("FALSE"); } bool diff --git a/sim/ucsim/sim.src/optioncl.h b/sim/ucsim/sim.src/optioncl.h index ded278d7..5345d322 100644 --- a/sim/ucsim/sim.src/optioncl.h +++ b/sim/ucsim/sim.src/optioncl.h @@ -48,7 +48,7 @@ public: cl_option(void *opt, char *Iid, char *Ihelp); ~cl_option(void); - virtual void print(FILE *f)= 0; + virtual void print(class cl_console *con)= 0; virtual bool get_value(void)= 0; @@ -62,7 +62,7 @@ class cl_bool_opt: public cl_option public: cl_bool_opt(bool *opt, char *Iid, char *Ihelp); - virtual void print(FILE *f); + virtual void print(class cl_console *con); virtual bool get_value(void); virtual void set_value(bool); virtual void set_value(char *s); @@ -75,7 +75,7 @@ public: public: cl_cons_debug_opt(class cl_sim *Asim, char *Iid, char *Ihelp); - virtual void print(FILE *f); + virtual void print(class cl_console *con); virtual bool get_value(void); diff --git a/sim/ucsim/sim.src/sim.cc b/sim/ucsim/sim.src/sim.cc index ed68c752..836e4d42 100644 --- a/sim/ucsim/sim.src/sim.cc +++ b/sim/ucsim/sim.src/sim.cc @@ -467,7 +467,7 @@ cl_sim::stop(int reason) * Obsolete methods for old commander */ -FILE * +/*FILE * cl_sim::cmd_in(void) { if (!cmd || @@ -477,9 +477,9 @@ cl_sim::cmd_in(void) return(cmd->actual_console->in?cmd->actual_console->in:stdin); class cl_console *con= (class cl_console *)(cmd->cons->at(0)); return(con->in?con->in:stdin); -} +}*/ -FILE * +/*FILE * cl_sim::cmd_out(void) { if (!cmd || @@ -489,7 +489,7 @@ cl_sim::cmd_out(void) return(cmd->actual_console->out?cmd->actual_console->out:stdout); class cl_console *con= (class cl_console *)(cmd->cons->at(0)); return(con->out?con->out:stdout); -} +}*/ /* diff --git a/sim/ucsim/sim.src/simcl.h b/sim/ucsim/sim.src/simcl.h index 042b080b..21a83a3d 100644 --- a/sim/ucsim/sim.src/simcl.h +++ b/sim/ucsim/sim.src/simcl.h @@ -88,9 +88,9 @@ public: virtual void stop(int reason); // Obsolete, for old commander -public: - FILE *cmd_out(void); - FILE *cmd_in(void); + //public: + //FILE *cmd_out(void); + //FILE *cmd_in(void); }; diff --git a/sim/ucsim/sim.src/uc.cc b/sim/ucsim/sim.src/uc.cc index f128e8e7..73ea3d20 100644 --- a/sim/ucsim/sim.src/uc.cc +++ b/sim/ucsim/sim.src/uc.cc @@ -356,7 +356,10 @@ cl_uc::read_hex_file(const char *name) uchar low= 0, high; if (!name) - f= sim->/*FIXME*/cmd_in(); + { + sim->cmd->printf("cl_uc::read_hex_file File name not specified\n"); + return(-1); + } else if ((f= fopen(name, "r")) == NULL) { @@ -426,18 +429,17 @@ cl_uc::read_hex_file(const char *name) else if (sim->get_iarg('V', 0) && rtyp != 1) - fprintf(sim->cmd_out(), - "Unknown record type %d(0x%x)\n", rtyp, rtyp); + sim->cmd->printf("Unknown record type %d(0x%x)\n", + rtyp, rtyp); } else if (sim->get_iarg('V', 0)) - fprintf(sim->cmd_out(), - "Checksum error (%x instead of %x) in record %ld.\n", - chk, sum, recnum); + sim->cmd->printf("Checksum error (%x instead of %x) in " + "record %ld.\n", chk, sum, recnum); } else if (sim->get_iarg('V', 0)) - fprintf(sim->cmd_out(), "Read error in record %ld.\n", recnum); + sim->cmd->printf("Read error in record %ld.\n", recnum); } } if (get_mem_width(MEM_ROM) > 8 && @@ -447,7 +449,7 @@ cl_uc::read_hex_file(const char *name) if (name) fclose(f); if (sim->get_iarg('V', 0)) - fprintf(sim->cmd_out(), "%ld records have been read\n", recnum); + sim->cmd->printf("%ld records have been read\n", recnum); analyze(0); return(written); }