change FTDI chip wiring to use it's own LDO for 3.3V, declare v2p4

diff --git a/quantimotor.sch b/quantimotor.sch
index 356a7d964c68b53cee9a7311d88a379c0c3e259f..2f8c680a4ae1b82996156cc23ba228f7d06176ac 100644 (file)
--- a/quantimotor.sch
+++ b/quantimotor.sch
@@ -7,7 +7,7 @@ vendor_part_number=MMA7260QT-ND
 T 13300 -8600 8 10 0 1 0 0 1
 vendor_part_number=MCP9700-E/TO-ND
 T 82400 40400 9 10 1 0 0 0 1
-v2p3
+v2p4
 T 80000 40400 9 10 1 0 0 0 1
 1
 T 80600 40400 9 10 1 0 0 0 1
@@ -1399,11 +1399,9 @@ netname=scl
 }
 C 47000 46900 1 0 0 gnd.sym
 N 46600 47200 47100 47200 4
-N 47100 52700 50100 52700 4
-N 50100 52700 50100 50600 4
+N 47100 52700 53100 52700 4
+N 53100 45200 53100 52700 4
 C 45000 49900 1 0 0 gnd.sym
-C 46400 53200 1 0 0 3.3V-plus.sym
-C 48400 48700 1 0 0 3.3V-plus.sym
 C 44600 50600 1 0 0 nc-left.sym
 {
 T 44600 51000 5 10 0 0 0 0 1
@@ -1439,15 +1437,15 @@ value=NoConnection
 T 44600 48900 5 10 0 0 0 0 1
 device=DRC_Directive
 }
-C 49700 51800 1 90 0 capacitor.sym
+C 51300 51800 1 90 0 capacitor.sym
 {
-T 49000 52000 5 10 0 1 90 0 1
+T 50600 52000 5 10 0 1 90 0 1
 device=CAPACITOR
-T 49700 51800 5 10 0 1 0 0 1
+T 51300 51800 5 10 0 1 0 0 1
 footprint=0402
-T 49100 52400 5 10 1 1 0 0 1
+T 50700 52400 5 10 1 1 0 0 1
 refdes=C3
-T 49000 51900 5 10 1 1 0 0 1
+T 50600 51900 5 10 1 1 0 0 1
 value=0.1uF
 }
 C 45700 52700 1 0 0 capacitor.sym
@@ -1463,7 +1461,7 @@ value=0.1uF
 }
 N 46600 53200 46600 52700 4
 C 45600 52600 1 0 0 gnd.sym
-C 49400 51500 1 0 0 gnd.sym
+C 51000 51500 1 0 0 gnd.sym
 C 48500 47300 1 0 1 fd230ssop.sym
 {
 T 32005 101895 5 10 0 1 0 6 1
@@ -1475,31 +1473,30 @@ refdes=U2
 T 46405 47495 5 10 1 1 0 6 1
 value=FT230XS
 }
-C 48900 50100 1 0 0 resistor.sym
+C 49700 50100 1 0 0 resistor.sym
 {
-T 49200 50500 5 10 0 1 0 0 1
+T 50000 50500 5 10 0 1 0 0 1
 device=RESISTOR
-T 48900 50100 5 10 0 1 0 0 1
+T 49700 50100 5 10 0 1 0 0 1
 footprint=0402
-T 49250 50350 5 10 1 1 0 6 1
+T 50050 50350 5 10 1 1 0 6 1
 refdes=R31
-T 49400 50350 5 10 1 1 0 0 1
+T 50200 50350 5 10 1 1 0 0 1
 value=33
 }
-C 48900 49600 1 0 0 resistor.sym
+C 49700 49600 1 0 0 resistor.sym
 {
-T 49200 50000 5 10 0 1 0 0 1
+T 50000 50000 5 10 0 1 0 0 1
 device=RESISTOR
-T 48900 49600 5 10 0 1 0 0 1
+T 49700 49600 5 10 0 1 0 0 1
 footprint=0402
-T 49250 49850 5 10 1 1 0 6 1
+T 50050 49850 5 10 1 1 0 6 1
 refdes=R32
-T 49400 49850 5 10 1 1 0 0 1
+T 50200 49850 5 10 1 1 0 0 1
 value=33
 }
-N 50100 50600 53100 50600 4
-N 48600 50200 48900 50200 4
-N 48600 49700 48900 49700 4
+N 48600 50200 49700 50200 4
+N 48600 49700 49700 49700 4
 N 45100 51200 43600 51200 4
 {
 T 43600 51250 5 10 1 1 0 0 1
@@ -2076,12 +2073,11 @@ N 54100 49200 53500 49200 4
 N 54100 45200 53100 45200 4
 N 51200 43000 51200 48800 4
 N 54100 48800 53100 48800 4
-N 53100 45200 53100 50600 4
-N 49800 50200 52700 50200 4
+N 50600 50200 52700 50200 4
 N 52700 46800 52700 50200 4
 N 52700 47600 54100 47600 4
 N 54100 46800 52700 46800 4
-N 49800 49700 52300 49700 4
+N 50600 49700 52300 49700 4
 N 52300 46400 52300 49700 4
 N 52300 47200 54100 47200 4
 N 54100 46400 52300 46400 4
@@ -2309,13 +2305,6 @@ device=CONNECTOR
 T 77000 63300 5 10 0 1 0 0 1
 value=Header-2
 }
-C 48600 51100 1 0 0 nc-right.sym
-{
-T 48700 51600 5 10 0 0 0 0 1
-value=NoConnection
-T 48700 51800 5 10 0 0 0 0 1
-device=DRC_Directive
-}
 C 72300 56400 1 90 1 resistor.sym
 {
 T 71900 56100 5 10 0 1 90 6 1
@@ -2345,3 +2334,7 @@ T 71000 56750 5 10 1 1 0 0 1
 netname=v_chg_in
 }
 N 72200 56400 72200 56700 4
+N 48600 48700 49100 48700 4
+N 49100 48700 49100 53200 4
+N 49100 51200 48600 51200 4
+N 49100 53200 46600 53200 4