arm: Use different enum for core_type and core_mode

The fields core_type and core_mode use the same enum arm_mode
but encode different information, making the code less immediate
to read.

Use a different enum arm_core_type for the field core_type.
The code behavior is not changed.

Change-Id: I60f2095ea6801dfe22f6da81ec295ca71ef90466
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5258
Tested-by: jenkins

diff --git a/src/target/arm.h b/src/target/arm.h
index ea83d386736569a2b6bc918e02047a4f0305ab96..bf0d9327e1f908c29de0a1637a60a9943ff93b2f 100644 (file)
--- a/src/target/arm.h
+++ b/src/target/arm.h
@@ -40,6 +40,22 @@
  * support has not yet been integrated, affecting Cortex-M parts.
  */
 
+/**
+ * Indicates what registers are in the ARM state core register set.
+ *
+ * - ARM_CORE_TYPE_STD indicates the standard set of 37 registers, seen
+ *   on for example ARM7TDMI cores.
+ * - ARM_CORE_TYPE_SEC_EXT indicates core has security extensions, thus
+ *   three more registers are shadowed for "Secure Monitor" mode.
+ * - ARM_CORE_TYPE_M_PROFILE indicates a microcontroller profile core,
+ *   which only shadows SP.
+ */
+enum arm_core_type {
+       ARM_CORE_TYPE_STD = -1,
+       ARM_CORE_TYPE_SEC_EXT = 1,
+       ARM_CORE_TYPE_M_PROFILE,
+};
+
 /**
  * Represent state of an ARM core.
  *
@@ -161,15 +177,8 @@ struct arm {
        /** Support for arm_reg_current() */
        const int *map;
 
-       /**
-        * Indicates what registers are in the ARM state core register set.
-        * ARM_MODE_ANY indicates the standard set of 37 registers,
-        * seen on for example ARM7TDMI cores.  ARM_MODE_MON indicates three
-        * more registers are shadowed, for "Secure Monitor" mode.
-        * ARM_MODE_THREAD indicates a microcontroller profile core,
-        * which only shadows SP.
-        */
-       enum arm_mode core_type;
+       /** Indicates what registers are in the ARM state core register set. */
+       enum arm_core_type core_type;
 
        /** Record the current core mode: SVC, USR, or some other mode. */
        enum arm_mode core_mode;

diff --git a/src/target/arm11.c b/src/target/arm11.c
index 159c30a8501513f52d93ceb421983e5e5a081fdd..51f2a337ad4f5198d2658dab69dda09e0b4a9d82 100644 (file)
--- a/src/target/arm11.c
+++ b/src/target/arm11.c
@@ -1109,7 +1109,7 @@ static int arm11_target_create(struct target *target, Jim_Interp *interp)
        if (!arm11)
                return ERROR_FAIL;
 
-       arm11->arm.core_type = ARM_MODE_ANY;
+       arm11->arm.core_type = ARM_CORE_TYPE_STD;
        arm_init_arch_info(target, &arm11->arm);
 
        arm11->jtag_info.tap = target->tap;
@@ -1180,7 +1180,7 @@ static int arm11_examine(struct target *target)
                        type = "ARM1156";
                        break;
                case 0x7B76:
-                       arm11->arm.core_type = ARM_MODE_MON;
+                       arm11->arm.core_type = ARM_CORE_TYPE_SEC_EXT;
                        /* NOTE: could default arm11->hardware_step to true */
                        type = "ARM1176";
                        break;

diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c
index b2962d1c46d57bf7d8704bdeb428c5c251ef54ee..6a7bf9da58e62aea786c6e828a32e41930b05b37 100644 (file)
--- a/src/target/arm7_9_common.c
+++ b/src/target/arm7_9_common.c
@@ -2848,7 +2848,7 @@ int arm7_9_init_arch_info(struct target *target, struct arm7_9_common *arm7_9)
        arm7_9->dcc_downloads = false;
 
        arm->arch_info = arm7_9;
-       arm->core_type = ARM_MODE_ANY;
+       arm->core_type = ARM_CORE_TYPE_STD;
        arm->read_core_reg = arm7_9_read_core_reg;
        arm->write_core_reg = arm7_9_write_core_reg;
        arm->full_context = arm7_9_full_context;

diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c
index 6d03857152513e44200fdc4655cc6ef91240760e..266a4586996423404d5e847867c3b5cefadec412 100644 (file)
--- a/src/target/armv4_5.c
+++ b/src/target/armv4_5.c
@@ -658,7 +658,7 @@ struct reg_cache *arm_build_reg_cache(struct target *target, struct arm *arm)
        for (i = 0; i < num_core_regs; i++) {
                /* Skip registers this core doesn't expose */
                if (arm_core_regs[i].mode == ARM_MODE_MON
-                       && arm->core_type != ARM_MODE_MON)
+                       && arm->core_type != ARM_CORE_TYPE_SEC_EXT)
                        continue;
 
                /* REVISIT handle Cortex-M, which only shadows R13/SP */
@@ -787,7 +787,7 @@ COMMAND_HANDLER(handle_armv4_5_reg_command)
                return ERROR_FAIL;
        }
 
-       if (arm->core_type != ARM_MODE_ANY) {
+       if (arm->core_type != ARM_CORE_TYPE_STD) {
                command_print(CMD,
                        "Microcontroller Profile not supported - use standard reg cmd");
                return ERROR_OK;
@@ -820,7 +820,7 @@ COMMAND_HANDLER(handle_armv4_5_reg_command)
                                sep = "";
                                break;
                        case ARM_MODE_MON:
-                               if (arm->core_type != ARM_MODE_MON)
+                               if (arm->core_type != ARM_CORE_TYPE_SEC_EXT)
                                        continue;
                        /* FALLTHROUGH */
                        default:
@@ -872,7 +872,7 @@ COMMAND_HANDLER(handle_armv4_5_core_state_command)
                return ERROR_FAIL;
        }
 
-       if (arm->core_type == ARM_MODE_THREAD) {
+       if (arm->core_type == ARM_CORE_TYPE_M_PROFILE) {
                /* armv7m not supported */
                command_print(CMD, "Unsupported Command");
                return ERROR_OK;
@@ -910,7 +910,7 @@ COMMAND_HANDLER(handle_arm_disassemble_command)
                return ERROR_FAIL;
        }
 
-       if (arm->core_type == ARM_MODE_THREAD) {
+       if (arm->core_type == ARM_CORE_TYPE_M_PROFILE) {
                /* armv7m is always thumb mode */
                thumb = 1;
        }
@@ -1197,7 +1197,7 @@ int arm_get_gdb_reg_list(struct target *target,
                break;
 
        case REG_CLASS_ALL:
-               *reg_list_size = (arm->core_type != ARM_MODE_MON ? 48 : 51);
+               *reg_list_size = (arm->core_type != ARM_CORE_TYPE_SEC_EXT ? 48 : 51);
                unsigned int list_size_core = *reg_list_size;
                if (arm->arm_vfp_version == ARM_VFP_V3)
                        *reg_list_size += 33;
@@ -1210,7 +1210,7 @@ int arm_get_gdb_reg_list(struct target *target,
                for (i = 13; i < ARRAY_SIZE(arm_core_regs); i++) {
                                int reg_index = arm->core_cache->reg_list[i].number;
                                if (!(arm_core_regs[i].mode == ARM_MODE_MON
-                                               && arm->core_type != ARM_MODE_MON))
+                                               && arm->core_type != ARM_CORE_TYPE_SEC_EXT))
                                        (*reg_list)[reg_index] = &(arm->core_cache->reg_list[i]);
                }
 
@@ -1673,8 +1673,8 @@ int arm_init_arch_info(struct target *target, struct arm *arm)
        arm->common_magic = ARM_COMMON_MAGIC;
 
        /* core_type may be overridden by subtype logic */
-       if (arm->core_type != ARM_MODE_THREAD) {
-               arm->core_type = ARM_MODE_ANY;
+       if (arm->core_type != ARM_CORE_TYPE_M_PROFILE) {
+               arm->core_type = ARM_CORE_TYPE_STD;
                arm_set_cpsr(arm, ARM_MODE_USR);
        }
 

diff --git a/src/target/armv7m.c b/src/target/armv7m.c
index 4b37774a50dab5982f4524eee670930b2e508ad9..82d6e6307f949fb1cc5e5c01eae338f4d36c2cbc 100644 (file)
--- a/src/target/armv7m.c
+++ b/src/target/armv7m.c
@@ -695,7 +695,7 @@ int armv7m_init_arch_info(struct target *target, struct armv7m_common *armv7m)
        /* Enable stimulus port #0 by default */
        armv7m->trace_config.itm_ter[0] = 1;
 
-       arm->core_type = ARM_MODE_THREAD;
+       arm->core_type = ARM_CORE_TYPE_M_PROFILE;
        arm->arch_info = armv7m;
        arm->setup_semihosting = armv7m_setup_semihosting;
 

diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c
index a79b0b90619e42687e5196098dfb1ac503980dbe..4f351f04a216cc3a0e8964ec8a22645df48ff5cb 100644 (file)
--- a/src/target/cortex_a.c
+++ b/src/target/cortex_a.c
@@ -2787,7 +2787,7 @@ static int cortex_a_examine_first(struct target *target)
                }
        }
 
-       armv7a->arm.core_type = ARM_MODE_MON;
+       armv7a->arm.core_type = ARM_CORE_TYPE_SEC_EXT;
 
        /* Avoid recreating the registers cache */
        if (!target_was_examined(target)) {

diff --git a/src/target/xscale.c b/src/target/xscale.c
index e57996585ed2a33e6864f78082653fbd42cbad0f..f879a9cc918f2c5d88470aa8406fb5579bd87f00 100644 (file)
--- a/src/target/xscale.c
+++ b/src/target/xscale.c
@@ -2981,7 +2981,7 @@ static int xscale_init_arch_info(struct target *target,
 
        /* prepare ARMv4/5 specific information */
        arm->arch_info = xscale;
-       arm->core_type = ARM_MODE_ANY;
+       arm->core_type = ARM_CORE_TYPE_STD;
        arm->read_core_reg = xscale_read_core_reg;
        arm->write_core_reg = xscale_write_core_reg;
        arm->full_context = xscale_full_context;