uint32_t
adf4350_regs::compute_register(uint8_t addr){
- uint32_t data;
+ uint32_t data = 0;
switch (addr){
case 0: data = (
_reg_shift(d_int, 15) |
- _reg_shift(d_frac, 3)); break;
+ _reg_shift(d_frac, 3));
+ break;
case 1: data = (
_reg_shift(d_prescaler, 27) |
_reg_shift(s_phase, 15) |
- _reg_shift(d_mod, 3)); break;
+ _reg_shift(d_mod, 3));
+ break;
case 2: data = (
_reg_shift(s_low_noise_and_low_spur_modes, 29) |
_reg_shift(s_muxout, 26) |
_reg_shift(s_pd_polarity, 6) |
_reg_shift(s_power_down, 5) |
_reg_shift(s_cp_three_state, 4) |
- _reg_shift(s_counter_reset, 3)); break;
+ _reg_shift(s_counter_reset, 3));
+ break;
case 3: data = (
_reg_shift(s_csr, 18) |
_reg_shift(s_clk_div_mode, 15) |
- _reg_shift(s_12_bit_clock_divider_value, 3)); break;
+ _reg_shift(s_12_bit_clock_divider_value, 3));
+ break;
case 4: data = (
_reg_shift(s_feedback_select, 23) |
_reg_shift(d_divider_select, 20) |
_reg_shift(s_aux_output_enable, 8) |
_reg_shift(s_aux_output_power, 6) |
_reg_shift(s_rf_output_enable, 5) |
- _reg_shift(s_output_power, 3)); break;
+ _reg_shift(s_output_power, 3));
+ break;
case 5: data = (
- _reg_shift(s_ld_pin_mode, 22)); break;
+ _reg_shift(s_ld_pin_mode, 22));
+ break;
default: return data;
}
/* return the data to write out to spi */
struct usrp_table_entry {
// inteface + normalized mac addr ("eth0:01:23:45:67:89:ab")
std::string key;
- boost::weak_ptr<usrp2::usrp2> value;
+ boost::weak_ptr<usrp2> value;
- usrp_table_entry(const std::string &_key, boost::weak_ptr<usrp2::usrp2> _value)
+ usrp_table_entry(const std::string &_key, boost::weak_ptr<usrp2> _value)
: key(_key), value(_value) {}
};
// We don't have the USRP2 we're looking for
// create a new one and stick it in the table.
- usrp2::sptr r(new usrp2::usrp2(ifc, pr, rx_bufsize));
+ usrp2::sptr r(new usrp2(ifc, pr, rx_bufsize));
usrp_table_entry t(key, r);
s_table.push_back(t);