- add cortex_m3 variant luminary to fix reset issue with asserting SRST

- https://lists.berlios.de/pipermail/openocd-development/2008-April/002022.html for details

git-svn-id: svn://svn.berlios.de/openocd/trunk@624 b42882b7-edfa-0310-969c-e2dbd0fdcd60

diff --git a/src/target/cortex_m3.c b/src/target/cortex_m3.c
index 803f05ce89c5e7746881cb54e53ab035f266091e..1f9674fad000590b9890896120275ae7bc3448a7 100644 (file)
--- a/src/target/cortex_m3.c
+++ b/src/target/cortex_m3.c
@@ -706,13 +706,26 @@ int cortex_m3_assert_reset(target_t *target)
                ahbap_write_system_atomic_u32(swjdp, DCB_DEMCR, TRCENA | VC_HARDERR | VC_BUSERR | VC_CORERESET );
        }
        
-       if (jtag_reset_config & RESET_SRST_PULLS_TRST)
+       /* following hack is to handle luminary reset
+        * when srst is asserted the luminary device seesm to also clear the debug registers
+        * which does not match the armv7 debug TRM */
+               
+       if (strcmp(cortex_m3->variant, "luminary") == 0)
        {
-               jtag_add_reset(1, 1);
+               /* this causes the luminary device to reset using the watchdog */
+               ahbap_write_system_atomic_u32(swjdp, NVIC_AIRCR, AIRCR_VECTKEY | AIRCR_SYSRESETREQ );
+               LOG_DEBUG("Using Luminary Reset: SYSRESETREQ");
        }
        else
        {
-               jtag_add_reset(0, 1);
+               if (jtag_reset_config & RESET_SRST_PULLS_TRST)
+               {
+                       jtag_add_reset(1, 1);
+               }
+               else
+               {
+                       jtag_add_reset(0, 1);
+               }
        }
        
        target->state = TARGET_RESET;
@@ -1438,6 +1451,15 @@ int cortex_m3_init_arch_info(target_t *target, cortex_m3_common_t *cortex_m3, in
        armv7m->pre_restore_context = NULL;
        armv7m->post_restore_context = NULL;
        
+       if (variant)
+       {
+               cortex_m3->variant = strdup(variant);
+       }
+       else
+       {
+               cortex_m3->variant = strdup("");
+       }
+       
        armv7m_init_arch_info(target, armv7m);  
        armv7m->arch_info = cortex_m3;
        armv7m->load_core_reg_u32 = cortex_m3_load_core_reg_u32;

diff --git a/src/target/cortex_m3.h b/src/target/cortex_m3.h
index 0072e84b4525eaba7a2128ca6c68a8ed4d148e37..0d4678e83d2434f1549b233fd18c6d6baf35b1ba 100644 (file)
--- a/src/target/cortex_m3.h
+++ b/src/target/cortex_m3.h
@@ -134,8 +134,8 @@ typedef struct  cortex_m3_dwt_comparator_s
 typedef struct cortex_m3_common_s
 {
        int common_magic;
-       
        arm_jtag_t jtag_info;
+       char *variant;
        
        /* Context information */
        u32 dcb_dhcsr;

diff --git a/src/target/target/lm3s6965.cfg b/src/target/target/lm3s6965.cfg
index fe3d9135242ee81423de9debcafd9a76996ba1eb..ffef12e02fc3970ca25a77c0a84c84a6b9bbdfa4 100644 (file)
--- a/src/target/target/lm3s6965.cfg
+++ b/src/target/target/lm3s6965.cfg
@@ -8,7 +8,10 @@ reset_config srst_only
 #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
 jtag_device 4 0x1 0xf 0xe
 
-target cortex_m3 little run_and_halt 0
+# the luminary variant causes a software reset rather than asserting SRST
+# this stops the debug registers from being cleared
+# this will be fixed in later revisions of silicon
+target cortex_m3 little reset_halt 0 luminary
 
 # 4k working area at base of ram
 working_area 0 0x20000000 0x4000 nobackup

diff --git a/src/target/target/lm3s811.cfg b/src/target/target/lm3s811.cfg
index d5888de1c4c0fdf2ff37be7d272939eb8ab32bb5..56d6410fe7b15abb49647491d9c1ceb28505d470 100644 (file)
--- a/src/target/target/lm3s811.cfg
+++ b/src/target/target/lm3s811.cfg
@@ -8,7 +8,10 @@ reset_config srst_only
 #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
 jtag_device 4 0x1 0xf 0xe
 
-target cortex_m3 little run_and_halt 0
+# the luminary variant causes a software reset rather than asserting SRST
+# this stops the debug registers from being cleared
+# this will be fixed in later revisions of silicon
+target cortex_m3 little reset_halt 0 luminary
 
 # 2k working area at base of ram
 working_area 0 0x20000000 0x2000 nobackup